JPH0568149B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to an encoding processing device in an image processing device such as a facsimile.

[Prior Art] Generally, in an image processing device such as a facsimile, image data is encoded in order to improve transmission efficiency during image transmission. However, the number of bits of the encoded image data is not always smaller than the number of bits of the data before encoding, that is, the unencoded data; in fact, the number of bits may increase.

For example, in the run-length encoding method using the MH method, when one line of 2048-bit image data is encoded, it becomes data of 32 to 9236 bits including an EOL (End Of Line sync) code.

Therefore, in order to reduce the number of bits of image data output from the encoding processing device to at least the number of bits of unencoded data, the following two methods have been proposed.

One of these is that while encoding one unit block of data (equivalent to one line of data in the case of facsimile), the number of bits of the encoded data exceeds the number of bits of one unit block of unencoded data. When the block exceeds the limit, encoding is stopped and the unencoded data of that block is output as is.

Another method is to calculate the number of runs (number of black and white change points) for each unit block of data before encoding, and when the number exceeds a certain value, the run number is output without being encoded.

According to these methods, for example, in the case of facsimile, one line of 2048-bit data is
As a result of transmitting in (2048+control code) bits, the transmission efficiency is improved, and if the output destination of the encoded data is a storage device, the memory capacity can be reduced.

However, according to the above conventional methods, a large amount of buffer memory is required, and in the former case, even things that do not need to be encoded must be encoded; Since the number of runs must be calculated and what is necessary based on the result must be encoded,
In either case, the processing becomes redundant and complicated, and the same unencoded data needs to be repeatedly input to the encoding processing device, resulting in a disadvantage that the data processing time becomes longer.

[Objective] It is an object of the present invention to eliminate the drawbacks of the above-mentioned prior art and provide an encoding processing device with a simple configuration and short data processing time by performing efficient encoding processing.

[Configuration] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

FIG. 1 shows an embodiment of the invention. This embodiment is an example in which the present invention is applied to a facsimile machine.

In the figure, unencoded data is added from a data generator (not shown) such as a scanner in the previous stage.
SB is an encoding unit 1 that performs run-length encoding.
and is added to the control signal adding section 2, and is added to the encoding section 1.
The encoded data CD output from the selector 3 is applied to the input terminal B of the selector 3 and the counter 4.

The control signal addition unit 2 adds an identification code CS to the beginning of one line of unencoded data SB to indicate that it is unencoded data, and adds an EOL to the end of one line of unencoded data SB. (End
Of Linesync) is added to form a data mSB,
This data mSB is applied to input terminal A of selector 3.

The counter 4 counts the encoded data CD and outputs the counted value CC1 to the bit over detection section 5.
The bit over detection section 5 determines whether the count value CC1 exceeds the number of bits for one line of unencoded data (for example, 2048), and outputs the determination result OB to the counter 6. These counter 4 and bit over detection section 5 are reset by a line synchronization signal LS output from the data generator every time one line of unencoded data SB is transferred.

The counter 6 counts the discrimination result OB at the timing when the line synchronization signal LS is applied, and is reset by the line synchronization signal LS when the discrimination result OB is not in a significant state.The counter 6 operates according to the mode input terminal. It changes depending on the condition of MD.

The control unit 7 compares the count value CC2 of the counter 6 with a predetermined value (for example, one of the integers from 2 to 5), and changes the logic level of the switching control signal SD based on the result to control the operation of the selector 3 and Controls the operation of the counter 6.

Now, considering the case where the switching control signal SD is set to the logic level "L", at this time, selector 3
operates to select input terminal B.

Therefore, if one line of unencoded data SB is output after this, the output encoded data CD of the encoder 1 is outputted via the selector 3 to the next stage device.

At this time, the number of bits of the encoded data CD corresponding to one line of unencoded data SB is counted by the counter 4, and the determination result OB corresponding to the counted value CC1 is outputted from the bit over detection section 5.

Since the logic level of the input terminal MD at this time is "L", the counter 6 receives the line periodic signal LS when the determination result OB indicates the beat over state.
The count is incremented at the timing when is added, and when the determination result OB indicates a state that is not a bit over state, that is, a bit under state, it is reset by the line synchronization signal LS.

In this way, when the encoded data CD is selected, the number of consecutive read lines in which the encoded data CD is in the bit over state is counted by the counter 6.
is counted.

Therefore, when the count value CC2 of the counter 6 exceeds a predetermined value, it is determined that the encoding efficiency has decreased,
The control unit 7 converts the switching control signal SD into the line synchronization signal LS.
Immediately after the occurrence of , the logic level is set to "H" to cause the selector 3 to select the input terminal A.

As a result, data mSB is output from the next line to the next stage device.

Further, when the logic level of the input terminal MD is "H", the counter 6 counts up at the timing when the line synchronization signal LS is applied when the discrimination result OB indicates a bit under state, and
It is reset by line synchronization signal LS when indicates a bit over condition.

In this way, when data mSB is selected, the counter 6 counts the number of consecutive read lines in which the encoded data CD is in a bit under state.

Therefore, in this state, the count value of counter 6
When CC2 exceeds a predetermined value, it is determined that the encoding efficiency has improved, and the control unit 7 sets the switching control signal SD to the logic level "L" immediately after the generation of the line synchronization signal LS.
to cause selector 3 to select input terminal B.

As a result, the encoded data starts from the next line.
The CD is output to the next device.

In this way, the selector 3 is controlled appropriately,
As shown in FIG. 2, when encoding efficiency deteriorates, data obtained by adding identification codes CS and EOL to unencoded data SB is output instead of encoded data CD.

Therefore, when there is a strong correlation between the preceding and succeeding lines, such as in a facsimile manuscript, there are many consecutive lines with poor encoding efficiency, so the above-described processing is very effective.

Note that, as a matter of course, data transfer by the data generator and encoding processing by the encoding unit 1 are synchronized. This synchronization process is performed by the control section 7 by applying to the control section 7 a processing end signal EP outputted from the encoding section 1 at the end of encoding of line end data.

Further, each of the above-mentioned elements can be replaced by a control device using a microprocessor.

[Effects] As explained above, according to the present invention, there is no operation such as canceling data being encoded and outputting unencoded data, so there is no need for a buffer to accumulate encoded data. This has the advantages of simple configuration and high processing efficiency. Also,
Since the series of bit-over data blocks is monitored, processing efficiency is good even for data in which data blocks that do bit-over and data blocks that do not occur alternately.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a schematic diagram showing a data output state of the apparatus shown in FIG. DESCRIPTION OF SYMBOLS 1... Encoding part, 2... Control code addition part, 3... Selector, 4, 6... Counter, 5... Bit over detection part, 7... Control part.

Claims (1)

[Claims] 1. An input means for inputting unencoded data; an encoding means for run-length encoding the input unencoded data; A first counting means for counting each block, a detecting means for detecting that the output value of the first counting means is larger than a predetermined value, and a second counting means for counting the output of the detecting means. and selection means for selecting whether to output encoded data or unencoded data from the next unit block of unencoded data, based on the count value of the second counting means, An encoding processing device characterized in that the counting means is reset at the time when the output of the detecting means ceases to be continuous. 2. In claim 1, when unencoded data is output as it is, the encoding process and the process of counting the number of bits of the encoded data are continued as they are, and when the counted number reaches the predetermined bit number, 1. An encoding processing apparatus characterized in that when a predetermined number of unit blocks smaller than the number of unencoded data consecutively occur, encoded data is output from the next unit block of unencoded data.