JPH056892A - Semiconductor device - Google Patents

Abstract

(57) [Summary] [Structure] The power supply for the semiconductor device 4 to which the TAB technology is applied.
The size of the ground bump 1c is 70 μm or less in width and 100 μm or less in depth, and all the bumps have the same size. [Effect] The load applied to all the bumps becomes uniform, so that cracks are less likely to occur in the passivation film and the pads, and the problem that electrical connection is lost is less likely to occur.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor device,
In particular, a tab (hereinafter, referred to as one means for mounting a semiconductor device)
The present invention relates to an improved bump electrode in the TAB technology).

[0002]

2. Description of the Related Art Generally, TAB (tape automated bondin)
g) is a method of electrically connecting the electrode pad on the semiconductor element (chip) to the lead of the package or the pattern of the printed wiring board.

FIG. 4 shows a conventional semiconductor device and is a schematic sectional view showing the periphery of a protruding electrode (hereinafter referred to as a bump) used in TAB. In the figure, 1a is width 7
0 μm, 100 μm deep bump for signal input / output, 1b
Is a power / ground bump having a width of 110 μm and a depth of 100 μm, 2 is a passivation film, and 3a is a width of 90 μm.
m is a signal input / output pad having a depth of 120 μm, 3b is a power supply / ground pad having a width of 130 μm and a depth of 120 μm, and 4 is a semiconductor device having an active function.

FIG. 5 is a perspective view in which leads are aligned with the semiconductor device shown in FIG.
a is a signal input / output lead having a width of 45 μm corresponding to the signal input / output bump 1a, and 5b is a power / ground bump 1b.
It is a lead for power supply / ground having a width of 80 μm corresponding to. FIG. 6 is a schematic sectional view showing a step of collectively bonding the semiconductor device and the leads by thermocompression bonding,
In the figure, 6 is a bonding tool heated to about 500 ° C.

Usually, in order to operate the semiconductor device, 5
Apply a voltage of about V. The voltage is applied between the power supply and the ground, but the power supply / ground bump is larger than the signal input / output bump. The reason is that the current flowing in the bump between the power supply and the ground is larger than that in the signal input / output bump. Therefore, the leads corresponding to the power / ground bumps are naturally widened.

At present, the bumps and leads are bonded by thermocompression bonding as shown in FIG. As shown in FIG. 6 (a), the signal input / output bump 1a, the signal input / output lead 5a, and the power / ground bump 1b.
As shown in FIG. 6B, the bonding tool 6 heated to about 500 ° C. is pressed against the semiconductor device 4 with the power supply / ground leads 5b aligned with each other with a constant load. As a result, as shown in FIG. 6C, the signal input / output bump 1a and the signal input / output lead 5a, and the power / ground bump 1b and the power / ground lead 5b are simultaneously thermocompression bonded. Through the above steps, it becomes possible to apply a voltage to the tip of the lead, obtain an input / output signal, and give it.

[0007]

Since the conventional semiconductor device is constructed as described above, cracks will not be generated if the amount of pressing of the bonding tool is slightly increased with the conventional size of the power / ground bumps. I will enter.
That is, as shown in FIG. 6 (c), when the bump width is 110 μm, the stress applied to the passivation film is larger than that when the bump width is 70 μm, so cracks may occur in the passivation film and pads under the bump. However, there is a problem that electrical continuity may be lost.

The present invention has been made in order to solve the above-mentioned problems, and prevents the passivation film and pads under the bumps from cracking and prevents the electrical continuity from being lost. The purpose is to obtain a semiconductor device.

[0009]

A semiconductor device according to the present invention has a power supply / ground bump size of 70 μm or less in width and a depth of 100 μm or less, and all the bumps have the same size.

[0010]

In the semiconductor device of the present invention, the stress applied to the passivation film is reduced by setting the bump size to 70 μm × 100 μm or less, and the load applied to all the bumps becomes uniform because the bump size is the same. It is possible to prevent the passivation film or the pad from being easily cracked and prevent the electrical conduction from being lost.

[0011]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings. FIG. 1 shows a semiconductor device according to an embodiment of the present invention and is a schematic cross-sectional view showing the periphery of a bump used in TAB. In the figure, the same reference numerals as those in FIG. 4 indicate the same or corresponding portions, and 1c indicates a width of 70 μm and a depth of 100.
μm power / ground bumps 3c have a width of 90 μm,
It is a power / ground pad with a depth of 120 μm. The power / ground bump 1c has the same size as the signal input / output bump 1a, and the power / ground pad 3c has the same size as the signal input / output pad 3a.

FIG. 2 is a perspective view in which the leads are aligned with the semiconductor device shown in FIG. 1. In the figure, 5c is a power / ground lead having a width of 45 .mu.m corresponding to the power / ground bump 1c. FIG. 3 is a schematic sectional view showing a step of collectively bonding the semiconductor device and the leads by thermocompression bonding.

The bumps and the leads are joined as shown in FIG. As shown in FIG. 3A, the semiconductor device 4 in which the alignment of the signal input / output bumps 1a and the signal input / output leads 5a, the power supply / ground bumps 1c and the power supply / ground leads 5c is completed is shown in FIG. As shown in (b), about 50
The bonding tool 6 heated to 0 ° C. is pressed with a constant load. As a result, as shown in FIG. 3 (c), the signal input / output bump 1a and the signal input / output lead 5a, and the power / ground bump 1c and the power / ground lead 5c are simultaneously thermocompression bonded.

According to this embodiment, since the signal input / output bumps and the power supply / ground bumps have the same size, the stress applied to the passivation film and the pads is reduced, and cracks are less likely to occur. The continuity comes to be taken.

In the above embodiment, the bump having a width of 70 μm and a depth of 100 μm is shown. However, the width may be 70 μm or less and the depth of 100 μm or less, and the same effect as that of the above embodiment can be obtained.

[0016]

As described above, according to the semiconductor device of the present invention, the bump size for power supply / ground is 70 μm in width.
Since the depth is 100 m or less and all the bumps have the same size, the stress applied to the passivation film is reduced, and even if the bonding tool is pressed with a constant load, the passivation film and pads are less likely to crack. There is an effect that the problem that electrical connection cannot be established is less likely to occur.

[Brief description of drawings]

FIG. 1 is a schematic sectional view showing a semiconductor device according to an embodiment of the present invention.

FIG. 2 is a perspective view in which bumps and leads are aligned using an embodiment of the present invention.

FIG. 3 is a schematic cross-sectional view showing a step of collectively bonding the semiconductor device and the leads according to the present invention by thermocompression bonding.

FIG. 4 is a schematic cross-sectional view showing a conventional semiconductor device.

FIG. 5 is a perspective view in which bumps and leads are aligned using the semiconductor device shown in FIG.

FIG. 6 is a schematic cross-sectional view showing a step of collectively bonding a conventional semiconductor device and a lead by thermocompression bonding.

[Explanation of symbols]

 1a Signal input / output bump 1c Power supply / ground bump 2 Passivation film 3a Signal input / output pad 3c Power supply / ground pad 4 Semiconductor device 5a Signal input / output lead 5c Power supply / ground lead 6 Bonding tool

Claims (1)

Claim: What is claimed is: 1. An electrode connected to a wiring formed on a main surface of a semiconductor device, and a passivation film made of an insulator covering a portion other than the electrode on the surface of the semiconductor device.
A semiconductor device, which is on the electrode and includes a protruding electrode that electrically and mechanically connects the electrode and a lead,
The protrusion electrode has a width of 70 μm or less and a depth of 100.
A semiconductor device having a size of less than or equal to μm and having the same size for all protruding electrodes.