JPH0573324B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a stacked semiconductor device, particularly a stacked semiconductor device in which a stacked semiconductor device is formed on a single crystal semiconductor layer formed on an insulating layer. This relates to a manufacturing method.

[Conventional technology]

In recent years, in order to realize higher density, higher speed, and multifunctionality of semiconductor devices, attempts have been made to manufacture circuit elements in a single crystal semiconductor film on an insulating layer, and furthermore, this circuit element has been fabricated in three-dimensional form through an insulating layer. Attempts have been made to manufacture stacked semiconductor devices in which multiple layers are stacked.

As an example of the above-mentioned semiconductor device, a non-single crystal semiconductor layer deposited on an insulating layer is irradiated with an energy beam such as a laser beam to heat and melt only the semiconductor layer and turn it into a single crystal. There is a method of forming circuit elements in a semiconductor layer that has been made into a semiconductor layer.

4a to 4h are cross-sectional views showing the steps of a conventional method for manufacturing a stacked semiconductor device. In the figures, 11 is a single crystal silicon substrate as a semiconductor single crystal substrate, and 21, 23, and 25 are oxidized membrane, 2
2, 24 are oxide films as insulating layers (hereinafter referred to as interlayer insulating films); 31, 32, and 33 are gate electrodes; 41, 42, and 43 are source/drain wirings; 51, 52 are openings; 61, 62 is opening 5
1 and 52 are silicon single crystal layers grown by selective epitaxial method (hereinafter referred to as epitaxial silicon), 71 is polycrystalline silicon, 72 is molten silicon, 73, 74, 75, 76, 77, and 7.
8 is monocrystalline silicon, 79 is polycrystalline silicon,
Reference numeral 81 indicates a laser beam, and A, B, and C indicate first, second, and third layer MOS transistors.

Next, manufacturing of the stacked semiconductor device will be explained.

First, an oxide film 2 is formed on a single crystal silicon substrate 11.
1. Form the gate electrode 31 and source/drain wiring 41, and form the first layer MOS transistor A.
Create.

Note that the source/drain wirings 41 and 4 are designed to withstand high heat treatment for later layering of elements.
2 is made of high melting point metal silicide such as tungsten silicide (WSi ₂ ).

Next, after forming the first layer MOS transistor A, an interlayer oxide film 22 is formed as an insulating film to insulate the layers.
is deposited by chemical vapor deposition method (hereinafter referred to as CVD method), and the surface is planarized by resist coating and etchback method.

A single crystal silicon substrate 1 is placed on this interlayer oxide film 22.
In order to form a single crystal silicon layer having the same crystal axis as 1, a square opening 51 with a side of 3 μm is formed in a part of the interlayer oxide film 22, reaching the single crystal silicon substrate 11 (FIG. 4a). ).

Thereafter, as shown in FIG. 4b, epitaxially grown silicon 61 having the same crystal axis as that of the single crystal silicon substrate 11 is grown in the opening 51, and on this epitaxially grown silicon 61, a polycrystalline silicon 61 with a thickness of 0.5 μm is grown. silicon 7
1 is formed by the CVD method (Fig. 4c).

After that, a beam diameter of 100μ was applied to polycrystalline silicon 71.
When irradiated with a laser beam 81 of argon or the like of m, while scanning at a scanning speed of 25 cm/s in the direction of the arrow, the polycrystalline silicon 71 becomes molten silicon 72 due to the irradiation of the laser beam 81, and the irradiation of the laser beam 81 When the process is completed, it is solidified and recrystallized, but at this time, lateral epitaxial growth occurs using the epitaxially grown silicon 61 as a seed, and the polycrystalline silicon 71 on the interlayer oxide film 22 is the same as the single crystal silicon substrate 11. It becomes single crystal silicon 73 with a crystal axis (FIG. 4d).

Regarding the formation mechanism of a single crystal semiconductor layer on an oxide film by laser beam irradiation, please refer to Japanese Patent Application Laid-Open No. 61-47192.
No. 48468, JP 61-48468, JP 61-
It is described in detail in Japanese Patent Application Laid-Open No. 48470 and Japanese Patent Application Laid-open No. 118438/1983.

Next, as shown in FIG. 4e, single crystal silicon 73 is formed using photolithography and etching techniques.
Single crystal silicon 74 in a region where a MOS transistor is to be formed and single crystal silicon 75 as a seed for single crystallization of the third semiconductor layer are patterned.

After that, a first layer is placed on this single crystal silicon 74.
A second layer MOS transistor B is produced by the same method as the second layer MOS transistor A (FIG. 4f).

Next, as shown in Figure 4g, the second layer
After forming MOS transistor B, interlayer oxide film 24
is deposited using the CVD method, and the surface is planarized using a resist coating and an etchback method.

Thereafter, a square opening 52 with a side of 3 μm is provided in this interlayer oxide film 24, and epitaxial silicon 62 is grown by selective epitaxial technique as in the case of the first layer.

Next, polycrystalline silicon is deposited on this epitaxially grown silicon 62 by the CVD method, and then this polycrystalline silicon is turned into single crystal silicon 76 by irradiation with laser light.

Thereafter, as shown in FIG. 4h, a third layer MOS transistor C is formed on the single crystal silicon 77 in the same manner as in the first and second layers.

In this way, a stacked semiconductor device with a three-layer structure,
A so-called three-dimensional circuit element is created.

[Problem that the invention seeks to solve]

Since the conventional manufacturing method of a stacked semiconductor device is performed as described above, in other words, in order to make the third layer single crystal silicon 76 into a single crystal having the same crystal axis as the single crystal silicon substrate 11, Since the epitaxially grown silicon 62 as a seed is created by the selective epitaxial method, in order to grow the epitaxially grown silicon 62 of around 2 μm only in the opening 52 using this selective epitaxial method, it takes 25 minutes at 950°C. Heat treatment is required.

When heat treatment is performed at such high temperatures for a long time,
Impurities such as boron and arsenic introduced into the single-crystal silicon (or single-crystalline silicon) of the circuit elements in the lower layers (first layer, second layer) diffuse, causing the element to deteriorate, especially in channel transistors with short gates. Since the electrical characteristics are significantly deteriorated, there are problems in that it is not possible to miniaturize the elements and it is not possible to improve the degree of integration.

In order to solve the above-mentioned problems, instead of the epitaxially grown silicon 62 in the opening 52, a growth temperature
One possible method is to deposit polycrystalline silicon at a low temperature of 650°C by CVD.

However, in FIG. 4g, polycrystalline silicon 62A (not shown) is used instead of epitaxially grown silicon 62.
is deposited, the single-crystalline silicon portion that becomes the seed is only the single-crystalline silicon 75, and the power margin of the laser beam to melt all of the polycrystalline silicon 62A without melting this single-crystalline silicon 75 is as follows. It becomes very small.

Therefore, in order to increase the power margin of the laser beam, as shown in FIG. A structure in which the opening 53 reaching the silicon substrate 11 is filled with polycrystalline silicon 63 is also conceivable.

However, in this method, polycrystalline silicon 63 must be melted all the way to single-crystal silicon substrate 11, so the power of the laser beam required for melting increases, and in the end, the laser power margin does not increase.

The present invention was made to solve the above-mentioned problems, and an object of the present invention is to provide a method for manufacturing a stacked semiconductor device that allows good lateral epitaxial growth.

[Means for solving problems]

A method for manufacturing a stacked semiconductor device according to the present invention includes the steps of: forming a first insulating layer on the main surface of a single crystal semiconductor substrate; It forms the turning part of
a step of burying the first opening with a first single crystal semiconductor; a step of stacking a second single crystal semiconductor layer in contact with the first single crystal semiconductor; and a step of stacking a second single crystal semiconductor layer on the second single crystal semiconductor layer. forming a second insulating layer in the second insulating layer, forming a second opening in the second insulating layer reaching the second single crystal semiconductor layer; the polycrystalline or amorphous semiconductor is irradiated with an energy source to melt the polycrystalline or amorphous semiconductor, and epitaxial growth is performed in the same crystal orientation as the single crystal semiconductor substrate. The method is characterized by comprising a step of adding.

[Effect]

In the method for manufacturing a stacked semiconductor device according to the present invention, the first opening and the second opening are connected to the second opening.
are connected via a single crystal semiconductor layer, and the first opening is filled with the first single crystal semiconductor layer, and the second opening is filled with the first single crystal semiconductor layer.
The opening is filled with a polycrystalline or amorphous semiconductor, so that when the polycrystalline or amorphous semiconductor melted by the energy source solidifies and recrystallizes, the first single crystal semiconductor or the second single crystal semiconductor melts. Epitaxial growth occurs using the single crystal semiconductor layer or single crystal semiconductor substrate as a seed, and the polycrystalline or amorphous semiconductor becomes single crystal.

Also, the area of the first and second openings is 9μm ²
Since it is smaller than the size of the energy source, there is less heat escape during irradiation, and epitaxial growth of polycrystalline or amorphous semiconductors in the lateral direction can be easily performed.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a process sectional view showing one step of a method for manufacturing a stacked semiconductor device according to an embodiment of the present invention, and the same parts as in FIGS. 4 and 5 are given the same reference numerals.

In the figure, reference numeral 64 indicates polycrystalline silicon embedded in the square opening 52 of 3 μm on each side.

Next, manufacturing of the stacked semiconductor device will be explained.

Note that the description of parts that overlap with the description of the prior art described above will be omitted as appropriate.

The polycrystalline silicon 79 used to create the third layer transistor is irradiated with a laser beam to form a single crystal, but since the polycrystalline silicon 64 is embedded in the opening 52, its deposition The temperature is as low as about 600° C., and the impurities in the first and second layer MOS transistors A and B are diffused without deteriorating their characteristics.

Furthermore, since polycrystalline silicon 79 is connected to single-crystal silicon substrate 11 via polycrystalline silicon 64, single-crystal silicon 75, and epitaxially grown silicon 61, even if the laser power increases somewhat during laser light irradiation, Solidification and recrystallization occurs from single crystal silicon 75 , epitaxially grown silicon 61 , or single crystal silicon substrate 11 , and polycrystalline silicon 79 on interlayer oxide film 24 .
can always be made into single crystal silicon having the same crystal axis as the single crystal silicon substrate 11 by lateral epitaxial growth.

A third layer MOS transistor C is formed on this single crystallized polycrystalline silicon 79, and a three-dimensional circuit element having a three-layer structure is formed.

In the above embodiment, the opening 52 was provided above the epitaxially grown silicon 61 (opening 51), but as shown in FIG. Even if the opening 52 is provided at a different position from the silicon 61 (opening 51), the same effect can be achieved as long as it is connected to the single crystal silicon substrate 11 with a semiconductor.

Although a three-dimensional circuit element having a three-layer structure has been described, it may have any number of layers, and each layer may be an element other than a transistor, such as a diode or a capacitor.

Therefore, a structure in which circuit elements are created in only one layer on an insulating layer, that is, two
The structure may be a three-dimensional circuit element having a layered structure.

In addition, although the openings 51 and 52 are made into squares with one side of 3 μm, if the area is less than 9 μm ² and falls within the size of the laser beam (approximately 100 μm in diameter), the heat generated during energy ray irradiation will be reduced. It can be of any shape as it reduces the amount of escape.

Furthermore, although epitaxial silicon 61 was grown halfway from the single crystal silicon substrate 11 by selective epitaxial method, any method may be used to form a single crystal semiconductor; for example, as shown in FIG.
In this case, the opening 51 may be filled with polycrystalline silicon, and only the opening 51 may be irradiated with a laser beam to form single crystal silicon.

〔Effect of the invention〕

As explained above, according to the present invention, the first
The first single crystal semiconductor in the opening and the polycrystalline or amorphous semiconductor in the second opening are connected via the second single crystal semiconductor. A high quality semiconductor can be epitaxially grown using a single crystal semiconductor substrate, a first single crystal semiconductor, or a second single crystal semiconductor layer melted by irradiation with an energy source as a seed, and the power margin of the energy source increases. In addition, the area of the first and second openings is 9 μm ²
Since it is smaller than the above, the escape of heat from the energy source is reduced, and epitaxial growth of polycrystalline or amorphous materials in the lateral direction is facilitated.

[Brief explanation of the drawing]

FIG. 1 is a process cross-sectional view showing one step of a method for manufacturing a stacked semiconductor device according to an embodiment of the present invention, and FIGS. 2 and 3 are a method for manufacturing a stacked semiconductor device according to another embodiment of the invention. 4A to 4H are step-by-step sectional views showing the steps of a conventional method for manufacturing a stacked semiconductor device, and FIG. 5 is a cross-sectional view of another conventional method for manufacturing a stacked semiconductor device. It is a process sectional view showing one process. In the figure, 11 is a single crystal silicon substrate, 2
1, 23 are oxide films, 22, 24 are oxide films (insulating layers), 31, 32 are gate electrodes, 41, 42 are source/drain electrodes, 51, 52 are openings, 61
is a silicon single crystal layer, 64 is a polycrystalline silicon layer, and 7 is a silicon single crystal layer.
4 and 75 are single crystal silicon, 79 is polycrystalline silicon, A is a first layer MOS transistor, and B is a second layer MOS transistor. In addition, in the figures, the same reference numerals indicate the same or corresponding parts.

Claims (1)

[Scope of Claims] 1. A step of forming a first insulating layer on the main surface of a single crystal semiconductor substrate, and forming a first opening in the first insulating layer reaching the single crystal semiconductor substrate, a step of burying the first opening with a first single crystal semiconductor; a step of stacking a second single crystal semiconductor layer in contact with the first single crystal semiconductor; and a step of stacking a second single crystal semiconductor layer on the second single crystal semiconductor layer. forming a second insulating layer in the second insulating layer, forming a second opening in the second insulating layer reaching the second single crystal semiconductor layer; embedding the polycrystalline or amorphous semiconductor with an energy source to melt the polycrystalline or amorphous semiconductor;
A method for manufacturing a stacked semiconductor device, comprising the step of performing epitaxial growth in the same crystal orientation as the single crystal semiconductor substrate. 2. The method of manufacturing a stacked semiconductor device according to claim 1, wherein the first and second openings are formed to have an area smaller than 9 μm ² . 3. The method of manufacturing a stacked semiconductor device according to claim 1, wherein the second opening is formed directly above the first opening. 4. The method for manufacturing a stacked semiconductor device according to any one of claims 1 to 3, wherein the single crystal semiconductor substrate is a single crystal silicon substrate. 5. The method for manufacturing a stacked semiconductor device according to any one of claims 1 to 4, wherein the energy source is a laser beam.