JPH0573360B2 - - Google Patents
Info
- Publication number
- JPH0573360B2 JPH0573360B2 JP24689387A JP24689387A JPH0573360B2 JP H0573360 B2 JPH0573360 B2 JP H0573360B2 JP 24689387 A JP24689387 A JP 24689387A JP 24689387 A JP24689387 A JP 24689387A JP H0573360 B2 JPH0573360 B2 JP H0573360B2
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- wiring board
- conductive circuit
- hole
- metal foil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910052751 metal Inorganic materials 0.000 claims description 28
- 239000002184 metal Substances 0.000 claims description 28
- 239000011888 foil Substances 0.000 claims description 23
- 229920005989 resin Polymers 0.000 claims description 17
- 239000011347 resin Substances 0.000 claims description 17
- 238000007747 plating Methods 0.000 claims description 14
- 238000000034 method Methods 0.000 claims description 12
- 238000004519 manufacturing process Methods 0.000 claims description 11
- 239000004641 Diallyl-phthalate Substances 0.000 claims description 5
- QUDWYFHPNIMBFC-UHFFFAOYSA-N bis(prop-2-enyl) benzene-1,2-dicarboxylate Chemical compound C=CCOC(=O)C1=CC=CC=C1C(=O)OCC=C QUDWYFHPNIMBFC-UHFFFAOYSA-N 0.000 claims description 5
- 239000011342 resin composition Substances 0.000 claims description 3
- 238000005470 impregnation Methods 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims 1
- 239000003822 epoxy resin Substances 0.000 description 9
- 229920000647 polyepoxide Polymers 0.000 description 9
- 229910000679 solder Inorganic materials 0.000 description 7
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 6
- 238000005530 etching Methods 0.000 description 5
- 239000011889 copper foil Substances 0.000 description 4
- 238000005260 corrosion Methods 0.000 description 4
- 230000007797 corrosion Effects 0.000 description 4
- 239000004744 fabric Substances 0.000 description 4
- 239000003365 glass fiber Substances 0.000 description 4
- 238000003475 lamination Methods 0.000 description 4
- 238000000465 moulding Methods 0.000 description 4
- 239000004642 Polyimide Substances 0.000 description 3
- 229920001721 polyimide Polymers 0.000 description 3
- 239000002966 varnish Substances 0.000 description 3
- 239000004593 Epoxy Substances 0.000 description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 2
- 229910052782 aluminium Inorganic materials 0.000 description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 2
- ROOXNKNUYICQNP-UHFFFAOYSA-N ammonium persulfate Chemical compound [NH4+].[NH4+].[O-]S(=O)(=O)OOS([O-])(=O)=O ROOXNKNUYICQNP-UHFFFAOYSA-N 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007639 printing Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- ROLAGNYPWIVYTG-UHFFFAOYSA-N 1,2-bis(4-methoxyphenyl)ethanamine;hydrochloride Chemical compound Cl.C1=CC(OC)=CC=C1CC(N)C1=CC=C(OC)C=C1 ROLAGNYPWIVYTG-UHFFFAOYSA-N 0.000 description 1
- KXGFMDJXCMQABM-UHFFFAOYSA-N 2-methoxy-6-methylphenol Chemical compound [CH]OC1=CC=CC([CH])=C1O KXGFMDJXCMQABM-UHFFFAOYSA-N 0.000 description 1
- 229910021578 Iron(III) chloride Inorganic materials 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 229910001870 ammonium persulfate Inorganic materials 0.000 description 1
- 239000004760 aramid Substances 0.000 description 1
- 229920003235 aromatic polyamide Polymers 0.000 description 1
- ZDNFTNPFYCKVTB-UHFFFAOYSA-N bis(prop-2-enyl) benzene-1,4-dicarboxylate Chemical compound C=CCOC(=O)C1=CC=C(C(=O)OCC=C)C=C1 ZDNFTNPFYCKVTB-UHFFFAOYSA-N 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 238000005520 cutting process Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- -1 etc. Substances 0.000 description 1
- 239000000835 fiber Substances 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 229920006015 heat resistant resin Polymers 0.000 description 1
- 229910052742 iron Inorganic materials 0.000 description 1
- RBTARNINKXHZNM-UHFFFAOYSA-K iron trichloride Chemical compound Cl[Fe](Cl)Cl RBTARNINKXHZNM-UHFFFAOYSA-K 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 239000004745 nonwoven fabric Substances 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 239000002759 woven fabric Substances 0.000 description 1
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、導電回路を設けたシートを複数積層
して形成した多層プリント配線板の製造方法に関
する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a multilayer printed wiring board formed by laminating a plurality of sheets provided with conductive circuits.
従来、鉄、アルミニウム等の金属にエポキシ樹
脂等の絶縁層を形成し、その上に銅箔等の導電回
路を形成してなる配線基板又はフエノール樹脂等
の硬質基板の上に銅箔等の導電回路を形成してな
る配線基板は、各種提供され多目的に利用されて
いるが、基板上に形成される導電回路の高密度化
に伴つて、導電回路を形成した基板を複数積層し
て、導電回路を交差させる必要性が生じている。
Conventionally, wiring boards are made by forming an insulating layer such as epoxy resin on a metal such as iron or aluminum, and forming a conductive circuit such as copper foil on top of that, or a conductive circuit such as copper foil is placed on a hard substrate such as phenolic resin. Various types of wiring boards with circuits formed on them are available and used for a variety of purposes. However, as the density of conductive circuits formed on the boards increases, multiple boards with conductive circuits formed on them are laminated. The need to cross circuits has arisen.
そこで、従来は、第７図に示すような多層プリ
ント配線板の製造方法が採用されていた。 Therefore, conventionally, a method of manufacturing a multilayer printed wiring board as shown in FIG. 7 has been adopted.
第７図において、エポキシ樹脂ワニス等を含浸
したガラス繊維布等の絶縁板１の片面に、銅箔等
の金属箔２を積層して加熱・加圧成形して片面金
属箔張り積層板３を形成するとともに、エポキシ
樹脂ワニス等を含浸したガラス繊維布等の絶縁板
１の両面に、銅箔等の金属箔２を積層して加熱・
加圧成形して両面金属箔張り積層板４を形成す
る。 In FIG. 7, a metal foil 2 such as copper foil is laminated on one side of an insulating plate 1 made of glass fiber cloth or the like impregnated with epoxy resin varnish or the like, and then heated and pressure-molded to form a single-sided metal foil-covered laminate 3. At the same time, metal foils 2 such as copper foils are laminated on both sides of an insulating plate 1 made of glass fiber cloth or the like impregnated with epoxy resin varnish or the like, and heated and heated.
Pressure molding is performed to form a double-sided metal foil clad laminate 4.
該積層板３，４には、その後の積層時の位置合
わせのために、貫通孔５，６がドリル等により穿
孔される。その後、両面金属箔張り積層板４の金
属箔２の表面に耐蝕インクにより所望の配線回路
がパターン化され、続いて、エツチング溶液（例
えば、塩化第二鉄溶液、過硫酸アンモニウム溶
液）中に浸漬され配線回路以外の金属箔２が腐食
除去されて、絶縁板１の上に導電回路７が形成さ
れる。 Through holes 5 and 6 are bored in the laminated plates 3 and 4 by a drill or the like for positioning during subsequent lamination. Thereafter, a desired wiring circuit is patterned on the surface of the metal foil 2 of the double-sided metal foil-covered laminate 4 using corrosion-resistant ink, and then immersed in an etching solution (e.g., ferric chloride solution, ammonium persulfate solution). The metal foil 2 other than the wiring circuit is removed by corrosion, and a conductive circuit 7 is formed on the insulating plate 1.
こうして得られたプリント配線板４ａに対し
て、片面金属箔張り積層板３が、プリプレグと呼
ばれる絶縁板８を介して積層され、加熱・加圧成
形されて一体的に多層化させられる。ここで、絶
縁板８は、エポキシ樹脂を含浸したガラス繊維布
の半硬化状態（Ｂステージ）のものである。 A single-sided metal foil clad laminate 3 is laminated on the thus obtained printed wiring board 4a with an insulating plate 8 called prepreg interposed therebetween, and is integrally formed into multiple layers by heating and pressure molding. Here, the insulating plate 8 is a semi-cured (B stage) glass fiber cloth impregnated with epoxy resin.
この後、配線板は、ドリルにより穿孔され、貫
通孔９が形成される。そして、該貫通孔９及び最
外層部に位置する片面金属箔張り積層板３の金属
箔２の表面にスルーホールメツキ１０が施され、
続いて、金属箔２に対して、写真法によつて所望
の配線回路がパターン化され、不要部分の金属箔
２をエツチング除去することにより導電回路１１
が形成される。 Thereafter, the wiring board is drilled to form through holes 9. Then, through-hole plating 10 is applied to the through-hole 9 and the surface of the metal foil 2 of the single-sided metal foil-covered laminate 3 located at the outermost layer,
Next, a desired wiring circuit is patterned on the metal foil 2 using a photographic method, and unnecessary portions of the metal foil 2 are removed by etching to form a conductive circuit 11.
is formed.
ところが、第７図に示す上記従来の製造法にお
いては、使用している樹脂がエポキシ樹脂である
ことから、耐熱性に限界があり、そのことに起因
して信頼性が低くなつてしまうという欠点を有し
ていた。すなわち、ドリルによつて、貫通孔を穿
孔する孔明け加工に際して、切削時に発生する熱
により、エポキシ樹脂が軟化して、上記貫通孔の
内面に露出すべき導電回路７の切削面に被着する
という、いわゆるスミア現象を生ずることがあ
る。
However, in the conventional manufacturing method shown in FIG. 7, since the resin used is epoxy resin, there is a limit to heat resistance, resulting in a disadvantage of low reliability. It had That is, when drilling a through hole with a drill, the epoxy resin is softened by the heat generated during cutting and adheres to the cut surface of the conductive circuit 7 that should be exposed on the inner surface of the through hole. A so-called smear phenomenon may occur.
また、多層プリント配線という構造上、貫通孔
９の内面に露出した導電回路７の切削面の露出面
積が少ないため、スルーホールメツキを施した
時、導電回路７の切削面とメツキ部とが剥離する
といういわゆる内層剥離現象が発生しやすい。 Furthermore, due to the structure of multilayer printed wiring, the exposed area of the cut surface of the conductive circuit 7 exposed on the inner surface of the through hole 9 is small, so when through-hole plating is performed, the cut surface of the conductive circuit 7 and the plated part peel off. The so-called inner layer peeling phenomenon is likely to occur.
そこで、本発明は、上記欠点を改善し、スミア
現象や内層剥離現象が生ずることのない多層プリ
ント配線板の製造方法を提供することを目的とす
る。 SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method for manufacturing a multilayer printed wiring board that improves the above-mentioned drawbacks and does not cause the smear phenomenon or inner layer peeling phenomenon.
そのために本発明の多層プリント配線板の製造
方法においては、両面に金属箔を積層した絶縁板
に第１の貫通孔を形成し、スルーホールメツキを
施した後、前記金属箔に第１の導電回路を設けて
両面プリント配線板を形成し、一方、含浸時にお
いて半硬化性を示す樹脂を含浸したシートに前記
第１の貫通孔より大径の第２の貫通孔を設けると
ともに第２の導電回路を設けて片面プリント配線
板を形成し、前記第１および第２の貫通孔を位置
合わせして前記両面プリント配線板と片面プリン
ト配線板を熱圧着した後、前記第１および第２の
貫通孔に導電性物質を充填することにより前記第
１の導電回路と第２の導電回路とを電気的に接続
したことを特徴とする。
For this purpose, in the method for manufacturing a multilayer printed wiring board of the present invention, a first through hole is formed in an insulating plate with metal foil laminated on both sides, and after through-hole plating is performed, a first conductive layer is formed on the metal foil. A circuit is provided to form a double-sided printed wiring board, while a second through hole having a larger diameter than the first through hole is provided in a sheet impregnated with a resin that exhibits semi-curing properties during impregnation, and a second conductive hole is provided. After providing a circuit to form a single-sided printed wiring board, aligning the first and second through holes, and thermocompression bonding the double-sided printed wiring board and the single-sided printed wiring board, the first and second through holes are The first conductive circuit and the second conductive circuit are electrically connected by filling the holes with a conductive substance.
［作用］
本発明においては、両面に金属箔を積層した絶
縁板に第１の貫通孔を形成し、スルーホールメツ
キを施した後、前記金属箔に第１の導電回路を設
けているため、第１の導電回路とスルーホールメ
ツキは常に面接触し、かつ前記従来例のように、
貫通孔の内面の露出する導電回路に樹脂が被着す
るというスミア現象が生じることがない。また、
両面プリント配線板の第１の貫通孔と片面プリン
ト配線板の第２の貫通孔を別々に形成し、かつ、
第２の貫通孔を第１の貫通孔よりも大径にするた
め、第１および第２の貫通孔に充填される導電性
物質と、両面プリント配線板の第１の導電回路と
の接触面が増大するので、前記従来例のように、
導電回路の切削面とメツキ部が剥離するという内
層剥離現象が防止される。[Function] In the present invention, a first through hole is formed in an insulating plate with metal foil laminated on both sides, and after through-hole plating is performed, the first conductive circuit is provided in the metal foil. The first conductive circuit and the through-hole plating are always in surface contact, and as in the conventional example,
A smear phenomenon in which resin adheres to the conductive circuit exposed on the inner surface of the through hole does not occur. Also,
The first through hole of the double-sided printed wiring board and the second through hole of the single-sided printed wiring board are formed separately, and
In order to make the second through hole larger in diameter than the first through hole, the contact surface between the conductive substance filled in the first and second through holes and the first conductive circuit of the double-sided printed wiring board increases, so as in the conventional example,
This prevents the inner layer peeling phenomenon in which the cut surface of the conductive circuit and the plating part peel off.
以下、本発明の実施例について図面を参照しつ
つ説明する。
Embodiments of the present invention will be described below with reference to the drawings.
第１図は、本発明の多層プリント配線板の製造
工程の１実施例を示す。 FIG. 1 shows an embodiment of the manufacturing process of a multilayer printed wiring board according to the present invention.
１０１は、絶縁シート１０２の片面及び絶縁板
１０２ａの両面に張り合わせられる銅、アルミニ
ウム等の金属箔である。１０２は、含浸時におい
て半硬化性を示す樹脂を含浸した絶縁性のシート
であり、好適な実施例としては芳香族ポリアミド
繊維製の不織布あるいはガラス織布にジアリルフ
タレート樹脂系組成物（例えば、ジアリルオルソ
フタレート、ジアリルイソフタレート、ジアリル
テレフタレート）を含浸したシートの半硬化状態
（Ｂステージ）のものであり、上記金属箔１０１
が張り合わせられて、片面金属箔張り積層板Ａ，
Ｂが形成される。片面金属箔張り積層板Ａ，Ｂに
は、積層時に使用する位置合わせ貫通孔１０３，
１０３ａが穿孔され、また、耐蝕インクによつて
所望の配線回路をパターン化して、次いで周知の
エツチング法にて、配線回路以外の金属箔１０１
を腐食除去し、導電回路１０４，１０４ａが形成
されている。なお、ジアリルフタレート系樹脂の
硬化しにくい温度（80℃程度）以下でパターンエ
ツチングを行うことは当然である。続いて、導電
回路の接続又は、電子素子搭載用等に使用する貫
通孔１０５，１０５ａが、ドリル又は、プレスに
よつて穿孔され、片面プリント配線板Ｃ，Ｄが形
成される。 Reference numeral 101 denotes a metal foil made of copper, aluminum, etc. that is pasted on one side of the insulating sheet 102 and on both sides of the insulating plate 102a. Reference numeral 102 is an insulating sheet impregnated with a resin that exhibits semi-curing properties when impregnated, and a preferred example is a nonwoven fabric made of aromatic polyamide fiber or a glass woven fabric coated with a diallyl phthalate resin composition (for example, diallyl phthalate resin composition). orthophthalate, diallyl isophthalate, diallyl terephthalate) in a semi-cured state (B stage), and the metal foil 101
are laminated together to form a single-sided metal foil laminate A,
B is formed. Single-sided metal foil clad laminates A and B have alignment through holes 103, which are used during lamination.
103a is perforated, a desired wiring circuit is patterned using corrosion-resistant ink, and then the metal foil 101 other than the wiring circuit is patterned using a well-known etching method.
is removed by corrosion, and conductive circuits 104, 104a are formed. Note that it is a matter of course that pattern etching is performed at a temperature below the temperature at which diallylphthalate resin is difficult to cure (approximately 80°C). Subsequently, through holes 105, 105a used for connecting conductive circuits, mounting electronic elements, etc. are bored by a drill or press to form single-sided printed wiring boards C, D.
一方、１０２ａは、エポキシ樹脂ワニス等を含
浸したガラス繊維布等を絶縁板であり、その両面
に金属箔１０１を積層して加熱・加圧成形され、
両面金属箔張り積層板Ｅを形成する。この両面金
属箔張り積層板Ｅには、その後の積層時に使用す
る位置合わせ貫通孔１０３ｂが穿孔され、更に、
導電回路の接続又は電子素子搭載等に使用する貫
通孔１０５ｃが穿孔される。その後、積層板Ｅ
は、周知の無電解メツキ法、電解メツキ法等を用
いて、スルーホールメツキ１０６が施される。そ
して、該スルーホールメツキ１０６上に写真法に
より所望の配線回路がパターン化され、不要部分
がエツチング除去されて導電回路１０７，１０７
ａが形成されて両面プリント配線板Ｆが得られ
る。 On the other hand, 102a is an insulating plate made of glass fiber cloth or the like impregnated with epoxy resin varnish, etc., and metal foil 101 is laminated on both sides of the insulating plate, which is heated and press-molded.
A double-sided metal foil-clad laminate E is formed. This double-sided metal foil clad laminate E is provided with alignment through holes 103b for use in subsequent lamination, and further includes:
A through hole 105c used for connecting a conductive circuit or mounting an electronic element is bored. After that, laminate E
Through-hole plating 106 is performed using a well-known electroless plating method, electrolytic plating method, or the like. Then, a desired wiring circuit is patterned on the through-hole plating 106 by a photographic method, unnecessary portions are removed by etching, and conductive circuits 107, 107 are patterned.
a is formed, and a double-sided printed wiring board F is obtained.
このようにして得られた両面プリント配線板Ｆ
の両面を上記片面プリント配線板Ｃ，Ｄにより挟
み込ませ、これを温度140〜180℃、プレス圧30〜
60Kg／cm2、時間30分にて熱圧着する。熱圧着に際
しては、貫通孔１０５，１０５ａにエポキシ系又
はシリコン系等の充てん剤を充てんし、熱圧着時
の樹脂ダレを防止するようにするとよい。熱圧着
後、充てん物を取り除いたのち貫通孔１０５，１
０５ａに銅粉又は銀粉を混入してなる樹脂系ペー
スト１０８を印刷又は充填機によつて充填し、さ
らにエポキシ樹脂等を主成分とするソルダーマス
ク１０９を印刷し、多層プリント配線板Ｇを完成
させる。 Double-sided printed wiring board F obtained in this way
Both sides of the board are sandwiched between the single-sided printed wiring boards C and D, and this is heated at a temperature of 140 to 180°C and a press pressure of 30 to 30°C.
60Kg/cm 2 , thermocompression bonded for 30 minutes. During thermocompression bonding, it is preferable to fill the through holes 105, 105a with a filler such as epoxy or silicone to prevent resin sag during thermocompression bonding. After thermocompression bonding, after removing the filling material, the through holes 105,1
A resin paste 108 made by mixing copper powder or silver powder into 05a is filled by printing or using a filling machine, and a solder mask 109 mainly composed of epoxy resin or the like is printed to complete the multilayer printed wiring board G. .
なお、位置決め貫通孔１０３，１０３ａ，１０
３ｂは、積層成形時に該貫通孔１０３，１０３
ａ，１０３ｂにガイドピンを通して成形すること
によつて、各材料がずれることを防止するもので
ある。また、上記絶縁性のシート１０２にジアリ
ルフタレート樹脂を含浸させているが、同じ耐熱
性の樹脂としてポリイミドを使用し、上記エポキ
シ樹脂と併用して多層プリント配線板を製造した
場合には、ポリイミドと導電回路との密着性及び
ポリイミド層とエポキシ層との密着性のいずれも
が、0.5〜1.2Kg／cmと不十分であり、使用できな
い。 Note that the positioning through holes 103, 103a, 10
3b is the through hole 103, 103 during lamination molding.
By passing guide pins through a and 103b, each material is prevented from shifting. Furthermore, although the insulating sheet 102 is impregnated with diallyl phthalate resin, when polyimide is used as the same heat-resistant resin and used in combination with the epoxy resin to manufacture a multilayer printed wiring board, polyimide and Both the adhesion to the conductive circuit and the adhesion between the polyimide layer and the epoxy layer are insufficient at 0.5 to 1.2 kg/cm, and cannot be used.
次に、上記のようにして製造する多層プリント
配線板における電気的接続方式および電子素子の
搭載方式について説明する。 Next, the electrical connection system and electronic element mounting system in the multilayer printed wiring board manufactured as described above will be explained.
第２図〜第４図は、多層プリント配線板の各層
の電気的接続方式を、断面により示す。 FIGS. 2 to 4 show, in cross-section, the electrical connection method of each layer of a multilayer printed wiring board.
第２図は、スルーホールメツキによる回路の接
続のない、もつとも接近した層間の電気的接続方
式を示す。絶縁板１０２ａ上に形成された導電回
路１０７上に、貫通孔１０５を有する絶縁シート
１０２を加熱・加圧成形した後、貫通孔１０５に
樹脂系導電ペースト１０８を印刷又は充填機にて
充填し電気的接続を得るものである。 FIG. 2 shows an electrical connection scheme between closely spaced layers without through-hole plating circuit connections. After heating and press-molding an insulating sheet 102 having through-holes 105 on a conductive circuit 107 formed on an insulating plate 102a, the through-holes 105 are filled with resin-based conductive paste 108 by printing or using a filling machine. This is a way to get a positive connection.
第３図は、片面プリント配線板の導電回路と両
面プリント配線板の導電回路との間の電気的接続
方式を示す。片面プリント配線板上の導電回路１
０４を両面プリント配線板の導電回路１０７ａの
電気的接続は、導電回路１０７ａと導電回路１０
７の間をスルーホールメツキ１０６が接続し、ま
た、該導電回路１０７と片面プリント配線板上の
導電回路１０４とを、貫通孔１０５ｄに充填され
た樹脂系導電ペースト１０８が接続することによ
つて行われる。 FIG. 3 shows an electrical connection system between a conductive circuit on a single-sided printed wiring board and a conductive circuit on a double-sided printed wiring board. Conductive circuit 1 on one-sided printed wiring board
The electrical connection of the conductive circuit 107a of the double-sided printed wiring board 04 is between the conductive circuit 107a and the conductive circuit 10.
Through hole plating 106 connects between 7 and conductive circuit 107 and conductive circuit 104 on the single-sided printed wiring board are connected by resin conductive paste 108 filled in through hole 105d. It will be done.
第４図は、最外層部の導電回路と対向側の最外
層部の導電回路とを電気的に接続するためのもの
である。すなわち、片面プリント配線板上の導電
回路１０４と片面プリント配線板上の導電回路１
０４ａとは、両側から充填された樹脂系導電ペー
スト１０８、両面プリント配線板の導電回路１０
７ａと導電回路１０７の間を接続するスルーホー
ルメツキ１０６により電気的に接続される。 FIG. 4 is for electrically connecting the conductive circuit in the outermost layer and the conductive circuit in the opposing outermost layer. That is, the conductive circuit 104 on the single-sided printed wiring board and the conductive circuit 1 on the single-sided printed wiring board
04a refers to the resin-based conductive paste 108 filled from both sides and the conductive circuit 10 of the double-sided printed wiring board.
7a and the conductive circuit 107 are electrically connected by through-hole plating 106.
なお、第５図及び第６図に電子素子を搭載した
時の状態を示す。 Note that FIGS. 5 and 6 show the state when electronic elements are mounted.
この場合樹脂系導電ペーストの代わりに半田１
１０が充填される。電子素子１１１のリード線１
１２を貫通孔に挿入した後、貫通孔に半田１１０
を充填すると、各導電回路の電気的接続及び電子
素子１１１の固定が同時に行われる。 In this case, solder 1 is used instead of resin-based conductive paste.
10 is filled. Lead wire 1 of electronic element 111
12 into the through hole, solder 110 into the through hole.
When the conductive circuits are filled, electrical connection of each conductive circuit and fixation of the electronic element 111 are simultaneously performed.
第６図Ａは、樹脂系導電ペーストによる電気的
接続と半田による電気的接続とを併用した実施例
を示し、第６図Ｂは、そのＸ−Ｘ断面図を示す。 FIG. 6A shows an embodiment in which electrical connections using a resin-based conductive paste and solder are used together, and FIG. 6B shows a sectional view taken along the line XX.
片面プリント配線板上の導電回路１０４と両面
プリント配線板の導電回路１０７とは、樹脂系導
電ペースト１０８によつて電気的に接続され、そ
の他の部分は、半田１１０によつて電気的に接続
されている。 The conductive circuit 104 on the single-sided printed wiring board and the conductive circuit 107 on the double-sided printed wiring board are electrically connected by resin-based conductive paste 108, and other parts are electrically connected by solder 110. ing.
以上説明したように、本発明によれば、内層導
電回路と外層導電回路との間にスルーホールメツ
キを施す必要がないので貫通孔の形成時にスミア
現象を起こすことがなく、また、内層部のランド
部が接続面となるため、内層剥離現象もなくな
る。
As explained above, according to the present invention, there is no need to perform through-hole plating between the inner layer conductive circuit and the outer layer conductive circuit, so smear phenomenon does not occur when forming the through hole, and the inner layer portion Since the land portion becomes the connection surface, the inner layer peeling phenomenon is also eliminated.
第１図は本発明の多層プリント配線板の製造工
程の１実施例を示す図、第２図、第３図および第
４図は多層プリント配線板の各層の電気的接続方
法を示す断面図、第５図は、電子素子を搭載した
時の状態を示す断面図、第６図Ａは、樹脂系導電
ペーストによる電気的接続と半田による電気的接
続とを併用した実施例を示す斜視図、第６図Ｂ
は、そのＸ−Ｘ断面図、第７図は従来の多層プリ
ント配線板の製造方法を示す図である。
１０１……金属箔、１０２……絶縁シート、１
０２ａ……絶縁板、１０３，１０３ａ……貫通
孔、１０４，１０４ａ……導電回路、１０５，１
０５ａ，１０５ｃ……貫通孔、１０６……スルー
ホールメツキ、１０７，１０７ａ……導電回路、
１０８……樹脂系ペースト、１０９……ソルダー
マスク、１１０……半田、１１１……電子素子、
１１２……リード線。
FIG. 1 is a diagram showing one embodiment of the manufacturing process of a multilayer printed wiring board of the present invention, FIGS. 2, 3, and 4 are sectional views showing a method of electrically connecting each layer of the multilayer printed wiring board, FIG. 5 is a cross-sectional view showing the state when electronic elements are mounted, FIG. Figure 6B
is a sectional view taken along the line X-X, and FIG. 7 is a diagram showing a conventional method for manufacturing a multilayer printed wiring board. 101...Metal foil, 102...Insulating sheet, 1
02a... Insulating plate, 103, 103a... Through hole, 104, 104a... Conductive circuit, 105, 1
05a, 105c...through hole, 106...through hole plating, 107, 107a...conductive circuit,
108...Resin paste, 109...Solder mask, 110...Solder, 111...Electronic element,
112... Lead wire.
Claims (1)
孔を形成し、スルーホールメツキを施した後、前
記金属箔に第１の導電回路を設けて両面プリント
配線板を形成し、一方、含浸時において半硬化性
を示す樹脂を含浸したシートに前記第１の貫通孔
より大径の第２の貫通孔を設けるとともに第２の
導電回路を設けて片面プリント配線板を形成し、
前記第１および第２の貫通孔を位置合わせして前
記両面プリント配線板と片面プリント配線板を熱
圧着した後、前記第１および第２の貫通孔に導電
性物質を充填することにより前記第１の導電回路
と第２の導電回路とを電気的に接続したことを特
徴とする多層プリント配線板の製造方法。 ２ 上記半硬化性を示す樹脂がジアリルフタレー
ト樹脂系組成物であることを特徴とする特許請求
の範囲第１項記載の多層プリント配線板の製造方
法。[Scope of Claims] 1. After forming a first through hole in an insulating plate with metal foil laminated on both sides and performing through-hole plating, a first conductive circuit is provided on the metal foil to form a double-sided printed wiring board. On the other hand, a sheet impregnated with a resin that exhibits semi-curing property during impregnation is provided with a second through hole having a larger diameter than the first through hole, and a second conductive circuit is provided to form a single-sided printed wiring board. form,
After the first and second through holes are aligned and the double-sided printed wiring board and the single-sided printed wiring board are bonded by thermocompression, the first and second through holes are filled with a conductive material. A method for manufacturing a multilayer printed wiring board, characterized in that a first conductive circuit and a second conductive circuit are electrically connected. 2. The method for manufacturing a multilayer printed wiring board according to claim 1, wherein the semi-curable resin is a diallyl phthalate resin composition.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24689387A JPS6489597A (en) | 1987-09-30 | 1987-09-30 | Manufacture of multilayer printed wiring board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP24689387A JPS6489597A (en) | 1987-09-30 | 1987-09-30 | Manufacture of multilayer printed wiring board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6489597A JPS6489597A (en) | 1989-04-04 |
| JPH0573360B2 true JPH0573360B2 (en) | 1993-10-14 |
Family
ID=17155308
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP24689387A Granted JPS6489597A (en) | 1987-09-30 | 1987-09-30 | Manufacture of multilayer printed wiring board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6489597A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6252176B1 (en) | 1996-04-19 | 2001-06-26 | Fuji Xerox Co., Ltd. | Printed wiring board, and manufacture thereof |
-
1987
- 1987-09-30 JP JP24689387A patent/JPS6489597A/en active Granted
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6252176B1 (en) | 1996-04-19 | 2001-06-26 | Fuji Xerox Co., Ltd. | Printed wiring board, and manufacture thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6489597A (en) | 1989-04-04 |
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| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |