JPH0573575U - Phase angle transducer - Google Patents

Abstract

(57) [Summary] [Object] To provide an improved phase angle transducer for simplifying the configuration of the phase angle transducer which limits the output when the measured current becomes smaller than a predetermined magnitude. [Structure] First square wave converting means for converting a measured voltage into a square wave and outputting it as a square wave voltage; second square wave converting means for converting a measured current into a square wave and outputting it as a square wave current; Flip-flop means for inputting the square wave voltage and the preceding square wave current and outputting a square wave phase signal proportional to the phase difference between them, and an inversion for converting this square wave phase signal into a DC voltage proportional thereto. The amplifier means and the limiting means inserted between the inverting conversion means and the flip-flop means to limit the output of the voltage conversion means when the measured current becomes smaller than a predetermined value. It was done like this.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a power phase angle transducer for measuring the phase angle of a measured voltage and a measured current, and more particularly to a phase angle transducer configuration for limiting the output when the measured current becomes smaller than a predetermined magnitude. A phase angle transducer modified for simplicity.

[0002]

[Prior Art]

FIG. 3 is a block diagram showing the configuration of a conventional phase angle transducer. Measuring voltage V _M is applied between the measuring terminals 1 and 2, is a voltage transformer in the transformer T _v, is output to a square wave converting circuit RCV as a predetermined size.

The measurement current A _M is applied between the measurement terminals 3 and 4, is transformed by the transformer T _i into a voltage of a predetermined magnitude, and is output to the square wave conversion circuit RCA.

The square wave conversion circuit RCV converts the voltage-transformed measured voltage V _M into a square wave voltage V _VR using the zero-cross method or the like, and outputs it to the set terminal S of the flip-flop FF.

The square wave conversion circuit RCA also converts the current-transformed measured voltage A _M into a square wave voltage V _AR by using the zero-cross method or the like, and outputs it to the reset terminal R of the flip-flop FF.

The flip-flop FF converts a square wave voltage V _DR corresponding to the phase difference between these square wave voltages V _VR and V _AR and a square wave voltage <V _DR > which is an inverted voltage thereof and outputs them respectively. Output to the terminal Q and the inverting output terminal <Q>.

The CDC is a current detection circuit, and this current detection circuit CDC detects whether or not the measured current A _M is smaller than a reference voltage V _r which is a predetermined value, and becomes smaller than the reference voltage V _r. The limit signal V _C1 which becomes a low level when is output.

The square wave voltage V _DR is input to the first input end of the NAND gate G ₁ and the limiting signal V _C1 is input to the second input end of the NAND gate G ₁ , and the NAND gate G ₁ executes these logical operations to perform a differential amplifier operation. Output to the first input terminal of Q ₁ .

The square wave voltage <V _DR > is input to the first input terminal of the NAND gate G ₂ and the limiting signal V _C1 is input to the second input terminal of the NAND gate G ₂ , and the NAND gate G ₂ executes these logical operations to obtain the difference. The signal is output to the second input terminal of the dynamic amplifier Q ₁ .

The differential amplifier Q ₁ is composed of an operational amplifier OA ₁ and resistors R ₁ to R ₄ . Inverting input of the operational amplifier OA ₁ (-) is connected with the NAND gate connected at the output end and the resistance R ₁ in G ₁ Rutotomoni operational amplifier OA ₁ of the output terminal 5 and the resistor R _2.

The non-inverting input terminal (+) of the operational amplifier OA ₁ is connected to the output terminal of the NAND gate G _{2 by} the resistor R ₃ and the common potential point COM by the resistor R ₄ . Then, the DC voltage V _P1 corresponding to the phase difference between the measured voltage V _M and the measured current A _M is obtained at the output terminal 5 of the operational amplifier OA ₁ .

In the above configuration, normally, the square wave voltage V _DR corresponding to the phase difference between the measurement voltage V _M and the measurement current A _M appearing at the output terminal Q and the inverting output terminal <Q> of the flip-flop FF and The square wave voltage <V _DR > which is the inverse of the above is output to the differential amplifier Q ₁ via the NAND gates G ₁ and G ₂ .

The differential amplifier Q ₁ differentially amplifies the difference between the outputs of the NAND gates G ₁ and G ₂ and outputs a DC voltage corresponding to the phase difference between the measurement voltage V _M and the measurement current A _M to the output terminal 5. _Output as V _P1 .

However, when the measured current A _M drops below the predetermined reference voltage V _r , the current detection circuit CDC detects this and outputs the limiting signal V _C1 to the NAND gates G ₁ and G ₂ , so that the flip-flop is turned on. The outputs of the NAND gates G ₁ and G ₂ are maintained at the same level and high level regardless of the output of the flip-flop FF, and the differential amplifier Q ₁ calculates the difference between them to make the DC voltage V _P1 zero. ..

[0015]

[Problems to be solved by the device]

However, the phase angle transducer as described above uses two limit gates G ₁ and G ₁ by using the limiting signal V _{C 1} output from the current detection circuit CDC when the measured current A _M drops below the predetermined reference voltage V _{r. Since 2} is turned off, a differential amplifier is required, which complicates the circuit, increases the number of parts, and causes a cost increase.

[0016]

[Means for Solving the Problems]

 The present invention has, as a configuration for solving the above problems, a first square wave converting means for converting a measured voltage into a square wave and outputting it as a square wave voltage, and a square wave current for converting a measured current into a square wave. Second square wave converting means, flip-flop means for inputting the square wave voltage and the square wave current, and outputting a square wave phase signal proportional to the phase difference between them, and the square wave converting means. An inverting amplifying means for converting the phase signal into a DC voltage proportional to this, and an inverting amplifying means inserted between this inverting converting means and the preceding flip-flop means, and when the measured current becomes smaller than a predetermined value, A limiting means for limiting the output of the voltage converting means is provided.

[0017]

[Work]

 The first square wave conversion means converts the measured voltage into a square wave and outputs it as a square wave voltage, and the second square wave conversion means converts the measured current into a square wave and outputs it as a square wave current. The flip-flop means receives the square wave voltage and the square wave current, and outputs a square wave phase signal proportional to the phase difference between them.

Then, the inverting amplification means converts this square wave phase signal into a direct current voltage proportional thereto. On the other hand, the limiting means inserted between the inverting conversion means and the previous flip-flop means limits the output of the previous voltage conversion means when the previous measured current becomes smaller than a predetermined value.

[0019]

【Example】

 Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. The parts having the same functions as those of the conventional phase angle transducer shown in FIG. 3 are designated by the same reference numerals and the description thereof will be appropriately omitted.

The output terminal Q of the flip-flop FF is connected to an input terminal of the tri-state gate G _3, the control terminal of the tri-state gate G ₃ are connected to the output terminal of the current detection circuit CDC.

The output terminal of the tri-state gate G ₃ is connected to the common conduction point COM by the resistor R ₅ and the non-inverting input terminal (+) is connected to the common potential point COM via the resistor R ₆ It is connected to the inverting input terminal (-) of OA ₂ .

A parallel circuit of a resistor R ₇ and a capacitor C ₁ is connected between the inverting input terminal (−) and the output terminal of the operational amplifier OA ₂ .

The operational amplifier OA ₂ , the resistor R ₅ , the resistor R ₇ , the capacitor C _{1 and the} like constitute an inverting amplifier Q ₂ . The other circuits have substantially the same configuration as the phase angle transducer shown in FIG.

In the above configuration, in the normal case, the square wave voltage V _DR corresponding to the phase difference between the measurement voltage V _M and the measurement current A _M is output from the flip-flop FF to the tri-state gate G ₃ . The inverting amplifier Q ₂ amplifies and smoothes this, and outputs it to the output terminal 5 as a DC voltage V _p2 .

Next, the measurement current A_MIs the reference voltage V_rWhen it becomes lower than the value corresponding to the current detection circuit CDC,_C1Is set to low level, so tristate gate G ₃ Turns off and the resistance R_FiveThe voltage across it becomes zero. Therefore, the inverting amplifier Q₂ Input voltage becomes zero and the inverting amplifier Q₂Is the DC voltage V_p2Is set to zero.

In the configuration shown in FIG. 3, two gates G are provided.₁, G₂With four high precision resistors R ₁ ~ R_FourDifferential amplifier Q₁In this embodiment, one gate G₃And two resistors R₆, R₇Since it is only necessary to use, the circuit can be simplified, the number of parts can be reduced, and the cost can be reduced.

FIG. 2 is a block diagram showing a main part of another embodiment of the present invention. This is obtained by replacing the tristate gate G _{3 with} an analog switch SW between the flip-flop FF and the inverting amplifier Q ₂ .

The analog switch SW applies the limiting signal V _C1 output from the current detection circuit CDC via the inverter G ₄ to control the opening / closing thereof. It operates similarly to the case shown in FIG.

[0029]

[Effect of the device]

 As described above in detail with the embodiments, according to the present invention, compared with the conventional case where two gates are used and a differential amplifier composed of four high precision resistors is used. Then, only one gate and two resistors are needed, which simplifies the circuit, reduces the number of components, and contributes to cost reduction.

[Brief description of drawings]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention.

FIG. 2 is a block diagram showing a configuration of a modified embodiment of the embodiment shown in FIG.

FIG. 3 is a block diagram showing a configuration of a conventional phase angle transducer.

[Explanation of symbols]

RCV, RCA Square wave conversion circuit CDC Current detection circuit FF Flip-flop Q ₁ Differential amplifier Q ₂ Inversion amplifier G ₁ , G ₂ NAND gate G ₃ Tri-state gate

Claims (1)

[Scope of utility model registration request] 1. A first square wave converting means for converting a measured voltage into a square wave and outputting it as a square wave voltage, and a second square wave converting means for converting a measured current into a square wave and outputting it as a square wave current. Flip-flop means for inputting the square-wave voltage and the square-wave current and outputting a square-wave phase signal proportional to the phase difference between them, and an inversion for converting the square-wave phase signal into a direct-current voltage proportional thereto It further comprises an amplifying means and a limiting means inserted between the inverting converting means and the flip-flop means for limiting the output of the voltage converting means when the measured current becomes smaller than a predetermined value. And the phase angle transducer.