JPH0574330A - Semiconductor electron emitter - Google Patents

Abstract

(57) [Summary] [Purpose] With the simplification of the device structure and manufacturing process,
Enables high-speed device operation. [Structure] A high concentration P-type semiconductor substrate 101 is provided with a high concentration P
The type semiconductor region 103 and the P-type semiconductor region 104 that supplies carriers to the high-concentration P-type semiconductor region 103 are arranged in contact with each other, and the high-concentration P-type semiconductor regions 103 and P
A low-concentration N-type semiconductor region 102 is arranged around the type semiconductor region 104 toward the outside, and a Schottky electrode 108 which is a metal film forming a Schottky barrier junction with the high-concentration P-type semiconductor region 103 on the device surface. Distribute. The relationship between the carrier concentrations of the respective semiconductor regions is high concentration P type semiconductor region 103> P type semiconductor region 104> low concentration N type semiconductor region 102.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor electron-emitting device, and more particularly to a semiconductor electron-emitting device which causes avalanche breakdown to emit hot electrons.

[0002]

2. Description of the Related Art Among conventional semiconductor electron-emitting devices, devices using an avalanche breakdown mechanism include, for example, US Pat. No. 4,259,678 and US Pat. No. 4,303,930.
What is described in the issue is known. In these semiconductor electron-emitting devices, a P-type semiconductor layer and an N-type semiconductor layer are formed on a semiconductor substrate, and cesium or the like is attached to the surface of the N-type semiconductor layer to lower the work function of the surface, thereby reducing electrons. The discharge part is formed. Then, a reverse bias voltage is applied to both ends of the PN junction formed by the P-type semiconductor layer and the N-type semiconductor layer to cause avalanche breakdown, so that electrons are hotened and the electrons are emitted from the electron emission portion and are perpendicular to the surface of the semiconductor substrate. The electron is emitted in the direction.

Separately, as disclosed in JP-A-01-220328, a P-type semiconductor and a metal material, or a P-type semiconductor and a metal compound form a Schottky barrier junction, and both ends of the Schottky barrier junction are formed. There is a method in which a reverse bias voltage is applied to cause avalanche breakdown, so that electrons are hotened and electrons are emitted from an electron emission portion in a direction perpendicular to the semiconductor substrate surface.

The conventional semiconductor electron-emitting device described above has a P
When a reverse bias voltage is applied across the N-junction or the Schottky barrier junction, avalanche breakdown occurs in the high-concentration P-type semiconductor region where the depletion layer width is thinnest, and electrons with high energy generated there are generated from the solid surface. It is to be released to the outside. However, PN
Since the shape of the depletion layer around the junction or the Schottky barrier junction has a radius of curvature determined by the carrier concentration of the semiconductor and the applied voltage, the electric field concentrates more than other portions of the depletion layer. Therefore, at an applied voltage lower than the avalanche breakdown that is originally required in the high-concentration P-type semiconductor region, breakdown or current leakage occurs around the depletion layer, deteriorating the device characteristics.

In the electron-emitting device having the PN junction or the Schottky barrier junction, the carrier concentration of the P-type semiconductor around the high-concentration P-type semiconductor region that causes avalanche breakdown is reduced to increase the radius of curvature around the depletion layer. Although it is possible to prevent breakdown at a low voltage there, the electric resistance value between the electrode for supplying carriers and the high-concentration P-type semiconductor region causing avalanche breakdown is increased, and the operation of the device is increased. Not only the voltage rises,
The problem of deterioration of element characteristics due to generation of Joule heat occurs.

Therefore, in the conventional device, it is inconvenient to extremely reduce the carrier concentration in the P-type semiconductor region around the high-concentration P-type semiconductor region. The high-concentration N-type semiconductor guard ring structure is formed so as to be concentric with the region. As a result, a depletion layer is formed continuously from the high-concentration P-type semiconductor region to the outside with the P-type semiconductor region and the high-concentration N-type semiconductor region, and the outermost radius of curvature is formed to be large, so that the depletion layer is surrounded. The breakdown and current leakage were prevented.

[0007]

In the device structure of the conventional semiconductor electron-emitting device described above, ion implantation or thermal diffusion for forming the ring-shaped N-type semiconductor region (guard ring structure) at a high concentration is performed. Manufacturing process and its high concentration N
A step of forming an ohmic junction electrode for applying a voltage to the guard ring of the type semiconductor is required, and there is a problem that the manufacturing process becomes complicated.

Further, a large area is required for forming the guard ring and its ohmic contact electrode, and it has been difficult to miniaturize the element.

The present invention has been made in view of the problems of the above-mentioned conventional technique, and provides a small-sized semiconductor electron-emitting device which enables the device structure and manufacturing process to be simplified and the device operation to be speeded up. The purpose is to do.

[0010]

The semiconductor electron-emitting device of the present invention has a semiconductor electron-emitting device that has an electron-emitting portion composed of a Schottky barrier junction of a metal material or a metal compound material and a semiconductor and emits electrons from a solid surface. In the device, the electron emission portion includes a first P-type semiconductor region that forms the Schottky barrier junction and causes avalanche breakdown.
Further, in contact with the first P-type semiconductor region, the first P-type semiconductor region is formed.
A second P-type semiconductor region for supplying carriers to the P-type semiconductor region, and a PN junction with the first P-type semiconductor region located around the first P-type semiconductor region and forming the metal material. Alternatively, it has a metal compound material and an N-type semiconductor region forming a Schottky barrier junction,
The relationship between the carrier concentrations of the P-type semiconductor region and the N-type semiconductor region is as follows: (first P-type semiconductor region)> (second P-type semiconductor region)
> (N-type semiconductor region) or (second P-type semiconductor region) ≧ (first P-type semiconductor region)
> (N-type semiconductor region).

Further, the semiconductor electron-emitting device of the present invention is N
In a semiconductor electron-emitting device that has an electron-emitting portion made of a PN junction between a p-type semiconductor and a p-type semiconductor and emits electrons from a solid surface, the electron-emitting portion is a first n-type semiconductor located on the solid surface. A first P region that forms a PN junction with the region and the first N-type semiconductor region to cause avalanche breakdown.
A second P-type semiconductor region, which is in contact with the first P-type semiconductor region and supplies carriers to the first P-type semiconductor region, and the first P-type semiconductor region. Located around the first P-type semiconductor region and P
A second N-type semiconductor region forming an N-junction, and the carrier concentration relationship between the first and second P-type semiconductor regions and the first and second N-type semiconductor regions is (1st) N-type semiconductor region)> (first P-type semiconductor region)
> (Second P-type semiconductor region)> (second N-type semiconductor region) or (first N-type semiconductor region)> (second P-type semiconductor region) ≧
(First P-type semiconductor region)> (second N-type semiconductor region).

[0012]

The present invention takes the following means in order to solve the above problems.

In the semiconductor electron-emitting device, an N-type semiconductor region having a low carrier concentration is formed around the high-concentration first P-type semiconductor region which causes avalanche breakdown. As a result, when the operating voltage is applied, the first P
The periphery of the depletion layer formed in the type semiconductor region is continuously connected to and protected by the depletion layer formed by the PN junction in the periphery thereof, so that breakdown and current leakage do not occur around the first P type semiconductor region. It won't happen. Therefore, an element structure that does not require a guard ring structure of a high-concentration N-type semiconductor, which has been inconvenient from the viewpoint of simplifying the manufacturing process and downsizing the element, can be realized.

Here, by forming the second P-type semiconductor region as a carrier supply path to the first P-type semiconductor region, the series resistance value of the element can be set to an appropriate value. Therefore, the operating speed can be increased.

[0015]

Embodiments of the present invention will now be described with reference to the drawings.

(Embodiment 1) FIG. 1 is a sectional view showing a Schottky barrier junction type semiconductor emitting device which is a first embodiment of the present invention.

The semiconductor electron-emitting device of this embodiment has a cylindrical first, substantially central portion on a high-concentration P-type semiconductor substrate 101.
The high-concentration P-type semiconductor region 103, which is the P-type semiconductor region, and the P-type semiconductor region 104, which is the second P-type semiconductor region that supplies carriers to the high-concentration P-type semiconductor region 103, are arranged in contact with each other, Furthermore, the high-concentration P-type semiconductor region 10
3 and the P-type semiconductor region 104, the low-concentration N-type semiconductor region 102 that is an N-type semiconductor region is arranged concentrically toward the outside, and the high-concentration P region is formed on the device surface.
A Schottky barrier junction type device is provided by arranging a Schottky electrode 108 which is a metal film forming a Schottky barrier junction with the type semiconductor region 103.

Further, in the semiconductor electron emission device of this embodiment, the ohmic junction electrode 106 for the high concentration P-type semiconductor substrate 101 and the electrode wiring 107 for the Schottky electrode 108 for applying a reverse voltage to the Schottky barrier junction. And the reverse voltage is applied to the power source 1
It is applied from 09.

The electrode wiring 107 has the above-mentioned P
The Schottky electrode 108 is in contact with the insulating film 105 formed on the low-concentration N-type semiconductor region 102 in order to prevent a short circuit with each semiconductor region of the mold. Also, in the figure, 110
Shows the shape of the edge of the depletion layer when the reverse voltage is applied.

Now, the electron emission process in the semiconductor electron emission device using the Schottky barrier junction will be described with reference to FIG.

By applying a reverse bias voltage to the Schottky diode formed by forming a Schottky barrier junction with the P-type semiconductor, the bottom E _C of the conduction band of the P-type semiconductor is the vacuum level E of the metal electrode forming the Schottky barrier. _The energy level becomes higher than _VAC and avalanche breakdown occurs.
The electrons generated by the avalanche breakdown are semiconductor-
Energy higher than the lattice temperature is obtained by the electric field in the depletion layer generated at the metal electrode interface, and the energy is injected from the P-type semiconductor to the metal electrode forming the Schottky barrier junction. Electrons having an energy larger than the work function of the surface of the metal electrode forming the Schottky barrier junction are emitted into the vacuum. Therefore, as described above, treating the metal electrode surface with a low work function leads to an increase in electron emission amount.

An example of a specific manufacturing process of the semiconductor electron-emitting device shown in FIG. 1 will be described below.

(1) Zinc-doped high-concentration P-type semiconductor substrate 101 (G) having a carrier concentration of 5 × 10 ¹⁸ cm ⁻³
A low-concentration N-type GaAs semiconductor layer having a silicon (Si) concentration of 1 × 10 ¹⁵ cm ⁻³ or less was grown on the aAs) by a molecular beam epitaxial growth (MBE) method to a thickness of 0.6 μm. This low-concentration N-type GaAs semiconductor layer will later become the low-concentration N-type semiconductor region 102.

(2) In the region corresponding to the high-concentration P-type semiconductor region 103, the Be concentration is almost uniformly 2 × 10 ¹⁸ cm ^−3.
So that the Be ions accelerated to 40 keV were injected by the focused ion beam (FIB) injection method.

(3) A region corresponding to the P-type semiconductor region 104 reaches the high-concentration P-type semiconductor substrate 101, and B
FI so that the concentration of each becomes 1 × 10 ¹⁸ cm ⁻³
Be ions were accelerated by the B implantation method to 160 keV.

(4) SiO ₂ is deposited as the insulating film 105 by sputtering to a thickness of about 0.2 μm, and then 850
The injection part was activated by heat treatment at 10 ° C. for 10 seconds.

(5) Gold (Au) / chromium (Cr) is vacuum-deposited on the back surface of the high-concentration P-type semiconductor substrate 101 to form 35.
The ohmic bonding electrode 106 was formed by heat treatment at 0 ° C. for 5 minutes.

(6) Aluminum is vacuum-deposited on the insulating film 105 and is formed by an ordinary photolithography method.
The openings of the electrode wiring 107 and the insulating film 105 were formed.

(7) Tungsten (W) is selected as a material for forming a Schottky barrier junction with respect to the P-type semiconductor region 104 made of P-type GaAs semiconductor and the high-concentration P-type semiconductor region 103, and electrons are filled in the opening. A Schottky electrode 108 having a thickness of 8 nm was formed by beam evaporation and ordinary photolithography.

[0030] Such a semiconductor electron emitting device manufactured by the established degree of vacuum of about 1 × vacuum chamber was maintained at 10 ^{over 7} Torr, ohmic junction electrode 1 by the power source 109
When 7V was applied between 06 and the electrode wiring 109,
Schottky electrode 1 above the high-concentration P-type semiconductor region 103
An electron emission of about 15 pA was observed from the 08 surface. When the applied voltage (device voltage) was sequentially increased to 10 V, the electron emission amount (emission current) was also gradually increased to about 100 pA as shown in FIG. It is considered that the depletion layer 110 at the time of applying the device voltage is expanded by about 0.04 μm from the Schottky barrier interface with the Schottky electrode 108 in the high concentration P-type semiconductor region 103. Since the surroundings are protected by the thick depletion layer formed by the PN junction, the electric field is most concentrated in the high-concentration P-type semiconductor region 103, and avalanche breakdown occurs efficiently in this region.

Under the above manufacturing conditions, only the Be concentration of the P-type semiconductor region 104, which is the second P-type semiconductor region that supplies carriers to the high-concentration P-type semiconductor region 103, which is the first P-type semiconductor region, is reduced. FIG. 4 shows the electric characteristics when a semiconductor electron-emitting device manufactured by changing the size to 3 × 10 ¹⁸ cm ⁻³ was installed in the same vacuum chamber. A device voltage 5 is applied to the semiconductor electron-emitting device by the power supply 109.
When V was applied, about 20 pA (emission current) of electron emission was observed from the surface of the Schottky electrode 108 above the high-concentration P-type semiconductor region 103. Further, when the device voltage was sequentially increased to 7 V, the emission current was also sequentially increased to about 100 pA.

Further, in this embodiment, the electrode wiring 107
By providing another electrode via an insulating film and setting a potential difference between the electrode and the electrode wiring 107, it becomes possible to regulate the flight direction and kinetic energy of the electron emitted from the electron emitting portion. .. Thus, by changing the carrier concentration of the P-type semiconductor region 104, it is possible to define the current-voltage characteristics of the semiconductor emitting device. Further, by decreasing the resistance value of the P-type semiconductor region 104, the series resistance value of the element can be decreased and the operation speed can be increased.

In the embodiment described above, GaA is used as the semiconductor.
Although an example using s is shown, in principle, other semiconductor materials such as Si, Ge, GaP, AlAs, and GaAs can be used.
P, AlGaAs, SiC, BP, AlN, diamond, etc. are applicable, and in particular, indirect transition type material having a large band gap is suitable.

As the material of the ohmic bonding electrode 106,
Other than tungsten (W), Al, Au, LaB ₆ or any other material that is commonly known and that forms a Schottky barrier junction with the P-type semiconductor may be used. However, as described above, the smaller the work function of the electrode surface, the higher the electron emission efficiency. Therefore, when the work function of the material is large, the surface of the electrode is thinly coated with a low work function material such as Cs to emit electrons. Efficiency is improved.

(Embodiment 2) FIG. 5 is a sectional view showing a PN junction type semiconductor electron-emitting device which is a second embodiment of the present invention.

The semiconductor electron-emitting device of the present embodiment has a cylindrical first, substantially central portion on a high-concentration P-type semiconductor substrate 501.
A high-concentration P-type semiconductor region 503 which is a P-type semiconductor region of the above and a P-type semiconductor region 504 which is a second P-type semiconductor region which supplies carriers to the high-concentration P-type semiconductor region 503 are arranged in contact with each other, Further, the high-concentration P-type semiconductor region 50
3 and the P-type semiconductor region 504, a low-concentration N-type semiconductor region 502 which is a second N-type semiconductor region is arranged concentrically toward the outside, and a PN with the high-concentration P-type semiconductor region 503 is formed. This is a PN junction type device including an electron emitting portion including a high concentration N type semiconductor region 505 which is a first N type semiconductor region forming a junction.

Further, in the semiconductor electron-emitting device of this embodiment, the ohmic junction electrode 5 for the high-concentration P-type semiconductor substrate 501 for applying a reverse voltage to the PN junction portion.
07, an ohmic junction electrode 508 for the high-concentration N-type semiconductor region 505, and a low work function coating 509 formed on the surface of the high-concentration N-type semiconductor region 505 are provided, and the reverse voltage is supplied from a power supply 510. Is applied.

The ohmic contact electrode 508 has an insulating film 506 formed along the surface edge of the low-concentration P-type semiconductor region 502 in order to prevent a short circuit with the low-concentration N-type semiconductor region 502. The high concentration N-type semiconductor region 505
Have been touched. Reference numeral 511 in the figure shows the shape of the depletion layer edge in the state in which the reverse voltage is applied.

An example of a specific manufacturing process of the PN junction type semiconductor electron-emitting device of this embodiment will be described below.

(1) Zn-doped high-concentration P-type semiconductor substrate 501 (GaAs) having a carrier concentration of 5 × 10 ¹⁸ cm ⁻³
A low-concentration N-type GaAs semiconductor layer having a Si concentration of 5 × 10 ¹⁵ cm ⁻³ or less was grown to a thickness of 0.6 μm by the MBE method. This low-concentration N-type GaAs semiconductor layer will later become the low-concentration N-type semiconductor region 502.

(2) In the region corresponding to the high-concentration P-type semiconductor region 503, the Be concentration is almost uniformly 2 × 10 ¹⁸ cm ^−3.
So that the Be ions accelerated to 40 keV were implanted by the FIB implantation method.

[0042] (3) in a region corresponding to the P-type semiconductor region 504 reaches the high-concentration P-type semiconductor substrate 501, as Be concentration of 5 × 10 ¹⁷ cm ^-3, the 160keV by FIB implantation method Implanted accelerated Be ions.

(4) A region corresponding to the high-concentration N-type semiconductor region 505 has a depth of 10 nm formed by an ordinary ion implantation method.
So that the Si concentration is about 1 × 10 ¹⁹ cm ⁻³
Si ions accelerated to 10 keV were implanted. Since the high-concentration N-type semiconductor region 505 is a region through which electrons generated by avalanche breakdown in the high-concentration P-type semiconductor region 503 thereunder pass, energy loss due to scattering there becomes large when formed thick, The electron emission efficiency deteriorates. Therefore, it is desirable that the ion implantation is performed at a low accelerating voltage, or the surface is etched after the ion implantation so that the thickness is formed to 10 nm or less.
By forming the high-concentration N-type semiconductor region 505, an electron-emitting portion including a PN junction with the high-concentration P-type semiconductor region is formed.

(5) As the insulating film 506, SiO ₂ is deposited by sputtering to a thickness of about 0.2 μm, and then 850
The injection part was activated by heat treatment at 10 ° C. for 10 seconds.

(6) Au / Cr on the back surface of the high-concentration P-type semiconductor substrate 501 as the ohmic contact electrode 507 for the high-concentration P-type semiconductor substrate 501, and the ohmic contact electrode 508 for the high-concentration N-type semiconductor region 505. As Au
/ Ge was vacuum-deposited and subjected to ordinary photolithography etching, and then alloying heat treatment was performed at 350 ° C. for 5 minutes.

(7) Next, the high-concentration N-type semiconductor region 5
A low work function film 509 was formed by vapor-depositing cesium (Cs), which is a low work function material, on the exposed portion of 05 in an ultra-high vacuum by about a monoatomic layer.

The semiconductor electron-emitting device thus manufactured was placed in a vacuum chamber maintained at about 1 × 10 ^-11 Torr or less, and the ohmic bonding electrode 50 was supplied by the power supply 510.
When a device voltage of 6 V was applied between Nos. 7 and 508, the low work function film 509 on the high concentration N-type semiconductor region 505 was formed.
An electron emission of about 0.1 μA was observed from the (Cs) surface. As described above, according to this example, it is possible to form a PN junction type semiconductor electron-emitting device having electron emission characteristics equivalent to those of the conventional semiconductor electron-emitting device and having a simple manufacturing process.

Also in the case of this embodiment, as in the case of the above-described first embodiment, by setting an electrode difference between the ohmic junction electrode 508 and another electrode, the flight direction of electrons and It is possible to regulate kinetic energy.

(Embodiment 3) FIG. 6 is a diagram showing a Schottky barrier type multi-semiconductor electron-emitting device having a plurality of electron-emitting portions, which is a third embodiment of the present invention.
Is a plan view thereof, and (b) is a sectional view taken along line AA ′ of (a).

The multi-semiconductor electron-emitting device of this embodiment is
High-concentration P-type semiconductor region 60 formed on semiconductor substrate 601
Two electron emitting parts 600A, 600B, 600
C and 600D are provided in a matrix.

The electron emitting portions 600A, 600B, 60
Since 0C and 600D have the same configuration, the electron emitting portion 600A will be described as an example.

The electron-emitting portion 600A is arranged in contact with the high-concentration P-type semiconductor region 604A, which is the first P-type semiconductor region, and the high-concentration P-type semiconductor region 604A, and the high-concentration P-type semiconductor region 604A. Second P to supply carriers to
Type semiconductor region 605A which is a type semiconductor region, and the high-concentration P type semiconductor region 604A and P type semiconductor region 60
5A, a low concentration N type semiconductor region 603 which is an N type semiconductor region, and the high concentration P type semiconductor region 604.
Schottky electrode 6 forming a Schottky barrier junction with A
10A and has the same configuration as that of the first embodiment described above.

Further, the high concentration P-type semiconductor region 60 for applying a reverse voltage to the Schottky barrier junction.
Ohmic junction electrode 608 and Schottky electrode 6 for 2
Electrode wiring 609A for 10A is provided.
The electrode wiring 609A is formed on the insulating film 607 formed on the low-concentration N-type semiconductor region 603 in order to prevent a short circuit with the P-type semiconductor regions.
It is in contact with A.

The ohmic contact electrode 608 has a high P concentration.
It is connected to the high-concentration P-type semiconductor region 602 through the type semiconductor region 606, and in the case of the present embodiment, it is provided at two places as shown in FIG. The ohmic junction electrode 608 is formed by the four electron-emitting portions 600.
It is a common electrode for A, 600B, 600C and 600D.

The Schottky electrode 610A is the Schottky electrode 610B, 610C, 610D (610C, 61D) of the other electron emitting portion 600B, 600C, 600D.
0D may be connected in common with (not shown), but in that case,
Since the ohmic junction electrode 608 is common, the electron emission operations of the four electron emission units 600A, 600B, 600C and 600D are controlled simultaneously.
On the other hand, each of the electron emitting portions 600A, 600B, 600C, 6
00D Schottky electrodes 610A, 610B, 610
When C and 610D are independent, each electron emission unit 600
It is possible to control each of A, 600B, 600C, and 600D.

Further, the element surface on which the four electron-emitting portions 600A, 600B, 600C and 600D having the above-mentioned structure are formed is provided on the insulating film 607.
A portion other than the ohmic contact electrode 608 is covered with a gate 612 made of a metal film via a support 611 made of an insulating material. In the gate 612, openings 613A, 613B, and 613B are provided at positions corresponding to above the electron emission portions 600A, 600B, 600C, 600D, respectively.
613C and 613D are formed, and each electron emission part 6 is formed.
Electrons emitted from 00A, 600B, 600C and 600D are emitted from the openings 613A, 613B, 613C and 613D.
It will jump out through.

An example of a specific manufacturing process of the multi-semiconductor electron-emitting device of this embodiment will be described below.

(1) An undoped semi-insulating semiconductor substrate 601 (Ga) with an impurity concentration of 1 × 10 ¹⁴ cm ⁻³ or less
A reverse pattern was formed on As) by a normal photolithography method, and then a normal ion implantation was performed so that the Be concentration became 3 × 10 ¹⁸ cm ⁻³ .

Then, a high-concentration P-type semiconductor region 602 having a long stripe in the X direction was formed by heat treatment at 850 ° C. for 10 seconds.

(2) Si concentration of 1 × 10 by MBE method
GaAs as a low concentration N-type semiconductor region 603 of ¹⁵ cm ^-3
Was grown to a thickness of 0.6 μm.

(3) High concentration P-type semiconductor regions 604A, 6
04B, 604C, so Be concentration of 2 × 10 ¹⁸ cm ^-3 in a region corresponding to 604D, also, P-type semiconductor regions 605A, 605B, 605C, Be concentration of 5 × it is in a region corresponding to 605D To be 10 ¹⁷ cm ^-3 ,
40 keV and 160 k depending on FIB injection method
Be ions accelerated to eV were implanted.

(4) In the region corresponding to the high-concentration P-type semiconductor region 606, the Be concentration from the low-concentration N-type semiconductor region 603 to the high-concentration P-type semiconductor region 602 is approximately 3 × 1.
Be ions were implanted by the FIB implantation method so as to be 0 ¹⁸ cm ⁻³ .

The MBE growth step and the FIB injection step (1) to (4) above were performed without being exposed to the atmosphere because the respective devices were connected by a vacuum tunnel.

Further, high-concentration P-type semiconductor regions 604A, 604B, 604 are subjected to heat treatment at 850 ° C. for 10 seconds.
C, 604D, P-type semiconductor regions 605A, 605B, 6
05C, 605D and the high concentration P-type semiconductor region 606 were activated.

(5) On the low-concentration P-type semiconductor region 603 which has been ion-implanted as described above, as the insulating film 607, SiO ₂ having a thickness of 0.
After depositing 2 μm, each opening was formed by a normal photolithographic etching method.

(6) Au / Cr was vacuum-deposited on the high-concentration P-type semiconductor region 606, and the ohmic bonding electrode 608 was formed by heat treatment at 350 ° C. for 5 minutes.

(7) Electrode wiring 609A, 609B, 60
Aluminum (Al) as 9C and 609D,
High concentration P-type semiconductor regions 604A, 604B, 604C,
Tungsten (W) as a material for forming a Schottky barrier junction with respect to 604D is evaporated by electron beam evaporation to a thickness of 0.5 μm and 8 nm, respectively, and electrode wirings 609A and 609B are formed by a normal photolithography etching method.
609C, 609D and Schottky electrodes 610A, 6
10B, 610C and 610D were formed.

(8) As the support 611 and the gate 612 made of an insulating material, SiO ₂ and tungsten (W) are sequentially deposited by a vacuum vapor deposition method, and openings 613A and 613 are formed by a normal photolithographic etching method.
B, 613C and 613D were formed.

Through the above steps (1) to (8), a multi-semiconductor electron-emitting device having four electron-emitting portions 600A, 600B, 600C and 600D is completed.

Similarly, 20 electron-emitting portions are provided in the X direction,
To prepare a multi-semiconductor electron-emitting devices arranged in ten matrix in the Y direction, the degree of vacuum is established in about 1 × 10 ^{over 7} Torr in the vacuum chamber, the reverse voltage to all the electron-emitting portion 7
When V was applied, a total electron emission of about 20 nA was confirmed. It was also confirmed that by applying a reverse voltage only between the arbitrary ohmic junction electrode 608 and the arbitrary electrode wiring 609, only the element at the intersection emits electrons. As described above, according to this embodiment, it is possible to form an electron-emitting device which has the same electron-emitting characteristics as those of the conventional multi-semiconductor electron-emitting device and which is easy to manufacture.

[0071]

Since the present invention is constructed as described above, it has the following effects.

(1) By forming a low-concentration N-type semiconductor region outside the first P-type semiconductor region having a high carrier concentration, the depletion layer is shaped so as to have the highest electric field in the first P-type semiconductor region. The shape can be easily focused. As a result, avalanche breakdown is efficiently generated only in the first P-type semiconductor region, so that the guard ring structure and its ohmic contact electrode provided in the above-described conventional technique are unnecessary, and the size can be reduced. The manufacturing process is simplified together with the device structure.

(2) By increasing the carrier concentration of the second P-type semiconductor region for supplying carriers to the first P-type semiconductor region, the series resistance value of the device is lowered, so that the operating speed is increased. A fast semiconductor electron emitting device can be provided.

[Brief description of drawings]

FIG. 1 is a sectional view showing a first embodiment of a semiconductor electron-emitting device of the present invention.

FIG. 2 is a diagram showing an example of an energy band of a semiconductor electron-emitting device having a Schottky barrier junction.

FIG. 3 is a diagram showing an example of current-voltage characteristics of the semiconductor electron-emitting device of the present invention.

FIG. 4 is a diagram showing another example of current-voltage characteristics of the semiconductor electron-emitting device of the present invention.

FIG. 5 is a sectional view showing a second embodiment of the semiconductor electron-emitting device of the present invention.

FIG. 6 is a sectional view showing a third embodiment of the semiconductor electron-emitting device of the present invention.

[Explanation of symbols]

101, 501 High concentration P-type semiconductor substrate 102, 502, 603 Low concentration N-type semiconductor region 104, 504, 605 P-type semiconductor region 103, 503, 602, 604, 606 High concentration P
Type semiconductor region 106, 507, 508, 608 ohmic junction electrode 105, 506, 607 insulating film 108, 610 Schottky electrode 107, 609 electrode wiring 109, 510 power supply 110, 511 depletion layer 505 high concentration N type semiconductor region 509 low work Function coating 600 Electron emission part 601 Semiconductor substrate 611 Support 612 Gate 613 Opening

Claims (36)

[Claims] 1. A semiconductor electron-emitting device which has an electron-emitting portion formed of a Schottky barrier junction of a metal material or a metal compound material and a semiconductor and emits electrons from a solid surface, wherein the electron-emitting portion has the Schottky barrier junction. To form an avalanche breakdown, and further to contact the first P-type semiconductor region to form the first P-type semiconductor region.
A second P-type semiconductor region for supplying carriers to the P-type semiconductor region, and a first P-type semiconductor region located around the first P-type semiconductor region.
A P-type semiconductor region and a P-type semiconductor region, and an N-type semiconductor region forming a Schottky barrier junction with the metal material or metal compound material, and the first and second P-type semiconductor regions and N-type semiconductor regions. The carrier density relationship of is as follows: (first P-type semiconductor region)> (second P-type semiconductor region)
> (N-type semiconductor region). 2. The semiconductor electron-emitting device according to claim 1, wherein an electrode for defining a flight direction of electrons emitted from the electron-emitting portion is provided near the surface of the solid. 3. The semiconductor electron-emitting device according to claim 1, wherein an electrode for defining kinetic energy of electrons emitted from the electron-emitting portion is provided near the surface of the solid. 4. A material having a work function different from that of the metal material or the metal compound material is deposited on the surface of the metal material or the metal compound material forming the Schottky barrier junction of the electron emitting portion. 1, 2 or 3
The semiconductor electron-emitting device described. 5. The semiconductor electron emitting device according to claim 1, wherein the electron emitting portion is formed on a semiconductor substrate. 6. The electron-emitting portion is provided in plural on the same substrate, and the electron-emitting portion is provided on the same substrate.
The semiconductor electron-emitting device described. 7. The semiconductor electron-emitting device according to claim 6, wherein the substrate is a semiconductor substrate. 8. The semiconductor electron-emitting device according to claim 6, wherein the plurality of electron-emitting portions are electrically independent of each other and can emit electrons individually. 9. The first, second, and N-type semiconductor regions and the N-type semiconductor region of the electron emitting portion are formed by an ion implantation method. 7. The semiconductor electron-emitting device according to 7 or 8. 10. A semiconductor electron-emitting device that has an electron-emitting portion formed of a Schottky barrier junction of a metal material or a metal compound material and a semiconductor and emits electrons from a solid surface, wherein the electron-emitting portion has the Schottky barrier junction. To form an avalanche breakdown, and further to contact the first P-type semiconductor region to form the first P-type semiconductor region.
A second P-type semiconductor region for supplying carriers to the P-type semiconductor region, and a first P-type semiconductor region located around the first P-type semiconductor region.
A P-type semiconductor region and a P-type semiconductor region, and an N-type semiconductor region forming a Schottky barrier junction with the metal material or metal compound material, and the first and second P-type semiconductor regions and N-type semiconductor regions. Of the carrier concentration of (second P-type semiconductor region) ≧ (first P-type semiconductor region)
> (N-type semiconductor region). 11. The semiconductor electron-emitting device according to claim 10, wherein an electrode for defining a flight direction of electrons emitted from the electron-emitting portion is provided near the device surface. 12. The semiconductor electron-emitting device according to claim 10, wherein an electrode for defining kinetic energy of electrons emitted from the electron-emitting portion is provided near the device surface. 13. A material having a work function different from that of the metal material or the metal compound material is deposited on the surface of the metal material or the metal compound material forming the Schottky barrier junction of the electron emitting portion. The semiconductor electron-emitting device according to 10, 11, or 12. 14. The electron emitting portion is formed on a semiconductor substrate, as claimed in claim 11, 11, 12 or 1.
3. The semiconductor electron-emitting device according to item 3. 15. The semiconductor electron emitting device according to claim 10, 11, 12 or 13, wherein a plurality of electron emitting portions are provided on the same substrate. 16. The semiconductor electron-emitting device according to claim 15, wherein the substrate is a semiconductor substrate. 17. The semiconductor electron-emitting device according to claim 15, wherein the plurality of electron-emitting portions are electrically independent of each other and can emit electrons individually. 18. The first, second P-type semiconductor region and N-type semiconductor region of the electron emitting portion are formed by an ion implantation method.
The semiconductor electron-emitting device according to 3, 14, 15, 16 or 17. 19. A semiconductor electron-emitting device which has an electron-emitting portion composed of a PN junction of an N-type semiconductor and a P-type semiconductor and emits electrons from a solid surface, wherein the electron-emitting portion is located on the solid surface. A first P-type semiconductor region, and a first P-type semiconductor region that forms a PN junction with the first N-type semiconductor region to generate avalanche breakdown, and further comprises: In contact with the first P
A second P-type semiconductor region for supplying carriers to the first P-type semiconductor region, and a second N-type semiconductor that is located around the first P-type semiconductor region and forms a PN junction with the first P-type semiconductor region. Type semiconductor regions, and the first and second P-type semiconductor regions and the first and second N-type semiconductor regions.
The relationship between the carrier concentrations of the type semiconductor regions is (first N-type semiconductor region)> (first P-type semiconductor region)
> (Second P-type semiconductor region)> (Second N-type semiconductor region) 20. The semiconductor electron-emitting device according to claim 19, wherein an electrode for defining a flight direction of electrons emitted from the electron-emitting portion is provided in the vicinity of a solid surface. 21. The semiconductor electron-emitting device according to claim 19, wherein an electrode for defining kinetic energy of electrons emitted from the electron-emitting portion is provided near the surface of the solid. 22. The semiconductor electron-emitting device according to claim 19, wherein a material having a different work function is deposited on the surface of the first N-type semiconductor region of the electron-emitting portion. 23. The electron emitting portion is formed on a semiconductor substrate, as claimed in claim 19, 20, 21 or 2.
2. The semiconductor electron-emitting device according to item 2. 24. The semiconductor electron-emitting device according to claim 19, 20, 21 or 22, wherein a plurality of electron-emitting portions are provided on the same substrate. 25. The semiconductor electron-emitting device according to claim 24, wherein the substrate is a semiconductor substrate. 26. The semiconductor electron-emitting device according to claim 24, wherein the plurality of electron-emitting portions are electrically independent of each other and can emit electrons individually. 27. The first, second P-type semiconductor region and the first, second N-type semiconductor region are formed by an ion implantation method.
The semiconductor electron-emitting device according to 3, 24, 25 or 26. 28. A semiconductor electron-emitting device which has an electron-emitting portion made of a PN junction of an N-type semiconductor and a P-type semiconductor and emits electrons from a solid surface, wherein the electron-emitting portion is located on the solid surface. A first P-type semiconductor region, and a first P-type semiconductor region that forms a PN junction with the first N-type semiconductor region to generate avalanche breakdown, and further comprises: In contact with the first P
A second P-type semiconductor region for supplying carriers to the type P-type semiconductor region, and a second N-type semiconductor that is located around the first P-type semiconductor region and forms a PN junction with the first P-type semiconductor region. Type semiconductor regions, and the first and second P-type semiconductor regions and the first and second N-type semiconductor regions.
The magnitude relationship of the carrier concentration of the type semiconductor region is (first N-type semiconductor region)> (second P-type semiconductor region) ≧
(First P-type semiconductor region)> (Second N-type semiconductor region). 29. The semiconductor electron-emitting device according to claim 28, wherein an electrode for defining a flight direction of the electron emitted from the electron-emitting portion is provided in the vicinity of the solid surface. 30. The semiconductor electron-emitting device according to claim 28, wherein an electrode for defining the kinetic energy of electrons emitted from the electron-emitting portion is provided near the surface of the solid. 31. The semiconductor electron-emitting device according to claim 28, 29 or 30, wherein materials having different work functions are deposited on the surface of the first N-type semiconductor region of the electron-emitting portion. 32. The electron emitting portion is formed on a semiconductor substrate, 28, 29, 30 or 3.
1. The semiconductor electron-emitting device according to 1. 33. The semiconductor electron-emitting device according to claim 28, 29, 30 or 31, wherein a plurality of electron-emitting portions are provided on the same substrate. 34. The semiconductor electron-emitting device according to claim 33, wherein the substrate is a semiconductor substrate. 35. The semiconductor electron-emitting device according to claim 33, wherein the plurality of electron-emitting portions are electrically independent of each other and can emit electrons individually. 36. The first and second P-type semiconductor regions and the first and second N-type semiconductor regions are formed by an ion implantation method, 28, 29, 30, 31.
32. The semiconductor electron-emitting device according to 32, 33, 34 or 35.