JPH0578184B2 - - Google Patents

Info

Publication number
JPH0578184B2
JPH0578184B2 JP58220605A JP22060583A JPH0578184B2 JP H0578184 B2 JPH0578184 B2 JP H0578184B2 JP 58220605 A JP58220605 A JP 58220605A JP 22060583 A JP22060583 A JP 22060583A JP H0578184 B2 JPH0578184 B2 JP H0578184B2
Authority
JP
Japan
Prior art keywords
lead
gate
leads
chip
gaasfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP58220605A
Other languages
English (en)
Japanese (ja)
Other versions
JPS60113955A (ja
Inventor
Kazuo Kanbayashi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP58220605A priority Critical patent/JPS60113955A/ja
Publication of JPS60113955A publication Critical patent/JPS60113955A/ja
Publication of JPH0578184B2 publication Critical patent/JPH0578184B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/421—Shapes or dispositions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07541—Controlling the environment, e.g. atmosphere composition or temperature
    • H10W72/07551—Controlling the environment, e.g. atmosphere composition or temperature characterised by changes in properties of the bond wires during the connecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5449—Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
JP58220605A 1983-11-25 1983-11-25 シングル・ゲート型ＧａＡｓＦＥＴ Granted JPS60113955A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP58220605A JPS60113955A (ja) 1983-11-25 1983-11-25 シングル・ゲート型ＧａＡｓＦＥＴ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP58220605A JPS60113955A (ja) 1983-11-25 1983-11-25 シングル・ゲート型ＧａＡｓＦＥＴ

Publications (2)

Publication Number Publication Date
JPS60113955A JPS60113955A (ja) 1985-06-20
JPH0578184B2 true JPH0578184B2 (2) 1993-10-28

Family

ID=16753591

Family Applications (1)

Application Number Title Priority Date Filing Date
JP58220605A Granted JPS60113955A (ja) 1983-11-25 1983-11-25 シングル・ゲート型ＧａＡｓＦＥＴ

Country Status (1)

Country Link
JP (1) JPS60113955A (2)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2801407B2 (ja) * 1994-04-07 1998-09-21 コネ オサケ ユキチュア エレベータ機械装置

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7241526B2 (en) * 2004-03-16 2007-07-10 Utc Power Corporation Fuel cell manifold cable end clamp

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5661068U (2) * 1979-10-16 1981-05-23
JPS5829846U (ja) * 1981-08-20 1983-02-26 松下電器産業株式会社 チツプ型トランジスタ

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2801407B2 (ja) * 1994-04-07 1998-09-21 コネ オサケ ユキチュア エレベータ機械装置

Also Published As

Publication number Publication date
JPS60113955A (ja) 1985-06-20

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