JPH057904B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a receiving circuit for bidirectional time-division digital transmission.

The digital ratio of communication systems is expanding, and research and development is progressing on the digitalization of subscriber lines.
There is a bidirectional time division digital transmission system described in Patent Application No. 1972-72667. A conventional example of a transmission line interface circuit in such a transmission system is shown in FIG. 1, and its operation timing is shown in FIG. The transmission line interface circuit in FIG. 1 includes a transmitting circuit 1,
It is composed of an identification circuit 2, a buffer amplifier 5, and a switch 3 connected to a transmission line 4. The blocked transmission burst signal S in the transmission circuit 1 is sent to the transmission line 4 by turning on the switch 3 to the transmission circuit 1 side during the transmission period shown in FIG. 2a, and is sent to the transmission line 4 during the reception period buffer shown in FIG. By turning on the amplifier 5 side, the received burst signal R from the transmission line 4 is supplied to the buffer amplifier 5. The signal on the transmission line 4 at this time is shown in FIG. 2b. The buffer amplifier 5 amplifies the received burst signal R and outputs it to the identification circuit 2 as shown in FIG. If the distance of the transmission path 4 is long, the level of this noise will be comparable to the level of the received burst signal R, causing erroneous reception. Therefore, an expensive switch with low switch noise is required, which poses a problem in terms of economic efficiency of the communication device.

An object of the present invention is to provide a more economical communication device by reducing the influence on the received signal even if the switch noise of each switch is too large to be ignored compared to the received signal level.

The receiving circuit for bidirectional time-division digital transmission of the present invention is applicable to a bi-directional time-division digital transmission system in which two communication devices communicate by dividing the same transmission path into a transmission period and a non-transmission period at regular intervals. The receiving circuit used includes a buffer amplifier for amplifying the received burst signal, a peak value holding section for generating a discrimination threshold, and a switch circuit, and the output of the buffer amplifier and the output of the peak value circuit are and an identification circuit that performs identification only during a first reception period that is shorter than the non-transmission period, and the switch circuit performs reception start only during the first reception period or before the first reception period. The present invention is characterized in that the output of the buffer amplifier is supplied to the peak value holding circuit only during a second reception period in which the phase of the received burst signal is fast and the length is equal to or longer than the burst length of the received burst signal.

Next, the present invention will be explained in detail with reference to the drawings. FIG. 3 shows an embodiment of a transmission line interface circuit having a receiving circuit according to the present invention, and its operation will be explained using the timing diagram of FIG. 6. The transmission burst signal S blocked in the transmission circuit 7 is supplied to the driver 6, and the driver 6
During the high-level transmission period of the control signal 10 shown in FIG. At the same time, the transmission burst signal S is also supplied to the receiving circuit 11. On the other hand, the received burst signal R from the transmission path S is supplied to the receiving circuit 11 via the transformer 9. The signal on the transmission line 8 at this time is shown in FIG. 6b. In the receiving circuit 11, the buffer amplifier 13 amplifies the transmitted burst signal S and the received burst signal R as shown in FIG. 6c,
It is supplied to the identification circuit 12. The operation of the identification circuit 12 will be described with reference to FIG. 4, which shows an example of the configuration of the identification circuit 12. The output of buffer amplifier 13 is applied to switch 17 and the positive input of comparator 19. The switch 17 receives the control signal 15 shown in FIG. 6d.
conducts during the high level reception period, and supplies only the amplified reception burst signal R to the peak value holding circuit 18 as shown in FIG. 6e. At this time, a slight switch noise is generated as shown by the diagonal line, but it is sufficiently small compared to the level of the amplified received burst signal R, so the peak value holding circuit 18 does not respond to this switch noise. The peak value holding circuit 18 generates a threshold value for identification from the obtained peak value and supplies it to the negative input of the comparator 19. The comparator 19 identifies the transmitted burst signal S and the received burst signal R applied to its positive input, and converts the digital signal S' and the digital signal S' to the digital signal S' as shown in FIG.
Output R′. AND gate 20 receives control signal 1
The output of the comparator 19 is output as the identification result only during the reception period given by 5, that is, the same reception period as the period in which the switch 17 is conductive.

Therefore, as shown in FIG. 6h, only the identified digital signal R' of the received burst signal R is output as the identification result of the identification circuit 12.

Another example of the configuration of the identification circuit 12 is shown in FIG. This configuration example is the same as the configuration example shown in FIG. 4 except for the control signal 16 supplied to the AND gate 20. Fifth
In the identification circuit shown, the switch 17 shown in FIG.
The phase of the start of conduction given by the control signal 15 of
This is earlier than the phase at which the discrimination starts given by the control signal of the AND gate 20 shown in FIG. Therefore, the influence of switch noise shown by diagonal lines in FIG. 6e can be further reduced.

In addition, if the received burst signal is a double-stream code,
A full-wave rectifier circuit 14 shown by a broken line is provided at the input stage of the identification circuit 12 in FIGS. 4 and 5, respectively.

As described above, according to the present invention, it is possible to reduce the influence of switch noise without using a switch with low switch noise, and to provide a receiving circuit for economical two-way time-division digital transmission with good communication quality. can.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a conventional example of a transmission line interface circuit, FIGS. 2 a to d are timing diagrams showing the operation of the transmission line interface circuit of FIG. 1, and FIG.
The figure is a block diagram showing one embodiment of a transmission line interface circuit using the receiver circuit of the present invention, FIG. 4 is a block diagram of a configuration example of an identification circuit used in the receiver circuit of FIG. 3, and FIG. A block diagram of another configuration example of the identification circuit used in the receiving circuit shown in FIG. 3, FIGS. 6a to 6h
4 is a timing diagram showing the operation of the embodiment of FIG. 3. FIG. In the figure, 1 and 7 are transmission circuits, 2 and 12 are identification circuits, 3 and 17 are switches, 4 and 8 are transmission lines,
6 is a driver, 9 is a transformer, 11 is a receiving circuit,
5 and 13 are buffer amplifiers, 18 is a peak value holding circuit, 19 is a comparator, 20 is an AND gate, 24
indicates a rectifier circuit.

Claims (1)

[Scope of Claims] 1. A receiving circuit used in a bidirectional time-division digital transmission system in which two communication devices communicate by temporally dividing the same transmission path into a transmission period and a non-transmission period at regular intervals, , comprising a buffer amplifier for amplifying the received burst signal, a peak value holding unit and a switch circuit for generating a discrimination threshold, and comparing the output of the buffer amplifier and the output of the peak value circuit to determine the non-transmission period. and an identification circuit that performs identification only in a first reception period shorter than A receiving circuit for bidirectional time-division digital transmission, characterized in that the output of the buffer amplifier is supplied to the peak value holding circuit only during a second receiving period having a length equal to or longer than the burst length of a burst signal.