JPH057905B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a frame aligner for aligning the phases of frames circulating in a loop network.

[Conventional technology and problems]

FIG. 2 shows a frame structure for multiplex communication in a loop network, and FIG. 3 shows a system configuration diagram of the loop network.

Multiplex communication in a loop network in which a plurality of terminal stations A, B, and C are successively connected is based on frames 1, 2, and 3 generated in a frame generator (provided in the frame aligner 20) in the loop 11.
are sequentially passed through the loop. Each terminal station A, B, C
, the time slot belonging to your own station (second
In the figure, time slot a is allocated for communication between terminal stations A and B, time slot b is allocated for communication between terminal stations B and C, and time slot C is allocated for communication between terminal stations C and A. It is assumed that there is ), communication is carried out by taking in data destined for the own station depending on the time slot, and transmitting data destined for other stations in that time slot. In this case, loop 1
The frames 1, 2, and 3 that go back through loop 1 and the frames generated in the frame generation section are loop 11.
The phases generally do not match due to transmission path delays. Therefore, as it stands, data on the frame cannot be transmitted beyond the frame generating section. Therefore, a frame aligner 20 is provided to align the phases of the frames that have passed through the loop and the frames that are generated in the frame generator.

In such a loop network, if there is an abnormality in a frame circulating within the loop, this abnormal frame will not be received by any terminal station, so frames that cannot be used for communication will remain in the loop forever. Therefore, it is necessary for the frame aligner 20 to detect and erase this abnormal frame.

When the frame aligner 20 detects a bit error or the like in a received frame, it erases the received frame, creates an empty frame in its place, and sends it to the loop 11.

In a packet type network, time slots a, b, and c are usually not fixedly assigned but can be used by any terminal station, so there is no problem even if an abnormal frame is replaced with an empty frame.

However, in a circuit-switched loop network in which each terminal station captures a specific time slot at the start of communication and uses this time slot exclusively during communication, the following problem occurs. In other words, in such a circuit-switched loop network,
If even one empty frame appears during communication, it means that the line is disconnected. If another terminal station different from the terminal station currently communicating captures the empty frame and transmits data, the communication of the terminal station currently transmitting will be interrupted and an abnormality will occur. For this reason, in a circuit-switched loop network, an abnormal frame cannot be made into an empty frame. That is, when each terminal station detects that there is an abnormality in the received frame, it sets "1" to the send bit of that frame as game alarm information. Additionally, if the received frame does not have an address indicating the destination station or contains an unknown address, the frame aligner erases the abnormal frame and inserts an empty frame in its place. I was worried. However, empty frames may cause malfunctions in the line establishment procedure. In other words, by using a fixed line that monopolizes a specific time slot during communication, other stations are allowed to interrupt the line during communication.
Impair communication.

[Purpose of the invention]

The present invention aims to solve the problems of the prior art, and its purpose is to erase and eliminate abnormal frames when the frame aligner receives them in a circuit-switched loop network. By retransmitting the immediately preceding normal frame, the frame aligner can prevent abnormal frames from circulating and prevent line disconnections, thereby ensuring accurate communication. It is about providing.

In order to achieve the above object, the present invention writes the frames that have gone around the loop in a line-switched loop network to an elastic memory and reads them out in synchronization with the frame transmission timing, thereby improving the phase of the frames that go around the loop. In the frame aligner that performs alignment, a buffer memory having a capacity of one frame or more is provided, and a received frame is normally written into the buffer memory, delayed by one frame or more, and then read out and stored in the elastic memory. When a frame occurs, writing to the elastic memory is prohibited, and the frame written in the elastic memory before the occurrence of the abnormal frame is read out and retransmitted on the loop. It has a configuration as a frame aligner.

[Embodiments of the invention]

FIG. 1 shows the configuration of an embodiment of the frame aligner of the present invention. In FIG. 1, 1 is a synchronization pull-in unit, 2 is a 1-frame buffer memory, and 3
is elastic memory, 4 is frame generation section,
5 is a frame pattern insertion section, and 6 is an abnormal frame detection section.

The received signal is applied to the synchronization pull-in section 1, whereby the synchronization pull-in section 1 extracts frame synchronization information from the received signal. The received signal is also given to 1 frame buffer memory 2, and 1 frame buffer memory 2
It is also provided to the buffer memory 2, and the 1-frame buffer memory 2 reads one frame of the received signal according to the timing signal indicating the timing of the received frame from the synchronization pull-in section 1, and also reads it using the same timing signal. This results in an output signal delayed by one frame compared to the received signal, which output signal is applied to the elastic memory 3. A timing signal indicating the timing of the received frame is added to the elastic memory 3 from the synchronization pull-in section 1, and a timing signal indicating the timing of the transmitting frame is added from the frame generating section 4. The signal is aligned with the transmitted frame to produce an output signal, and the signal is applied to the frame pattern inserter 5. on the other hand,
The frame generator 4 generates a frame pattern signal for creating a transmission frame, and inputs it to the frame pattern inserter 5. The frame pattern insertion section 5 creates a transmission frame from the frame pattern signal and a signal whose timing is matched with this, and outputs it as a transmission signal.

The reception number is also added to the abnormal frame detection section 6, which constantly monitors the presence or absence of an abnormal frame in the received signal and generates a write inhibit signal when an abnormal frame is detected. A timing signal is applied to the abnormal frame detection section 6 from the synchronization pull-in section 1 in order to obtain timing for such monitoring and signal output. A write inhibit signal is applied to the elastic memory 3, thereby inhibiting the writing of new data in the elastic memory 3. The input signal to the elastic memory 3 is delayed by one frame by the one frame buffer memory 2. Therefore, since the input signal is delayed by one frame compared to the input signal of the abnormal frame detection section 6, writing of the abnormal frame stored in the one frame buffer memory 2 is prohibited in the elastic memory 3. . Therefore, the frames (normal frames) received before receiving the abnormal frame remain in the elastic memory 3.

The read side of the elastic memory 3 is always in operation, and when the elastic memory 3 is write-protected due to the detection of an abnormal frame, it is written before the abnormal frame is received and remains without being overwritten. A normal frame is read from the elastic memory 3. That is, the same frame is read out from the elastic memory 3 twice in succession. The previous normal frame read from the elastic memory 3 is sent out as a transmission frame via the frame pattern insertion section 5. In this way, when an abnormal frame is received, the normal frame that was received one frame before the abnormal frame can be retransmitted.
In other words, when an abnormal frame is received, the writing of this abnormal frame to the elastic memory is stopped, and
The normal frame written one frame before is left. The abnormal frame can be erased without interrupting communication between the terminal stations. It goes without saying that the capacity of the one frame buffer memory is not limited to one frame, but may be one frame or more. In other words, it may take more than one frame to detect an abnormal frame, and in this case, it is necessary to prohibit writing to elastic memory after that time, so the capacity of the elastic memory is determined by the time required to detect an abnormal frame. It may be more than 1 minute.

Note that although an abnormality is detected at the terminal station on the receiving side by receiving the same data, the line is not disconnected, so recovery can be done by some method. However, the recovery method is outside the scope of the present invention and will not be discussed here.

In the above embodiment, for the sake of simplicity, one frame has one time slot, but as shown in FIGS. If multiple lines are used, this can be achieved as follows. By monitoring each time slot in the abnormal frame detection section and prohibiting writing only in the time slot where an abnormality has occurred, normal frames can be retransmitted independently for each line.

〔Effect of the invention〕

As explained above, according to the frame aligner of the present invention, when an abnormality occurs in a frame circulating in a loop network, the abnormal frame can be deleted without inserting a predetermined frame such as an empty frame. Since the normal frame immediately before the reception of the abnormal frame can be retransmitted, the abnormal frame can be erased without interfering with the communication procedure, which is extremely effective.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of one embodiment of the frame aligner of the present invention, FIG. 2 is an example of the configuration of one frame, and FIG. 3 is a block diagram showing an example of the configuration of one frame. Here is an example of using it as multiple lines. DESCRIPTION OF SYMBOLS 1...Synchronization pull-in section, 2...1 frame buffer memory, 3...Elastic memory, 4...Frame generation section, 5...Frame pattern insertion section, 6...Abnormal frame detection section.

Claims (1)

[Claims] 1 In a frame aligner that aligns the phase of frames circulating through a loop in a line-switched loop network by writing frames that have circulated through a loop into erastate memory and reading them out in accordance with the frame transmission timing, 1
A buffer memory having a capacity of one frame or more is provided, and a received frame is written into the buffer memory under normal conditions, delayed by one frame or more, and then read out and written into the elastic memory. A frame aligner characterized in that writing to an elastic memory is prohibited, and a frame written in the elastic memory before the occurrence of an abnormal frame is read out and retransmitted on a loop.