JPH0580820B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION Technical Field of the Invention The present invention relates to a method for manufacturing an MIS field effect semiconductor device, and in particular to a method for manufacturing an MIS field effect semiconductor device having a gate electrode made of a high melting point metal.
This invention relates to a method for manufacturing an MIS (Metal Insulatar Semiconductor) field effect semiconductor device.

Background of the Technology In recent years, high melting point metals such as molybdenum (Mo) and tungsten (W) have been used for gate electrodes and other wiring.

The reasons for this are that these metal materials have lower resistance than polycrystalline silicon etc., which contributes to higher speed devices, that they have excellent processability such as the ability to perform precise patterning, and that they have excellent processability, such as the ability to form electrodes and wiring. The main requirement is that it can sufficiently withstand the subsequent heat treatment temperature.

However, for example, when molybdenum (Mo) is used as the gate electrode of a MIS field effect transistor, the level at the silicon (Si)/silicon dioxide (SiO ₂ ) interface increases, and the threshold voltage (Vth) decreases due to the influence of mobile ions. This causes a problem of decreased stability, such as movement depending on the applied voltage.

The cause is contamination during the manufacturing process of the device. For example, in the process of patterning a high-melting point metal film using a photoresist, alkali ions, such as sodium ions (Na ⁺ ), potassium ions ( K ⁺ ) and other heavy metals invade the silicon dioxide gate insulating film.

That is, metals having a body-centered cubic lattice (BCC) crystal structure, such as Mo and W, easily form columnar crystals.

By the way, if the source and drain regions of the device are formed by a self-alignment method using a gate electrode mask, a high temperature heat treatment process is required to activate the diffused or ion-implanted impurities. At this time, if the surface of the high melting point metal gate electrode is contaminated, the contaminant diffuses along the grain boundaries of the columnar crystals and easily enters the silicon dioxide gate insulating film. It is well known that this causes instability as described above.

Conventionally, as a means to eliminate such instability, a glass film is formed on top of a high-melting point metal film to prevent contaminants from penetrating into the high-melting point metal film during, for example, photolithography processes. It is proposed to prevent

However, since the process of forming the glass film usually involves a thermal process of several hundred degrees Celsius or more,
There is a high risk that contaminants will be introduced into the high melting point metal during such heat treatment, and this method is not sufficient.

OBJECTS OF THE INVENTION The present invention provides a method for easily manufacturing a device that has electrodes and wiring made of a high-melting point metal and is free from contamination such as Na ⁺ .

Structure of the Invention Therefore, according to the present invention, a high melting point metal layer is formed on a semiconductor substrate, a metal film that is easy to adhere and remove is selectively formed on the high melting point metal film, and then the selectively removing the high melting point metal layer using the metal film as a mask to form a gate electrode;
A method for manufacturing an MIS field effect semiconductor device is provided, which includes the steps of: next, using the gate electrode as a mask, impurities are introduced into the semiconductor substrate to form a source region and a drain region, and then the metal film is removed.

Hereinafter, the present invention will be explained in detail using examples.

Embodiments of the Invention See Figure 1 (1) A p-type silicon (Si) semiconductor substrate 1 having a specific resistance of, for example, 7 to 10 [Ω-cm] is coated with a thickness of 4000 mm by applying a conventional selective thermal oxidation method. ~8000 [Å] silicon dioxide (SiO ₂ ) field insulation film 2
grow.

(2) Apply the normal thermal oxidation method to a thickness of, for example, 100 mm.
A gate insulating film 2G of ~500 [Å] is formed.

See Figure 2 (3) For example, by applying an electron beam evaporation method, a molybdenum (Mo) layer 3 with a thickness of, for example, 3000 to 5000 [Å] is applied.
form. At this time, the degree of vacuum in the deposition chamber was 1×10 ^-6 [Torr], and the deposition rate was 15 to 20 [Å/
seconds].

Refer to FIG. 3 (4) For example, by applying a vacuum evaporation method, an aluminum (A) film 4 is formed to a thickness of, for example, about 300 to 800 [Å].

See Figure 4 (5) Applying normal photolithography technology,
First, a photoresist (e.g. AZ-1350, manufactured by Shitsuprey Co., Ltd., USA) mask 5 is applied to a thickness of, e.g. 5000 mm.
It is formed to a thickness of approximately [Å] to 1 [μm].

See Figure 5 (6) Using the photo resist mask 5,
The aluminum (A) film 4 and molybdenum (Mo) layer 3 are patterned. As a result, a molybdenum (Mo) gate electrode 3G is formed.

See Figure 6 (7) After removing the photoresist mask 5, ion implantation is applied to form the n ⁺ type source region and
Donor impurities for forming an n ⁺ type drain region are implanted.

The implanted ions at this time are arsenic ions (As ⁺ ),
Injection energy 150 [KeV], dose 1-5×
10 ¹⁵ [cm ^-2 ].

See Figure 7 (8) After removing the aluminum film 4, for example, at a temperature of 900 to 1100 [°C], nitrogen (N ₂ ), atmosphere, and time.
Heat treatment for 15 to 20 minutes.

Through this heat treatment, the implanted ions are activated, and an n ⁺ type source region 6S and an n ⁺ type drain region 6D are formed.

Refer to FIG. 8 (9) For example, a silicon dioxide insulating film 7 is formed by applying chemical vapor deposition.

(10) Applying ordinary photolithography technology, vapor deposition method, etc., form an electrode contact window, for example, form an aluminum (A) film, and pattern the aluminum film to form a source electrode 8.
A drain electrode 8D and a gate electrode 8G are formed.

In the above embodiment, a photoresist mask 5 is used to pattern the molybdenum (Mo) layer 3, but since the aluminum film 4 is interposed between them, contaminants are blocked there, and the molybdenum (Mo) layer 3 is 3 and, of course, does not penetrate into the gate insulating film 2G.

After patterning the molybdenum (Mo) layer 3 and before high-temperature heat treatment, the aluminum layer 4 is removed together with the contaminants on its surface.

As a material that can be substituted for the aluminum film 4, metals that are easy to deposit and remove, such as pismuth (Bi), lead (Pb), indium (In), copper (Cu), and antimony (Sb), are selected. be able to.

These substances can be deposited and formed by a normal resistance heating type vacuum deposition method without heating the object to be processed. Therefore, contaminants do not enter into the high melting point metal layer constituting the gate electrode.

Now, when measuring the amount of mobile ions in the silicon dioxide gate insulating film in the device fabricated as described above and in the conventional device, it is less than 1×10 ¹⁰ [cm ^-2 ] when the method of the present invention is used. However, when using the conventional method of directly contacting the resist with a high-melting point metal, it was 1×10 ¹² [cm ^-2 ] or more.

The amount of mobile ions was measured by measuring the ion current flowing through the insulating film after heat treatment at 900° C. for 20 minutes in a nitrogen atmosphere.

Effects of the Invention As can be seen from the above explanation, according to the present invention, when manufacturing a MIS field effect semiconductor device having a gate electrode of a high melting point metal, a high melting point metal layer is formed on a semiconductor substrate, and a high melting point metal layer is formed on the semiconductor substrate. A metal film such as aluminum is formed on the surface, the metal film is patterned, and the high melting point metal layer is patterned using this as a mask to form a gate electrode, and then the metal film is removed together with the contaminants on its surface. As a result, the amount of mobile ions in the gate insulating film decreases significantly, increasing the level at the Si-SiO ₂ interface and causing instability such as threshold voltage (Vth) fluctuations depending on the applied voltage. It is possible to obtain a device that eliminates this problem.
In addition, since the surface of the high melting point metal layer with a columnar crystal structure is not exposed to ions, the MIS
Controllability and stability of the threshold voltage (Vth) of a field effect semiconductor device can be improved.

[Brief explanation of the drawing]

1 to 8 are side cross-sectional views of essential parts of a semiconductor device at key points in the process for explaining one embodiment of the present invention. In the figure, 1 is a semiconductor substrate, 2 is a field insulating film, 2G is a gate insulating film, 3G is a high melting point metal gate electrode, 4 is an aluminum film (metal film),
5 is a photoresist mask, 6S is a source region, 6D is a drain region, 7 is an insulating film, 8S is a source electrode, 8D is a drain electrode, and 8G is a gate electrode.

Claims (1)

[Claims] 1. Forming a high melting point metal layer on a semiconductor substrate, then selectively forming a metal film that is easy to adhere and remove on the high melting point metal film, and then using the metal film as a mask to form the high melting point metal layer. selectively removing the metal film to form a gate electrode, then introducing impurities into the semiconductor substrate using the gate electrode as a mask to form a source region and a drain region, and then removing the metal film. A method for manufacturing a MIS field effect semiconductor device characterized by: