JPH0580828B2 - - Google Patents
Info
- Publication number
- JPH0580828B2 JPH0580828B2 JP59040544A JP4054484A JPH0580828B2 JP H0580828 B2 JPH0580828 B2 JP H0580828B2 JP 59040544 A JP59040544 A JP 59040544A JP 4054484 A JP4054484 A JP 4054484A JP H0580828 B2 JPH0580828 B2 JP H0580828B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- insulating film
- semiconductor
- polycrystalline
- metal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
- H10W10/01—Manufacture or treatment
Landscapes
- Element Separation (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59040544A JPS60186036A (ja) | 1984-03-05 | 1984-03-05 | 半導体基板の製造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP59040544A JPS60186036A (ja) | 1984-03-05 | 1984-03-05 | 半導体基板の製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS60186036A JPS60186036A (ja) | 1985-09-21 |
| JPH0580828B2 true JPH0580828B2 (de) | 1993-11-10 |
Family
ID=12583388
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP59040544A Granted JPS60186036A (ja) | 1984-03-05 | 1984-03-05 | 半導体基板の製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS60186036A (de) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2757872B2 (ja) * | 1989-01-31 | 1998-05-25 | 三菱電機株式会社 | 半導体装置及びその製造方法 |
| JP2775848B2 (ja) * | 1989-05-18 | 1998-07-16 | 富士通株式会社 | 半導体装置の製造方法 |
| JP2662684B2 (ja) * | 1993-06-21 | 1997-10-15 | 住友金属鉱山株式会社 | 電解用アノードの搬送装置 |
| JP2007514321A (ja) * | 2003-12-10 | 2007-05-31 | ザ、リージェンツ、オブ、ザ、ユニバーシティ、オブ、カリフォルニア | ミックスド・シグナル集積回路のための低クロストーク回路基板 |
-
1984
- 1984-03-05 JP JP59040544A patent/JPS60186036A/ja active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS60186036A (ja) | 1985-09-21 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4378628A (en) | Cobalt silicide metallization for semiconductor integrated circuits | |
| US6344663B1 (en) | Silicon carbide CMOS devices | |
| US4870475A (en) | Semiconductor device and method of manufacturing the same | |
| US4577396A (en) | Method of forming electrical contact to a semiconductor substrate via a metallic silicide or silicon alloy layer formed in the substrate | |
| JPS6336566A (ja) | 半導体装置の製造方法 | |
| JPH0456325A (ja) | 半導体装置およびその製造方法 | |
| JP3626773B2 (ja) | 半導体デバイスの導電層、mosfet及びそれらの製造方法 | |
| JPS6349387B2 (de) | ||
| JPS6252963A (ja) | バイポ−ラトランジスタの製造方法 | |
| JP3108447B2 (ja) | 半導体装置及びその製造方法 | |
| US3956527A (en) | Dielectrically isolated Schottky Barrier structure and method of forming the same | |
| JPH06196703A (ja) | 薄膜トランジスタ及びその製造方法 | |
| JP2915433B2 (ja) | 半導体集積回路装置 | |
| JPH0580828B2 (de) | ||
| US4476157A (en) | Method for manufacturing schottky barrier diode | |
| JPH0562456B2 (de) | ||
| US5068710A (en) | Semiconductor device with multilayer base contact | |
| JPS609159A (ja) | 半導体装置 | |
| JPH08340122A (ja) | 薄膜半導体装置 | |
| JP3310127B2 (ja) | 半導体装置及びその製造方法 | |
| JPH06204167A (ja) | 半導体装置の製造方法 | |
| JP3253438B2 (ja) | 半導体装置 | |
| JPH06302791A (ja) | 半導体基板及びその製造方法 | |
| US4635089A (en) | MIS-integrated semiconductor device | |
| US5635752A (en) | Semiconductor device having source and drain regions which include horizontally extending secondary defect layers |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| EXPY | Cancellation because of completion of term |