JPH0582985B2 - - Google Patents

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for manufacturing a semiconductor integrated circuit,
In particular, the present invention relates to a method of manufacturing a semiconductor integrated circuit including a Zener diode.

[Conventional technology]

Conventionally, a Zener diode in this type of semiconductor integrated circuit has a P well 5b, which is a P type impurity layer, a P type diffusion region 5a, which is an insulating diffusion region, and a P type buried layer 2, as shown in FIG. A P-type diffusion region 5c which becomes a collector region together with the type buried layer 3
The N-type impurity layer 9c was formed at the same time as the base contact region 9a of the PNP transistor.

[Problem that the invention seeks to solve]

In the Zener diode of the conventional semiconductor integrated circuit described above, the P-type impurity layer is formed at the same time as the insulating diffusion, and the N-type impurity layer is formed at the same time as the base contact region of the PNP transistor by diffusion, so that the concentration at the surface is reduced. The breakdown voltage is high and breakdown occurs at the surface, and the breakdown voltage is determined by the surface concentration, and the Zener breakdown voltage drifts due to large injection of hot electrons from the surface into the silicon oxide film or silicon nitride film.

[Means for solving problems]

The method for manufacturing a semiconductor integrated circuit according to the present invention provides a method for manufacturing a semiconductor integrated circuit in which a semiconductor substrate having a first conductivity type epitaxial layer on a surface thereof has a second conductivity type epitaxial layer formed at a boundary between the first conductivity type epitaxial layer and the second conductivity type semiconductor substrate. A first conductive layer for insulating isolation that is connected to the second conductive type semiconductor substrate and has at least a first buried layer of the first conductive type and a second buried layer of the first conductive type that are selectively formed, respectively. preparing a semiconductor substrate comprising a second buried layer of the second conductive type and a second buried layer of the second conductive type connected to a surface portion of the second buried layer of the first conductive type; By selectively introducing a second conductivity type impurity into the surface portion of the conductivity type epitaxial layer, a second conductivity type well is formed above the first conductivity type buried layer, and a second conductivity type well is separated from the first conductivity type buried layer. a second second conductivity type diffusion region for insulation isolation connected to the second conductivity type buried layer, and a second second conductivity type buried layer connected to the second second conductivity type buried layer to together constitute a collector region; a step of simultaneously forming a second second conductivity type diffusion region that partitions a conductivity type well; and a first conductivity type well in which the impurity concentration of the first conductivity type well is increased by selectively introducing a first conductivity type impurity. forming a first first conductivity type impurity layer for adjusting the surface concentration of a part of the base region and the second conductivity type well; a step of forming an emitter region made of a type impurity layer; and a step of selectively introducing a first conductivity type impurity to form a base contact region and a base contact region in a surface portion of the first conductivity type base region where the emitter region is not formed. forming a second first conductivity type impurity layer penetrating the first first conductivity type impurity layer, the first first conductivity type impurity layer, the second first conductivity type impurity layer; a Zener diode including a layer and a second conductivity type well, and a Zener diode including the emitter region, the first conductivity type base region and the second conductivity type well.
A vertical bipolar transistor including a buried layer of a second conductivity type is formed.

[Example] Next, an example of the present invention will be described with reference to the drawings.

1A to 1D are cross-sectional views of semiconductor chips arranged in the order of steps for explaining one embodiment of the present invention.

First, as shown in FIG. 1a, a P-type semiconductor (silicon) substrate 1 is embedded with an N-type buried layer 2 and a P-type buried layer 3, and an N-type epitaxial layer 4 is grown on the wafer. P for insulation diffusion and isolation
A P-type diffusion region 5 which becomes a collector region together with the type diffusion region 5a and the P-type buried layer 3 on the N-type buried layer 2
At the same time as c, a P-type well 5b which becomes a P-type impurity layer of the Zener diode portion is formed, and a silicon oxide film 6 is formed on the surface.

Next, as shown in FIG. 1b, the silicon oxide film 6 is selectively removed using the photoresist film as a mask, and after removing the photoresist film, N-type ions, such as phosphorus, are implanted to form a vertical PNP transistor. An N-type base region 7a serving as the base portion of the wafer and a first N-type impurity layer 7b serving as the N-type impurity layer of the Zener diode portion are simultaneously formed. At this time, the first N-type impurity layer 7b is designed to lower the surface concentration of the P-type well 5b, which becomes the P-type impurity layer of the Zener diode portion, or to be inverted to N-type.

Next, as shown in FIG. 1c, a silicon oxide film is formed on the N-type base region 7a and the first N-type impurity layer 7b, and a silicon oxide film 6 is formed on the portion that will form the emitter part of the vertical PNP transistor. is removed, a P-type impurity layer 8 is formed by diffusing or ion-implanting a P-type impurity, such as boron, and a silicon oxide film is formed thereon.

After this, the oxide film is selectively removed to form an N-type impurity layer in the Zener diode part and a base contact part of the vertical PNP transistor, and an N-type, for example, phosphorus is diffused, and a second N-type impurity layer is formed. 9b and a base contact region 9a are formed. At this time, the impurity layer in the Zener diode portion is diffused into the previously formed N-type impurity layer.

Finally, as shown in FIG. 1d, the wafer is then oxidized to form a silicon oxide film, and the silicon oxide film on the electrode extension portion is removed to form the electrode 10.

In this way, Zener diode and PNP
A semiconductor integrated circuit including a transistor is formed.

〔Effect of the invention〕

As explained above, the present invention forms a low concentration first impurity layer of the first conductivity type in a well of the second conductivity type, and forms a second impurity layer of the first conductivity type inside the first impurity layer, thereby forming a Zener diode. By lowering the surface concentration near the junction, breakdown at the surface is suppressed and breakdown occurs internally.
This has the effect of suppressing the injection of hot electrons into the oxide film or silicon nitride film, and making it possible to manufacture semiconductor integrated circuits with stable operation.

[Brief explanation of drawings]

1A to 1D are cross-sectional views of semiconductor chips arranged in the order of steps to illustrate an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a semiconductor chip to explain a conventional example. 1... P-type semiconductor substrate, 2... N-type buried layer, 3
...P-type buried layer, 4...N-type epitaxial layer,
5a...P-type diffusion region, 5b...P-type well, 6
...Silicon oxide film, 7a...N-type base region, 7
b...First N-type impurity layer, 8...P-type impurity layer, 9a...Base contact region, 9b...Second N-type impurity layer, 9c...N-type impurity layer, 10
... Electrode, 11 ... N-type well, 12 ... Silicon nitride film.

Claims (1)

[Claims] 1. A first conductive layer selectively formed at a boundary between the first conductive type epitaxial layer and the second conductive type semiconductor substrate of a second conductive type semiconductor substrate having a first conductive type epitaxial layer on the surface thereof. a first second conductivity type buried layer for insulation isolation, which has at least a first conductivity type buried layer and a second first conductivity type buried layer, and is connected to the second conductivity type semiconductor substrate; a second step of preparing a semiconductor substrate having a second buried layer of the second conductivity type connected to the surface portion of the buried layer of the first conductivity type; By selectively introducing a second conductivity type impurity, a second conductivity type well separated from the first conductivity type buried layer is formed on the first first conductivity type buried layer;
a first second conductivity type diffusion region for insulation isolation connected to the conductivity type buried layer; and a first second conductivity type well connected to the second second conductivity type buried layer, which together constitute a collector region; a first conductivity type base region in which the impurity concentration of the first conductivity type well is increased by selectively introducing a first conductivity type impurity; forming a first first conductivity type impurity layer for adjusting the surface concentration of a portion of the second conductivity type well; and selectively forming a second conductivity type impurity layer on a surface portion of the first conductivity type base region. a base contact region and a base contact region in a surface portion of the first conductivity type base region where the emitter region is not formed by selectively introducing impurities of a first conductivity type; forming a second first conductivity type impurity layer penetrating the first conductivity type impurity layer, the first first conductivity type impurity layer, the second first conductivity type impurity layer and the A semiconductor integrated circuit characterized in that a Zener diode including a second conductivity type well and a vertical bipolar transistor including the emitter region, the first conductivity type base region, and the second second conductivity type buried layer are formed. Method of manufacturing the device.