JPH0584683B2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention can be used to detect an error between a speed detection signal and a reference signal when controlling the speed of a motor used in audio equipment, video equipment, etc. This relates to an amplifier circuit that can be used.

Conventional configurations and their problems In recent years, there has been a growing movement toward making audio equipment such as cassette tape recorders smaller and lighter, and as a result, the signal levels handled have become smaller and the power supply voltages have also become lower. Therefore, there has been a need for a circuit that can handle smaller signal levels and operates at a lower power supply voltage.

A conventional amplifier circuit will be described below with reference to the drawings.

Figure 2 is a circuit wiring diagram of a conventional amplifier circuit.
The emitters of the PNP transistors 3 and 4 are connected to each other, and the positive side power supply line 1 is connected via a constant current source 7.
, the collectors of transistors 3 and 4 are connected to the collectors of NPN transistors 5 and 6, respectively, the bases of transistors 5 and 6 are both connected to the collector of transistor 5, and the emitters of transistors 5 and 6 are connected to Both are connected to the negative side power supply line 2. Further, the bases of the transistors 3 and 4 are connected to a non-inverting input terminal 8 and an inverting input terminal 9, respectively, and the collector of the transistor 6 is connected to an output terminal 10.

The operation of the amplifier circuit configured as described above will be explained below.

First, if the potential of the non-inverting input terminal 8 becomes lower than the potential of the inverting input terminal 9, the collector current of the transistor 3 increases and the collector current of the transistor 4 decreases. On the other hand, the collector current of the transistor 3 is output as the collector current of the transistor 6 by a current mirror circuit constituted by transistors 5 and 6.
Therefore, the collector current of the transistor 6 becomes larger than the collector current of the transistor 4, and the potential of the output terminal 10 decreases. Conversely, if the potential of the non-inverting input terminal 8 becomes higher than the potential of the inverting input terminal 9, the potential of the output terminal 10 increases through the reverse process.

However, in the amplifier circuit having the above configuration, when the voltage applied to both input terminals (with negative power supply terminal 2 as the reference potential) is extremely small, the emitter potential of transistors 3 and 4 is almost equal to that of the transistors. Base to emitter voltage V _BE
is equal to On the other hand, the collector potential of the transistor 3 is the base potential of the transistors 5 and 6,
The emitter voltage V _BE . Therefore, when transistor 3 attempts to conduct, it becomes saturated and cannot supply collector current to transistors 5 and 6.
That is, the potential of the output terminal 10 remains elevated and does not fall.

OBJECT OF THE INVENTION The object of the present invention was made in view of the above-mentioned disadvantages in conventional amplifier circuits, and it is to provide an amplifier circuit that can operate even when the input terminal voltage is 0V and can also operate at a low power supply voltage. That's true.

Structure of the Invention The amplifier circuit of the present invention includes a differential transistor pair including first and second transistors whose common electrodes are connected to each other, and a first power supply line from one power supply line to the common electrode of the differential transistor pair. A power supply means, second and third power supply means connected between each output electrode of the differential transistor pair and the other power supply line, and a current connected to each output electrode of the differential transistor pair. and subtraction means, and is configured to extract an output from the current subtraction means and apply an input signal to at least one input electrode of the differential transistor pair, so that the input terminal voltage is set to one of the two. Full operation is possible even when the potential is equal to that of the feed line.

DESCRIPTION OF EMBODIMENTS An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of an amplifier circuit according to an embodiment of the present invention, in which the emitters of PNP transistors 11 and 12 are connected to each other, and the collector of a PNP transistor 13 that operates as a constant current source is connected. . The transistor 1
The bases of transistors 1 and 12 are connected to input terminals 8 and 9, respectively, and the bases of transistors 11 and 12 are connected to input terminals 8 and 9, respectively.
Each collector operates as a constant current source.
Connected to the collectors of NPN transistors 14 and 15. Furthermore, the transistor 11
The collector of the base and collector are connected
It is connected to the base of PNP transistor 16 and to the base of PNP transistor 17. The collector of the transistor 17 is connected to the collector of the transistor 12 and also to the output terminal 10. On the other hand, the emitters of the transistors 16 and 17 are both connected to the constant voltage output of a constant voltage circuit 19, and a current subtraction circuit 21 is configured by a current mirror circuit 18 constituted by the transistors 16 and 17 and the constant voltage circuit 19. ing.

The operation of the amplifier circuit of this embodiment configured as described above will be described below.

Let the collector currents of the transistors 11, 12, ₁₄ , ₁₅ , and 17 be I ₁₁ , I 12 , I 14 , I ₁₅ , and I ₁₇ , respectively, and let the current that can flow from the output terminal 10 be I ₀ , then I ₁₁ and I ₁₄ The difference between is I ₁₇ , and the difference between I ₁₂ and I ₁₅ and I ₁₇ is I ₀ . i.e. I ₁₄ and I ₁₅ are always I ₁₁
and I ₁₂ , I ₁₇ = I ₁₄ −I ₁₁ I ₀ = I ₁₇ −(I ₁₅ −I ₁₂ ), and I ₀ is finally expressed by the following equation.

I ₀ = (I ₁₂ - I ₁₁ ) + (I ₁₄ - I ₁₅ ) Here, if I ₁₄ is equal to I ₁₅ , I ₀ = I ₁₂ - _{I 11} . That is, when the potential of the non-inverting input terminal 8 is lower than the potential of the inverting input terminal 9, _I11 becomes greater than _I12 , and the current appearing at the output terminal 10 becomes a sinking current, and the potential of the terminal 10 decreases. Conversely, when the potential of the non-inverting input terminal 8 is higher than the potential of the inverting input terminal 9, the output terminal 10 is
The potential of increases. The relationship between the input potential and the output potential is as described above, but if we look at the potentials at the main points, the collector potential of the transistor 11 (V ₁₁
) is determined by the constant voltage output potential (denoted as V _R ) of the constant voltage circuit 19 and the base-emitter voltage of the transistor 16 (approximately 0.6 V).

V ₁₁ ≒V _R −0.6 [V] Here, set V _R so that it does not exceed twice the voltage between the base and emitter of the transistor, and for example
If it is 0.8V, V ₁₁ ≒0.2V. At this time, assuming that the input voltages at both input terminals are extremely small, the emitter potential of the transistors 11 and 12 is approximately the base-emitter voltage (approximately 0.6V).
be equivalent to. Therefore, the transistor 11 operates with a collector-emitter voltage of about 0.4V, and the transistor 14 operates with a collector-emitter voltage of about 0.4V.
Although it will operate at 0.2V, it will work well with a collector current of about 10 μA. That is, even if the input voltages at both input terminals are extremely small, a normal output voltage is output to the output terminal 10.

As described above, according to this embodiment, the subtraction of both collector currents of the differential transistor pair (transistors 11 and 12) is not performed directly by the current mirror circuit composed of the differential transistor pair and complementary transistors. , subtracting the same bias current (collector currents of the transistors 14 and 15) from both collector currents of the differential transistor pair, and applying the result to a current mirror circuit composed of transistors of the same type as the differential transistor pair. By subtracting , the two bias currents cancel each other out, and the difference between the collector currents of the differential transistor pair is outputted to the output terminal, and operation is possible even when the input terminal voltage is 0V. In addition, if the configuration is as in this example, 1V
It is possible to operate even at a relatively low voltage. For example, when the transistor is operating normally, the collector-emitter voltage is 0.2V, and the base-emitter voltage is 0.2V.
If it is 0.6V, the constant voltage output of the constant voltage generation circuit 19 is 0.8V, and the input voltage range is 0V to 0.2V,
All transistors operate normally even when the power supply voltage is 1V.

It goes without saying that in the above embodiments, each transistor may be composed of complementary transistors.

Effects of the Invention As is clear from the above description, the present invention includes a pair of differential transistors, a constant current source for subtracting the same bias current from both current outputs, and a pair of differential transistors including these bias currents. Since it is composed of a current subtraction circuit that performs current subtraction processing for both current outputs of a pair, it has the excellent effect that normal circuit operation can be obtained even if the input unit with respect to the potential of the reference power supply electrode is extremely small. It will be done.

Furthermore, the current subtraction circuit includes a pair of transistors whose input electrodes are connected to each other, one of which is diode-connected, and a common electrode of the transistor pair.
By connecting to a constant voltage circuit of about 0.8V,
The excellent effect is that normal operation can be achieved with a power supply voltage as low as 1V.

[Brief explanation of drawings]

FIG. 1 is a circuit connection diagram of an amplifier circuit according to an embodiment of the present invention, and FIG. 2 is a circuit connection diagram of a conventional amplifier circuit. 1... Positive side feed line, 2... Negative side feed line,
8, 9...Input electrode, 10...Output electrode, 11...
...First transistor, 12... Second transistor, 13... First power feeding means, 14... Second power feeding means, 15... Third power feeding means, 19... Constant voltage generating means, 21 ...Current subtraction means, 22...
Fourth power supply means.

Claims (1)

[Claims] 1. A first and a second electrode whose common electrodes are connected to each other.
a differential transistor pair made up of transistors, a first power feeding means from one feed line to a common electrode of the differential transistor pair, and between each output electrode of the differential transistor pair and the other feed line. The current subtracting means is connected to the output electrode of the first transistor, and the current subtracting means is connected to the output electrode of the first transistor. a third transistor whose input electrode and output electrode are connected; and a fourth transistor whose input electrode is connected to the output electrode of the first transistor and whose output electrode is connected to the output electrode of the second transistor; The third and fourth transistors each have a constant voltage generating means that maintains the common electrodes at a constant voltage, and extracts an output signal from the output electrode of the fourth transistor of the current subtracting means. An amplifier circuit that applies the output signal to at least one input electrode. 2. The constant voltage generation means is connected to a fourth power supply means from one power supply line, a fifth transistor whose output electrode is connected to the fourth power supply means, and an output electrode and an input electrode of the fifth transistor. a first resistor connected between the input electrode of the fifth transistor and the other power supply line, and a second resistor connected between the input electrode of the fifth transistor and the other power supply line; The amplifier circuit according to claim 1, which obtains the following.