JPH058553Y2 - - Google Patents

Description

[Detailed description of the invention] (Field of industrial application) The present invention is an electronic watch in which the power supply section and the clock section are separated, and the present invention uses a power line connecting the power supply section and the clock section to The present invention relates to an electronic timepiece that applies a time adjustment signal to the electronic timepiece.

(Prior art) Generally, even in wall clocks, etc., the operating section for time adjustment is provided on the main body of the clock.
A watch in which the operating section is separated from the main body of the watch, as shown in Japanese Patent No. 127590, has also been devised.

(Problem to be solved by the invention) If the operating section is separated from the watch body as described above, a signal line that electrically connects the operating section and the watch body will be exposed, which is not desirable in terms of appearance. .

Particularly, in wall clocks and the like that derive their power supply voltage from an outlet in a house, there are problems in that the number of signal lines increases in addition to the power supply line, which significantly deteriorates the appearance and also makes wiring more difficult.

The purpose of this invention is to provide an electronic watch in which the power supply section and the clock section are separated and connected by a power line, and the purpose of this invention is to transmit time adjustment signals to the operation section which is separated from the clock section, without increasing the number of signal lines. Our goal is to provide electronic watches that can be sent from.

(Means for Solving the Problems) The electronic timepiece of the present invention is composed of a clock section, an operation section and a power supply section that are separated from this. The clock section includes an oscillation section that outputs frequency signals of different periods, a pulse generator that outputs pulse signals corresponding to changes in the frequency signals, and a switch circuit that cuts off power supply only when the pulse signals are generated. It consists of a count circuit that counts a constant periodic signal up to a constant value, a reset circuit that resets the count circuit in response to a signal from a switch circuit supplied from the power line, and a correction control that corresponds to the count value of the count circuit. It has a correction control circuit that outputs a signal, and a smoothing circuit that smoothes the signal from the switch circuit and supplies it to the power supply terminal.

(Function) In the electronic timepiece of the present invention, the power supplied by the power line connecting the timepiece part and the power supply part is cut off at different cycles according to the operation of each switch.
The time is corrected by detecting which switch was operated based on the interval.

That is, when the switch is operated, the oscillator outputs a frequency signal corresponding to the switch, and in response, the pulse generator outputs a pulse signal with a period corresponding to the frequency signal input.

When a pulse occurs in this pulse signal, the switch circuit temporarily cuts off the power supply.

The reset circuit resets the count circuit when the power is cut off by the switch circuit, and the count circuit counts the interval from one time the power is cut off until the next time the power is cut off.

Therefore, the count value of the count circuit differs depending on whether the interval is long or short, and the correction control circuit outputs a correction control signal according to this count value, and for example, changes the hour digits and minute digits in response to a switch operation. Correct it.

Furthermore, since the power supply is temporarily cut off by the switch circuit, a smoothing circuit is provided to ensure a stable power supply.

(Example) An example of the present invention will be described below based on the drawings.

FIG. 3 is an external view of an electronic timepiece according to an embodiment of the present invention.

As shown in FIG. 3, the electronic watch in this embodiment includes a watch main body 2 that includes a built-in clock section having a display section 8 for displaying the time, etc., a power supply section, and a switch.
It consists of an operating unit having SW ₁ , SW _2, etc., and an operating body 4 containing built-in operating units.

The watch body 2 and the operating body 4 are connected only by a power line 6, and the power supply voltage and switch _SW1 ,
The operation signal for SW ₂ is supplied.

1A is a diagram showing the circuit configuration of the power supply unit and the operation unit in the operating body 4 shown in FIG. 3, and FIG. 1B is a diagram showing the circuit configuration of the clock unit in the watch body 2 shown in FIG. FIG.

Reference numeral 10 denotes a power supply section, which mainly uses a diode 12 and a capacitor 14 to constantize the voltage from the secondary winding 16 and output the same.

Reference numeral 18 denotes an operation section, which includes an oscillation section 20, a pulse generator 22, and a switch circuit 24.

The oscillator 20 is composed of diodes 26 and 28 which become conductive when the switches SW ₁ and SW ₂ are operated, and the diodes 26 and 28 and the diodes 30 and 32 in the power supply section 10 constitute a full-wave rectifier circuit.

In the case of this embodiment, a half-wave rectified signal is obtained when switch SW ₁ is turned on, and a full-wave rectified signal is obtained when switch SW ₂ is turned on. ing.

The pulse generator 22 has a transistor 3 whose base inputs the output signal of the oscillation section 20 via a resistor 34, whose collector is connected to the (+) output terminal of the power supply section 10 via a resistor 36, and whose emitter is grounded.
8, an integrator circuit consisting of a capacitor 40 and a resistor 42 connected between the base and emitter of the transistor 38, and the base connected to the collector of the transistor 38 and the collector connected to the (+) It consists of a transistor 46 connected to its output end and whose emitter is grounded, and a resistor 48 connected between the collector of this transistor 46 and the switch circuit 24.

The switch circuit 24 consists of a transistor 50 having a base connected to a resistor 4 in the pulse generator 22.
8 is connected, the emitter is connected to the (+) output terminal of the power supply section 10, and the collector is further connected to the (+) input terminal of a clock section to be described later.

52 is a clock section, which includes a display section 8, a clock circuit 54 that measures the time and drives the display section 8 to display the time, a count circuit 56, and a reset circuit 58.
, a correction control circuit 60 , and a smoothing circuit 62 .

The count circuit 56 includes an AND gate 64 that inputs a constant periodic signal from the clock circuit 54 to one input terminal, and inverts a signal from the output Qm of the final stage of the counter, which will be described later, and inputs it to the other input terminal. The counter 66 inputs the output signal to the clock input φ and inputs the signal from the reset circuit 58 to the reset input R.

The reset circuit 58 has a base connected to the (+) output end of the operating section 18 and further grounded via a resistor 68, an emitter connected to the (+) output end of the smoothing circuit 62, and a resistor 70. The transistor 72 has a collector grounded and a collector grounded.

The correction control circuit 60 outputs the output Qn of the counter 66,
Flip-flop (hereinafter abbreviated as "FF") that inputs the signals from Q2n to the set input S.
74, 76, and an FF 78, which inputs the signals from their respective outputs Q to the data input D, and inputs the signal from the reset circuit 58 to the clock input φ.
80 and the signal from the output Q2n of the counter 66.
AND gate 82 which inputs the signal from output Q of FF78, its output signal and the output of counter 66
an OR gate 84 which receives a signal from Qm and applies the signal to each reset input R of FFs 76 to 80;
It is composed of an OR gate 86 which inputs the output signal thereof and a signal from the output Q of the FF 76 and applies a signal to the reset input R of the FF 74.

The smoothing circuit 62 includes a diode 88 and a capacitor 9.
It is composed of 0.

Next, the operation of this embodiment having the above configuration will be described in a second manner.
The explanation will be based on the time chart shown in the figure.

First, when the switch SW ₁ is turned on, a half-wave output of half the signal A is generated at the output of the oscillation section 20.

Transistor 38 becomes conductive when a half-wave power is applied to its gate, which causes transistor 46 to become non-conductive.

When this transistor 46 becomes non-conductive,
The transistor 50 also becomes non-conductive, and the power supply section 1
The (+) output terminal of 0 will be cut off.

When a half-wave output is generated in the output of the oscillation unit 20 in this way, the pulse generator 22
periodically cuts off the switch circuit 24 and generates a pulse in the signal B from the (+) output terminal.

When a pulse is generated in this signal B, the transistor 72 in the reset circuit 58 becomes conductive in response to the pulse, and an H level pulse is generated in the output signal C from its collector.

When a pulse occurs in this signal C, the counter 6
6 is reset, its output Qm goes to L level, and as a result, AND gate 64 becomes open. As a result, a constant periodic signal is generated at the output of the AND gate 64, and the counter 66 starts counting.

The count progresses and the output Qn of the counter 66 becomes H.
When the output Q2n reaches the H level, the FF74 is set, and when the output Q2n goes to the H level, the FF76 is set.

When the output Q of this FF76 becomes H level, this H level signal is passed through the OR gate 86 to the FF
It is applied to the reset input R of FF 74 to reset it, and is also applied to the data input D of FF 80.

When a pulse occurs again in signal C, the counter 66 is reset and continues counting again in the same manner as above, and FF 80 sets signal D from its output Q to H level in synchronization with the pulse of signal C. .

When this signal D becomes H level, the clock circuit 54
In response to this signal D, for example, the display of the hour digits is fast-forwarded and corrected.

When the switch SW ₁ is turned off, the transistors 38 and 46 in the pulse generator 22 return to the non-conductive and conductive states, respectively, so that the transistor 50 in the switch circuit 24 is kept in the conductive state.

Therefore, no pulse is generated in signal B,
As a result, no pulse is generated in the output signal C of the reset circuit 58 either.

Therefore, the counter 66 continues counting until its output Qm reaches the H level, and this output Qm reaches the H level.
When the level is reached, enter this and gate 6
4 is in the closed state, and the counter 66 stops counting.

Also, when the signal from the output Qm becomes H level, this signal is passed through the OR gate 84 to the FF74.
~80 to hold them in the reset state. Therefore, the output signal D of the FF 80 returns to the L level, and the correction of the hour digits is completed.

Next, when switch SW ₂ is turned on, the oscillator 2
A signal A is generated at the output of 0. For this reason, the transistors 38 and 46 repeat conduction and non-conduction with double the period compared to when the switch SW ₁ is turned on, and therefore the transistor 5
0 similarly repeats conduction and non-conduction, and pulses are generated in signal B at shorter intervals.

Therefore, compared to the operation described above, the interval between the counter 66 being reset and the next reset is shorter, and its output Qn becomes H level.
It will be reset before the next output Q2n becomes H level.

Therefore, when the output Qn goes to the H level and the FF 74 is set, a pulse is generated in the signal C at this point, and in synchronization with this pulse, the FF 78 changes the signal E from the output Q to the H level.

When this signal E becomes H level, the clock circuit 54 inputting this signal fast-forwards and corrects the display of digits by that amount, for example.

When the switch SW ₂ is turned off, no pulse is generated in the output signal C of the reset circuit 58, as in the case of the switch SW ₁ described above.
The counter 66 continues counting without being reset, and its output Qm is set to H level.

When this output Qm becomes H level, the counter 66 stops and FF74 to
80 enters the reset state, whereby the signal E returns to the L level and the correction of the minute digit is completed.

In this embodiment, the power supply from the power supply unit 10 is intermittently cut off by the switch circuit 24, but the time for which it is cut off is set to be extremely short. Also, a smoothing circuit 62 is provided to supply smoothed power to each circuit, so that there is no effect on the operation of other circuits such as the clock circuit.

(Effects of the invention) According to the invention, the power supply is cut off at different cycles depending on the operation of each switch, and the corrective action corresponding to the operated switch is performed according to the cycle. Therefore, signals from the operating section can be transmitted to the clock section without increasing the number of signal lines in addition to the power supply line, and the appearance and wiring work can be improved.

[Brief explanation of the drawing]

1A and 1B are diagrams showing the circuit configuration of an electronic timepiece according to an embodiment of the present invention, FIG. 2 is a time chart of the signals in FIGS. 1A and B, and FIG.
FIG. 2 is an external view of the electronic timepiece shown in FIGS. A and B. FIG. 2... Watch body, 4... Operating body, 6... Power line, 8... Display section, 10... Power supply section, 18... Operation section, 20... Oscillation section, 22... Pulse generator,
24...Switch circuit, 52...Clock part, 54...
... Clock circuit, 56 ... Count circuit, 58 ... Reset circuit, 60 ... Correction control circuit, 62 ... Smoothing circuit.

Claims (1)

[Scope of claim for utility model registration] The clock part and this clock part are configured separately,
and an operation section that has a plurality of switches to control the display of the clock section and a power supply section that supplies power to the clock section, and the clock section is composed of a clock circuit that measures and displays the time and a display section. Further, in the electronic timepiece, a signal line from the operation section is connected to a power line from the power supply section, the operation section includes an oscillation section that can extract a frequency signal with a different cycle each time each switch is operated; It includes a pulse generator that outputs a pulse signal in response to a change in the frequency signal from the oscillation section, and a switch circuit that cuts off the power supply from the power supply section only when the pulse signal is generated from the pulse generator. , the clock section includes a count circuit that counts a constant periodic signal from the clock circuit up to a constant value, a reset circuit that outputs a reset signal that resets the count circuit in response to a signal from the switch circuit; a correction control circuit that outputs different correction control signals to the clock circuit in accordance with the count value from the count circuit; a smoothing circuit that smoothes the signal from the switch circuit and supplies it to the power supply terminal of each of the circuits; An electronic watch characterized by having.