JPH0586123U - Video tape recorder clock unset warning device - Google Patents

Abstract

(57) [Summary] [Object] The purpose of the present invention is to provide a control device for displaying the clock unset state on the monitor screen when the user presses the clock adjustment key in the state where the current time is not set. To provide. [Constitution] The clock non-setting warning device of the present invention includes an instant recording key of the VTR and a clock adjusting key for adjusting the time such as program set or on time / off time.
A VTR operation key that operates various functions of the VTR, a microcomputer that receives the operation signal of the clock adjustment key and the VTR operation key, and an OSD circuit that displays specific characters on the monitor by the control signal generated from the microcomputer. Including.

Description

[Detailed description of the device]

[0001]

[Industrial applications]

 The present invention relates to a device for warning the unset clock of a video tape recorder (hereinafter referred to as VTR), and particularly, when the VTR is set for immediate recording and program set or on / off time, the clock is set. If not, it relates to a device that displays the fact that the clock has not been set on the monitor.

[0002]

[Problems to be solved by conventional techniques and devices]

 While using the VTR, it is often the case to use the instant recording (OTR: One Touch Record or IRT: Instant Recording Timer) function, or set a program for scheduled recording. In addition, there are times when the VTR is turned on and off automatically by setting the on-time / off-time to the VTR. In such a case, the reserved time, that is, the clock must be set using the clock adjustment key provided on the VTR. However, conventional VTRs did not proactively display the clock when it was not set, so immediate recording and program set or on-time / off-time were often unavailable. In addition, even if the user presses the adjustment key of the clock, it does not perform any operation, so it was often mistaken for the VTR to be faulty.

An object of the present invention is to provide a control device for displaying a command to adjust the time on the monitor screen when the user presses the clock adjustment key while the clock is not set.

[0004]

[Means for Solving the Problems]

 In order to achieve the above object, the clock non-setting warning device of the present invention includes a clock setting section for internally setting the current time by an input signal of the key for setting the current time; a power-on key, a program setting key. , A key input setting section for internally setting the input signal of the clock adjustment key including the instant recording key and the on / off time key and the input signals of a large number of operation keys other than the clock adjustment key; In response to the clock adjustment key input signal of, the clock setting state of the clock setting section is judged, and when the current time is not set, the current time is displayed on the monitor through the OSD circuit for a preset time. And a control unit for generating a control signal for displaying a message to set.

[0005]

【Example】

 An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is an overall configuration diagram showing the configuration of the present invention. When the user inputs the current time to the VTR, the clock setting unit 11 internally sets the current time, and the key input setting unit 13 inputs the VTR power-on key and immediate recording. And the input of the clock adjustment key 2 for adjusting the program set or the on / off time and the input of the VTR operation key 4 for operating the various functions of the VTR, and the key code corresponding to the input of that key is determined. Remember the value. The counter unit 15 starts counting operation for a preset time when the input of the clock adjustment key 2 is set in the key input setting unit 13, and the V TR operation key is set in the key input setting unit 13. When the 4 key input is set, the counting operation is stopped. The control unit 19 determines whether or not the current time is set in the clock set unit 11 in response to the input of the clock adjustment key of the key input setting unit 13. If the current time is not set, the control unit 19 checks in advance. During the set time, the control signal is output to the OSD circuit 8 and the display character for setting the current time is displayed on the OSD screen of the monitor 10.

Referring to FIG. 2, a device for issuing a clock non-setting warning in a VTR according to the present invention includes an immediate recording key of the VTR and a clock adjustment key 2 for adjusting time such as program set and on / off time. And a VTR operation key 4 for operating various functions of the VTR, a timer micro computer 6 which receives signals from the clock adjustment key 2 and the VTR operation key 4, and a signal which is received from the timer microcomputer 6 for monitoring. An OSD circuit 8 for displaying characters on the screen 10 and a monitor 10 for displaying characters on the screen by a signal transmitted from the OSD circuit 8. The microcomputer 6 is programmed to perform a key input processing function, a timer function or an OSD control function.

The RAM 18 includes a large number of registers, and as these registers, three registers constructed according to the present invention, that is, a HOUR register 11, a key code register 13, and a 5SCNT register 15 are used. The HOUR register 11 is a register that holds the current time (for example, 1 to 24:00) set by the user, and consists of 8 bits. Of the 8 bits, the lower 4 bits represent one unit of time, and the upper 4 bits represent 10 units of time. The time set in this register is stored as a BCD (Binary Coded Dece mal) code. Therefore, if the time is set, the value of 0 is always set in the position of the most significant bit (that is, bit 7), and it is possible to judge whether the time is set by the value of this bit 7. ..

The key code register 13 stores the code value of the operation key selected by the user, and is composed of an 8-bit register. Various key code data are from $ 00 to $ 3F (hexadecimal number), and when there is no key input, the CPU 19 stores the $ FF value. Since the key code data stored in the key code register 13 is also stored as a BCD code, when there is a key input, the most significant bit (bit 7) is always set to the value "0". Therefore, it is possible to judge whether or not the key is input by the value of this bit. The code value in the key code register 13 can also be transmitted to an accumulator (A) register (not shown) in the CPU 19. Therefore, the CPU 19 can judge the contents of the A register instead of judging the contents of the key code register 13. According to the present invention, the input of the OTR keys other than the operation keys and the input of the clock set keys such as the program set and the on-time / off-time are configured to be judged from the corresponding key code data.

The CPU 19 discriminates the content of bit 7 of the HOUR register 11 and outputs a control signal to the OSD circuit 8 if “1” is set, that is, if the time setting is not made. .. The OSD circuit 8 displays a specific display character on the OSD screen of the monitor 10 according to this control signal. In the preferred embodiment of the present invention, the phrase "set clock" is displayed as the specific display character.

In this case, the specific display character is generated for a preset time, for example, for about 5 seconds, and this is performed by the 5SCNT register 15 and the time is determined by the CPU 19. Checked. If there is a key input while displaying the specific display character, that is, if the content of bit 7 in the A register is "1", the character is turned off.

The operation of the clock unset warning device according to the present invention will be described in detail with reference to the flowchart of FIG. In the OSD execution mode, it is determined whether the power is on (step S1), and if it is off, the process returns. In case of power-on, it is judged whether the clock is set by checking the content of bit 7 of HOUR register 11 (step S2). If so, execute OSD mode, and if not, execute. "Set clock" is displayed on the monitor 10 (step S3). In step S4, the contents set in the key code register 13 are transmitted to the A register, and the contents of bit 7 of the A register are checked in step S5 to check whether any operation key is input. to decide. If there is an operation key input, the "Set clock" display disappears.

If there is no operation key input, the 5SCNT register 15 continues to hold the character "SET CLOCK" for 5 seconds (steps S6, S7). After the lapse of 5 seconds, displaying characters on the monitor is stopped (step S8), and it is determined whether there is a key input related to the clock. This judgment is made by transmitting the data in the key code register 13 into the A register (step S9), and then judging from the key code data in the A register (steps S10, S11, S12). Performs OSD if there is no key input associated with the clock. If there is a key input related to the clock, drive the OSD circuit 8 to display the message "Set clock" on the monitor 10, and then enter any other operation key input as described above. If there is (steps S14 and S15). If there is any key input, move to step S18 and turn off the display of "Set clock" and execute OSD mode. If there is no arbitrary key input, it is determined whether 5 seconds have elapsed (steps S16 and S17). If 5 seconds have not passed yet, “Set clock” is displayed continuously, and if 5 seconds have passed, the character display is interrupted (step S18) and the OSD mode is executed.

[0014]

[Effect of the device]

 As described above, according to the present invention, it is possible to prevent confusion that may occur when the clock of the VTR is not set, and thus it is possible to improve the convenience in using the VTR.

[Brief description of drawings]

FIG. 1 is a block diagram showing a functional configuration of a clock unset warning device of the present invention.

FIG. 2 is a block diagram showing a circuit configuration of a clock unset warning device of the present invention.

FIG. 3 is a flowchart illustrating a clock unset warning method of the present invention.

FIG. 4 is a flowchart illustrating a clock unset warning method of the present invention.

[Explanation of symbols]

 2 Clock adjustment key 4 VTR operation key 6 Microcomputer 8 OSD circuit 10 Monitor

Claims (4)

[Scope of utility model registration request] 1. In a video tape recorder, a clock setting unit for internally setting the current time by an input signal of a key for setting the current time; a power-on key, a program set key, an instant recording key, and an on / off key.
A key input setting section for internally setting an input signal of a clock adjustment key including an off-time key and input signals of a large number of operation keys other than the clock adjustment key; according to a clock adjustment key input signal of the key input setting section Control signal indicating the clock setting state of the clock setting section, and when the current time is not set, the OSD circuit sets the current time on the monitor for a preset time. A clock unset warning device, comprising: 2. The clock setting unit is composed of an 8-bit register that stores the current time set by the user in an 8-bit state of a BCD code, and the control unit is the 8-bit register.
2. The clock non-setting warning device according to claim 1, wherein it is judged whether or not the current time is set from the state of the most significant 1 bit of the bit register. 3. The key input setting section comprises an 8-bit register for storing a value of a key code corresponding to each input of the clock adjustment key and a plurality of operation keys in a BCD code, and the control section. 3. The input of the clock adjustment key is judged from the value of the key code in the register, and the input of the operation key is judged from the state of the most significant 1 bit in the register.
Clock unset warning device described. 4. The clock non-setting warning device starts a counting operation during the preset time in response to the clock adjustment key input of the key input setting unit under the control of the control unit. The counter unit further includes a counter unit, and the counter unit interrupts the counting operation according to the operation key input signal of the key input unit under the control of the control unit. Clock unset warning device.