JPH05892Y2 - - Google Patents

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Publication number
JPH05892Y2
JPH05892Y2 JP1057386U JP1057386U JPH05892Y2 JP H05892 Y2 JPH05892 Y2 JP H05892Y2 JP 1057386 U JP1057386 U JP 1057386U JP 1057386 U JP1057386 U JP 1057386U JP H05892 Y2 JPH05892 Y2 JP H05892Y2
Authority
JP
Japan
Prior art keywords
shielding layer
transparent electrode
liquid crystal
light
light shielding
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1057386U
Other languages
Japanese (ja)
Other versions
JPS62123626U (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1057386U priority Critical patent/JPH05892Y2/ja
Publication of JPS62123626U publication Critical patent/JPS62123626U/ja
Application granted granted Critical
Publication of JPH05892Y2 publication Critical patent/JPH05892Y2/ja
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Description

【考案の詳細な説明】 〔産業上の利用分野〕 本考案はブラツクマトリクス液晶パネルのマス
ク設計に関するものである。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a mask design for a black matrix liquid crystal panel.

〔考案の背景〕[Background of the idea]

近年液晶テレビやポータブルゲーム等の電子機
器が開発されるに至つているが、このような電子
機器においてはコントラストが良く信頼性のある
液晶パネルを搭載していることが要求される。
In recent years, electronic devices such as liquid crystal televisions and portable games have been developed, and such electronic devices are required to be equipped with liquid crystal panels that have good contrast and are reliable.

〔従来の技術〕[Conventional technology]

従来の上下出し液晶パネルを第5図、第6図に
示し、第5図はブラツクマトリクスの形成状態を
示すパターン図、第6図は遮光層を除いた状態の
パターン図である。図に於いて、501,502
は上下出し電極である上基板に形成される上基板
透明電極層、503はタイミング電極である下基
板に形成される下基板透明電極層、505は該上
下両基板透明電極層501,502及び503の
交差した箇所に構成される画素、507は上基板
透明電極層501,502上に積層される遮光
層、509は下基板透明電極層503上に積層さ
れる遮光層、511は上下に2分割されている上
基板透明電極層501,502の上下出し境界部
である。第5図からわかるように、上、下基板透
明電極層501,502,503上に遮光層50
7,509を積層して形成するため、ほとんどの
領域の画素505の周辺はほぼ遮光層507,5
09でおおわれて、ブラツクマトリクスの構造を
呈するが該上下出し境界部511には上、下基板
透明電極層501,502,503がないために
遮光層507,509が配設されない。その結果
として実際に液晶パネルに映像を映し出している
際、上下出し境界部511に白線が生じてしまい
見づらくなる、という欠点がある。
A conventional vertically stacked liquid crystal panel is shown in FIGS. 5 and 6. FIG. 5 is a pattern diagram showing a state in which a black matrix is formed, and FIG. 6 is a pattern diagram without a light shielding layer. In the figure, 501, 502
503 is a lower substrate transparent electrode layer formed on the lower substrate and is a timing electrode; 505 is a transparent electrode layer 501, 502, and 503 on both upper and lower substrates. 507 is a light-shielding layer laminated on the upper substrate transparent electrode layers 501 and 502, 509 is a light-shielding layer laminated on the lower substrate transparent electrode layer 503, and 511 is divided into upper and lower halves. This is the boundary between the upper and lower transparent electrode layers 501 and 502 on the upper substrate. As can be seen from FIG.
7,509, the periphery of the pixel 505 in most areas is almost covered with light shielding layers 507, 5.
09, exhibiting a black matrix structure, but since there are no upper and lower substrate transparent electrode layers 501, 502, 503 at the upper and lower boundary portions 511, no light shielding layers 507, 509 are provided. As a result, when an image is actually displayed on the liquid crystal panel, a white line appears at the upper and lower boundary portions 511, making it difficult to see.

〔考案の目的〕[Purpose of invention]

本考案の目的は、上記欠点を改良し、コントラ
ストの良い高い信頼性を有したブラツクマトリク
ス液晶パネルを提供することにある。
An object of the present invention is to improve the above-mentioned drawbacks and provide a black matrix liquid crystal panel with good contrast and high reliability.

〔実施例〕〔Example〕

第1図は本考案に基づいた実施例のブラツクマ
トリクス液晶パネルのパターン図(遮光層は図示
せず)である。
FIG. 1 is a pattern diagram of a black matrix liquid crystal panel according to an embodiment of the present invention (the light shielding layer is not shown).

第1図に於いて、101,103,105は下
基板に形成される下基板透明電極層を、109,
111は上基板に形成される上基板透明電極層
を、113は上下出し境界部を示している。第1
図と第6図を比較してわかるように、本実施例で
は上下出し境界部113の下側に配設される下基
板透明電極層103の幅が広げられ、また上下出
し境界部113の上側に配設される下基板透明電
極層105の幅が縮められて構成されている。さ
らに、第6図との比較でわかるように、上下出し
境界部113の上側に配設される上基板透明電極
層111は下方へ伸びており、かつ、それに付随
して上下出し境界部113の下側に配設される上
基板の透明電極層109が縮められて構成されて
いる。第1図に示す構成は、従来例で示した上下
出し境界部511に生じる白線を遮光層でおお
い、より完全なブラツクマトリクスを作成するた
めにとられたものである。第2図は、第1図の
上、下基板透明電極層上に遮光層を積層した積層
状態を示す分解図である。第2図において第1図
と同一番号は同一部材を示し説明を省略する。第
2図における201は上基板透明電極層111上
に積層される遮光層、203,205,207は
下基板透明電極層103,105上に積層される
遮光層である。第2図からわかるように、上下出
し境界部113は遮光層201が上側の上基板透
明電極層111の下端のみに、また下基板透明電
極層103,105には等間隔で任意の幅を有す
る遮光層203,205が下基板透明電極層10
3,105の長手方向と交差するように、さらに
下基板透明電極層103の上端部および下基板透
明電極層105の下端部に各下基板透明電極層1
03,105の長手方向に並行して遮光層20
7,208が配設される構成をとる。第3図は本
考案のブラツクマトリクスの一部を示し、第2図
に示した遮光層を積層した上、下両基板上に形成
された上、下基板透明電極層103,105及び
109,111を重ねて図示した組立パターン図
である。第3図において、第1図、第2図と同一
番号は同一部材を示し説明を省略する。第3図か
らわかるように、第1図、第2図に示した上下基
板透明電極層109,111及び103,10
5、および遮光層201,203,205,20
7,208の構成をとることにより、上下出し境
界部113上に遮光層207が積層されることに
なり従来例で示した白線を生じさせないことが可
能となつた。また、第3図において、遮光層20
7の下端が上下出し境界部113より下側の位置
に、遮光層205の上端が上基板の遮光層201
の上端と同じ位置になるように配設しているの
は、上、下両基板の合わせズレによる遮光層の幅
の変化が一定で、液晶パネル全面の画素の大きさ
が常に一定に保たれるように構成しているためで
ある。第4図は本考案に基づく他の実施例を示す
パターン図であり、401,403,405,4
07は上基板透明電極層、409,411,41
3は下基板透明電極層、415,417は下基板
透明電極層上に積層される遮光層、419は上基
板透明電極層上に積層される遮光層である。尚、
遮光層は透明電極層の配線抵抗を下げるために
Ni又はCrを使用している。
In FIG. 1, 101, 103, 105 indicate lower substrate transparent electrode layers formed on the lower substrate, 109,
Reference numeral 111 indicates an upper substrate transparent electrode layer formed on the upper substrate, and 113 indicates an upper and lower boundary portion. 1st
As can be seen from a comparison between the figure and FIG. The width of the lower substrate transparent electrode layer 105 disposed on the lower substrate is reduced. Furthermore, as can be seen from a comparison with FIG. 6, the upper substrate transparent electrode layer 111 disposed above the upper and lower boundary parts 113 extends downward, and accordingly The transparent electrode layer 109 of the upper substrate disposed on the lower side is shrunk. The configuration shown in FIG. 1 was adopted in order to cover the white line occurring at the upper and lower boundary portions 511 shown in the conventional example with a light-shielding layer to create a more complete black matrix. FIG. 2 is an exploded view showing a laminated state in which a light shielding layer is laminated on the upper and lower transparent electrode layers of FIG. 1. In FIG. 2, the same numbers as in FIG. 1 indicate the same members, and the explanation will be omitted. In FIG. 2, 201 is a light shielding layer laminated on the upper substrate transparent electrode layer 111, and 203, 205, and 207 are light shielding layers laminated on the lower substrate transparent electrode layer 103, 105. As can be seen from FIG. 2, in the upper and lower boundary portions 113, the light shielding layer 201 is provided only at the lower end of the upper substrate transparent electrode layer 111 on the upper side, and the lower substrate transparent electrode layers 103 and 105 have an arbitrary width at regular intervals. The light shielding layers 203 and 205 are the lower substrate transparent electrode layer 10
Further, each lower substrate transparent electrode layer 1 is attached to the upper end portion of the lower substrate transparent electrode layer 103 and the lower end portion of the lower substrate transparent electrode layer 105 so as to intersect with the longitudinal direction of
03, 105 in parallel with the longitudinal direction of the light shielding layer 20
7,208 are arranged. FIG. 3 shows a part of the black matrix of the present invention, in which the light-shielding layer shown in FIG. FIG. In FIG. 3, the same numbers as in FIGS. 1 and 2 indicate the same members, and their explanations will be omitted. As can be seen from FIG. 3, the upper and lower substrate transparent electrode layers 109, 111 and 103, 10 shown in FIGS. 1 and 2
5, and light shielding layers 201, 203, 205, 20
By adopting the structure of No. 7, 208, the light shielding layer 207 is laminated on the upper and lower boundary portions 113, making it possible to avoid the white line shown in the conventional example. In addition, in FIG. 3, the light shielding layer 20
The lower end of the light shielding layer 205 is located below the upper and lower boundary portions 113, and the upper end of the light shielding layer 205 is located below the upper and lower boundary portions 113.
The reason why the light-shielding layer is placed at the same position as the top edge is that the width of the light-shielding layer changes evenly due to misalignment of both the top and bottom substrates, and the size of the pixels on the entire surface of the LCD panel is always kept constant. This is because it is configured so that FIG. 4 is a pattern diagram showing another embodiment based on the present invention, 401, 403, 405, 4
07 is the upper substrate transparent electrode layer, 409, 411, 41
3 is a lower substrate transparent electrode layer, 415 and 417 are light shielding layers laminated on the lower substrate transparent electrode layer, and 419 is a light shielding layer laminated on the upper substrate transparent electrode layer. still,
The light shielding layer is used to lower the wiring resistance of the transparent electrode layer.
Ni or Cr is used.

〔考案の効果〕[Effect of idea]

本考案は上下出し境界部の上、下両基板上の透
明電極層を第1図に示すように構成し、第2図に
示す如く遮光層を積層することによつて前記上下
出し境界部に遮光層を配設し、上下出しブラツク
マトリクス液晶パネルを実際に表示した際、画面
上に白線を生じさせることなく、コントラストの
良い、高い信頼性を有したブラツクマトリクス液
晶パネルを作成することを可能とした。
In the present invention, the transparent electrode layers on both the upper and lower substrates of the upper and lower boundary parts are configured as shown in FIG. 1, and a light shielding layer is laminated as shown in FIG. By providing a light-shielding layer, it is possible to create a black matrix liquid crystal panel with good contrast and high reliability without causing white lines on the screen when actually displaying a vertical black matrix liquid crystal panel. And so.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図〜第4図は本考案に基づく一実施例を示
し、第1図はブラツクマトリクス液晶パネルのパ
ターン図(遮光層は図示せず)、第2図は第1図
の上下基板透明電極層上の遮光層の積層状態を示
す分解図、第3図は第2図の組立パターン図、第
4図は他の実施例を示すパターン図、第5図、第
6図は従来例を示し、第5図はブラツクマトリク
ス液晶パネルのパターン図、第6図は第1図と比
較するためのパターン図(遮光層は図示せず)で
ある。 109,111,401,403,405,4
07,501,502……上基板透明電極層、1
01,103,105,409,411,41
3,503……下基板透明電極層、201,20
3,205,207,208,415,417,
419,507,509……遮光層、113,5
11……上下出し境界部、505……画素。
1 to 4 show an embodiment based on the present invention, FIG. 1 is a pattern diagram of a black matrix liquid crystal panel (the light-shielding layer is not shown), and FIG. 3 is an exploded view showing the laminated state of the light-shielding layer on the layer, FIG. 3 is an assembled pattern diagram of FIG. 2, FIG. 4 is a pattern diagram showing another embodiment, and FIGS. 5 and 6 show conventional examples. , FIG. 5 is a pattern diagram of a black matrix liquid crystal panel, and FIG. 6 is a pattern diagram for comparison with FIG. 1 (the light shielding layer is not shown). 109,111,401,403,405,4
07,501,502... Upper substrate transparent electrode layer, 1
01,103,105,409,411,41
3,503...lower substrate transparent electrode layer, 201,20
3,205,207,208,415,417,
419,507,509...light shielding layer, 113,5
11... Upper and lower boundary portion, 505... Pixels.

Claims (1)

【実用新案登録請求の範囲】 (1) データ側の電極が上下出し電極構造を有する
マトリクス液晶表示装置のストライプを横断す
る遮光層によりブラツクマトリクスを形成する
液晶表示装置に於て、上下出し電極のつき合せ
部のタイミング電極の一方の巾を広く、他方の
巾を狭く構成し、前記上下出し電極のつき合せ
部を巾の広いタイミング電極に重なる位置に構
成し、該タイミング電極の巾の広い電極と巾の
狭い電極の上下境界側に遮光層を設けたことを
特徴とする液晶表示装置。 (2) 遮光層にNiを用いた実用新案登録請求の範
囲第1項記載の液晶表示装置。 (3) 遮光層にCrを用いた実用新案登録請求の範
囲第1項記載の液晶表示装置。
[Claims for Utility Model Registration] (1) In a liquid crystal display device in which a black matrix is formed by a light-shielding layer that traverses the stripes of a matrix liquid crystal display device in which the data side electrodes have a top-bottom electrode structure, One width of the timing electrode at the abutting portion is configured to be wide and the other width is configured to be narrow, and the abutting portion of the upper and lower electrodes is configured at a position overlapping the wide timing electrode, and the width of the timing electrode is wide. A liquid crystal display device characterized in that a light shielding layer is provided on the upper and lower boundary sides of narrow electrodes. (2) The liquid crystal display device according to claim 1, which uses Ni for the light-shielding layer. (3) The liquid crystal display device according to claim 1, which uses Cr for the light-shielding layer.
JP1057386U 1986-01-28 1986-01-28 Expired - Lifetime JPH05892Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1057386U JPH05892Y2 (en) 1986-01-28 1986-01-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1057386U JPH05892Y2 (en) 1986-01-28 1986-01-28

Publications (2)

Publication Number Publication Date
JPS62123626U JPS62123626U (en) 1987-08-06
JPH05892Y2 true JPH05892Y2 (en) 1993-01-12

Family

ID=30796991

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1057386U Expired - Lifetime JPH05892Y2 (en) 1986-01-28 1986-01-28

Country Status (1)

Country Link
JP (1) JPH05892Y2 (en)

Also Published As

Publication number Publication date
JPS62123626U (en) 1987-08-06

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