JPH0590113A - Si substrate and working method therefor - Google Patents

Abstract

(57) [Abstract] [Purpose] A Si substrate having an unsupported thin layer structure having no support immediately below, which can be applied to an X-ray mask, a light-transmitting substrate, micromachining, and the like, and easily and uniformly A processing method for forming with high precision is provided. A step of forming a non-porous Si substrate having a thin layer formed on one surface and a partially formed porous Si region extending from the surface without the layer to the layer, A step of chemically etching away only the high-quality Si region, leaving the thin layer in contact with the cavity formed by the removal to form an unsupported thin layer having no support immediately below. Si substrate processing method.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a Si substrate which can be applied to a semiconductor device, a light-transmitting substrate, an X-ray mask, a fine mechanical mechanism and the like, and a processing method therefor. The present invention relates to a Si substrate having a structure having an unsupported thin layer and a processing method thereof.

[0002]

2. Description of the Related Art Chemical etching, reactive ion etching, RIE are used as etching methods for bulk Si.
(Reactive lon Etching) and electrolytic polishing are well known.

The chemical etching method is a resist, Si ₃ N
_This is a method in which the Si substrate is soaked in an etching solution using ₄ or SiO ₂ as a mask to etch only the portion not covered by the mask.

The reactive ion etching method is a method of etching only a portion not covered by the mask in a reactive ion atmosphere using a resist, Si ₃ N ₄ or SiO ₂ as a mask.

The electropolishing method is a method in which Si is used as an electrode in an HF solution, a KOH solution or the like to remove Si by an electrolysis reaction. The well-known method is anodic etching (Anodic etching) in which Si is etched by an electrolysis reaction on the anode side when a current is applied in a dilute HF solution using Si as an anode and platinum or gold as a cathode.
Etching).

[0006] On the other hand, porous Si was discovered by Uhir et al. In the process of research on electrolytic polishing of semiconductors in 1956 (A. Uhril, Bell System. Te.
ch. J. , Vol. 35,333 (1956)).

[0007] Unagi and the like are Si in the anodization.
, And reported that the anodic reaction of Si in HF solution requires holes, and the reaction is as follows (T. Unami, J. Electroche.
m. soc. , Vol. 127, 476 (198
0)).

Si + 2HF + (2-n) e ⁺ → SiF ₂ + 2H ⁺ + ne ⁻ (1) SiF ₂ + 2HF → SiF ₄ + H ₂ (2) SiF ₄ + 2HF → H ₂ SiF ₆ (3) or Si + 4HF + (4-λ ) E ⁺ → SiF ₄ + 4H ⁺ + λe ⁻ (4) SiF ₄ + 2HF → H ₂ SiF ₆ (5) Here, e ⁺ and e ⁻ represent holes and electrons, respectively. In addition, n and λ are the numbers of holes required for dissolving Si1 atoms, respectively, and porous Si is formed when the condition of n> 2 or λ> 4 is satisfied.

As described above, holes are required to produce porous Si, and P-type Si is more likely to be transformed into porous Si than N-type Si. However, it is known that N-type Si is also transformed into porous Si if holes are injected. (RP Holmstrom and J.
Y. Chi, Appl. Phys. Lett. , Vo
l. 42, 386 (1983)).

This porous Si layer has a HF solution concentration of 50 to 2 as compared with the density of single crystal Si of 2.33 g / cm ^3.
By changing the density to 0%, the density becomes 1.1 to 0.6 g /
It can be changed in the range of cm ³ .

According to observation with a transmission electron microscope, pores having an average diameter of about 600 angstroms are formed in the porous Si layer, and the density thereof is less than half that of single crystal Si. However, the single crystallinity is maintained, and it is possible to epitaxially grow the single crystal Si layer on the porous layer.

Generally, when a single crystal of Si is oxidized, its volume is increased to about 2.2 times, but by controlling the density of porous Si, it is possible to suppress the volume expansion thereof, which causes a warp of the substrate. A crack introduced into the surface residual single crystal layer can be avoided.

The volume ratio R of the single crystal Si after being oxidized to the porous Si can be expressed as follows.

R = 2.2 × (A / 2.33) (6) Here, A is the density of porous Si. If R = 1, that is, if there is no volume expansion after oxidation, A = 1.06
(G / cm ³ ) and the density of the porous Si layer is 1.06.
With this, volume expansion can be suppressed.

Further, since the porous layer has a large amount of voids formed therein, its density is reduced to less than half.
As a result, the surface area is dramatically increased as compared with the volume, so that the chemical etching rate is significantly increased as compared with the etching rate of a normal single crystal layer.

[0016]

However, each of the above-mentioned conventional methods has the following problems to be solved.

In the above-mentioned bulk Si etching method, since there is no difference in material between the etched region and the non-etched region, a mask is required.

In chemical etching, overetching occurs in the lateral direction, and in anisotropic etching, a low etching rate surface appears, and it is impossible to form the etching portion only by the wall surface perpendicular to the surface. In addition, the shape also changes depending on the plane orientation of the Si substrate.

By the RIE method, vertical etching can be performed, but it is almost impossible to cut through Si having a thickness of several hundred μm to several mm.

In the electropolishing method, since an electric current is applied, it is difficult to form an insulator or a semiconductor layer other than a mask on the front surface or the back surface before etching, and it is difficult to form a thin layer without a support immediately below. Can not.

An object of the present invention is to provide a Si substrate which can selectively and easily and uniformly process bulk Si and can be applied to an X-ray mask, a light-transmissive substrate, micromachining and the like, and a method for processing the same. Especially.

[0022]

Means for Solving the Problems As a means for solving the above-mentioned problems, the present invention partially comprises a non-porous Si substrate having a thin layer on one surface from the surface without the thin layer to the layer. The formed porous Si is brought into contact with a cavity formed by etching and removing by chemical etching, the thin layer is left, and the layer is provided as an unsupported thin layer having no support immediately below. A substrate is provided.

Further, a step of forming a non-porous Si substrate having a thin layer formed on one surface and a porous Si region extending from the surface without the thin layer to the layer, and by chemical etching, A step of selectively removing only the porous Si region by etching, leaving the thin layer in contact with the cavity formed by the removal to form an unsupported thin layer having no support immediately below. The above problem is to be solved by a characteristic method of processing a Si substrate.

Further, the thin layer is characterized by comprising one or more layers.

[0025]

Since the porous Si used in the present invention is formed along the current flow during anodization, it is possible to control the current flow by providing a mask or an impurity distribution, and almost arbitrary. It is possible to process non-porous Si into the shape of, and it is also possible to vertically and accurately penetrate a thick Si substrate. Furthermore, before selectively etching porous Si, an insulating layer or A semiconductor layer can be provided.

Further, by the above processing method, an X-ray mask,
A light-transmissive substrate and a Si substrate applicable to micromachining and the like can be manufactured.

Further, when the layer which finally becomes an unsupported thin layer has a multi-layer structure, when the layer adjacent to the substrate is mechanically (structurally) weak, it can be reinforced.

When this thin layer is formed of a different material from the substrate, stress is accumulated at the interface due to the difference in the coefficient of thermal expansion, and when the support immediately below the thin layer is removed,
The stress may be released and may cause sagging or tearing. Therefore, in such a case, it is possible to prevent such sagging and tearing by using a multilayer structure.

(Embodiment 1) FIG. 1 illustrates a method of processing a Si substrate according to an embodiment of the present invention.

In this example, the front surface and the back surface of the non-porous Si are partially covered with a mask, and the exposed portion is made porous from the front surface to the back surface, and then acts as a thin layer, and finally becomes a non-supporting thin layer. An example of forming a transparent layer is shown.

First, as shown in FIG. 1A, the non-porous S
The front and back surfaces of i11 are covered with the mask 12 to partially open a window. Here, as the mask, a polyimide film having high resistance to hydrofluoric acid, apiezon wax, a high resistance epitaxial film, a high resistance non-epitaxial deposition film, or the like is used.

Next, the exposed portion is made porous 13 from the front surface to the back surface (FIG. 1 (b)).

Thereafter, the mask material 12 is peeled off (see FIG.
(C)), a layer 14 that can eventually become an unsupported thin layer is formed on either surface (FIG. 1 (d)).

The layer which can finally become the unsupported thin layer may be a multi-layer.

Next, the porous Si 13 is removed by chemical etching.

If the mask 12 does not have any adverse effect on the application of this processed product such as an epitaxial layer, it is not necessary to peel off the mask 12 on the surface which does not cover the unsupported thin layer 14. It's clear.

FIG. 1E shows a completed diagram of this example. As described above, it is possible to form a hole in the non-porous Si 11 by partially forming one or more arbitrary places and leaving the film 14 having no support immediately below on one side.

Here, if the mask 12 is arranged at the same position within the surface on both the front surface and the back surface, the wall surface of the hole becomes vertical to the surface, and if it is arranged so as to be displaced, the wall surface becomes oblique.

(Embodiment 2) In FIGS. 2 and 3, the surface of non-porous Si is partially covered with a mask to make it porous from the exposed portion to the back surface, and then it acts as a thin layer, and finally An example of forming a layer that can be an unsupported thin layer is shown in FIG.

First, as shown in FIGS. 2A and 3A, the surface of the non-porous Si 21 or 31 is covered with a mask 22 or 32 to partially open a window. Here, as the mask, a polyimide film having high resistance to hydrofluoric acid, apiezon wax, a high resistance epitaxial film, a high resistance non-epitaxial deposition film, or the like is used.

Next, the exposed portion to the back surface is made porous (23 or 33) (FIG. 2 (b), FIG. 3 (b)).
Then, the mask material (22, 32) is peeled off (FIG. 2).
(C), FIG. 3 (c)).

Next, a layer 24 or 34 which can eventually become an unsupported thin layer is formed on either one of the surfaces (FIG. 2).
(D), FIG. 3 (d)). 2 shows an example in which the thin layer 24 is coated on the surface from which the mask has been peeled off, and FIG. 3 shows an example in which the thin layer 34 is coated on the surface that does not cover the mask.

The layer which can finally become the unsupported thin layer may be a multi-layer.

Next, only the porous Si 23 or 33 is removed by chemical etching.

As the mask is an epitaxial layer or the like,
It is clear that it is not necessary to peel off the mask on the surface that does not cover the thin layer if it does not have any adverse effect on the application of the processed product.

FIG. 2E and FIG. 3E show a completed diagram of this example. As described above, it is possible to form a hole in one part or more of the non-porous Si in an arbitrary shape, leaving a film without a support directly below (immediately above) one surface.

(Embodiment 3) FIG. 4 shows that the front surface and the back surface of the non-porous Si partly have high resistance, and the exposed low resistance part is made porous from the front surface to the back surface, and then finally the unsupported thin layer. An example of forming a layer that can become

First, as shown in FIG. 4 (a), the resistance is increased 42 in both the front and back surfaces of the non-porous Si 41. At least one low resistance region 41 is exposed on each side. The high resistance region 42 is formed by a non-deposition method such as ion implantation or impurity diffusion.

Next, the exposed low resistance portion 41 is made porous 43 from the front surface to the back surface (FIG. 4B).

After that, a layer 44 which acts as a thin layer on one of the surfaces and which can finally become an unsupported thin layer is formed (FIG. 4C).

The layer which can finally become the unsupported thin layer may be a multi-layer.

Next, the porous Si 43 is removed by chemical etching.

FIG. 4D shows a completed diagram of this example. As described above, it is possible to form a hole by leaving one part or more of non-porous Si in an arbitrary shape and leaving a thin film having no support immediately below on one surface.

Here, if the high resistance region is arranged at the same position on the front surface and the back surface at the same position on the surface, the wall surface of the hole becomes vertical to the surface, and if they are arranged so as to be displaced, the wall surface becomes oblique.

(Embodiment example 4) FIGS. 5 and 6 show that the surface of the non-porous Si has a partially increased resistance, and the exposed low resistance portion is made porous from the back surface, and then acts as a thin layer, and An example of forming a layer that can eventually become an unsupported thin layer will be shown.

As shown in FIGS. 5A and 6A, the surface of the non-porous Si 51 or 61 is partially made high in resistance (52 or 62). At least one low resistance region 51 or 61 is exposed on one surface. The high resistance region 52 or 62 is formed by a non-deposition method such as ion implantation or impurity diffusion.

Next, the exposed low resistance portion to the back surface is made porous (53 or 63) (FIG. 5 (b), FIG. 6).
(B)).

After that, a layer 54 or 64 which can eventually become an unsupported thin layer is formed on one of the surfaces (FIG. 5).
(C), FIG.6 (c)).

The layer which can finally become the unsupported thin layer may be a multi-layer.

Next, only the porous Si 53 or 63 is selectively removed by chemical etching. FIG. 5 shows an example in which the surface on which the low resistance region is formed is covered with a thin layer, and FIG. 6 shows an example in which the surface on which the low resistance region is not formed is covered with a thin layer.

FIG. 5D and FIG. 6D show completion diagrams of this example. As described above, it is possible to form a hole by leaving one part or more of non-porous Si in an arbitrary shape and leaving a thin film without a support immediately below (immediately above) one surface.

(Embodiment 5) In FIG. 7, after forming a layer which acts as a thin layer and can eventually become an unsupported thin layer, the surface of the non-porous Si is partially covered with a mask and exposed. An example of the case where the layer is made porous from the formed portion to the thin layer is shown.

First, as shown in FIG. 7A, a layer 72 is formed on one surface of the non-porous Si 71, which acts as a thin layer and can eventually become an unsupported thin layer.

The layer which can finally become the unsupported thin layer may be a multi-layer.

Next, as shown in FIG. 7B, a surface of the non-porous Si opposite to the thin layer 72 is covered with a mask 73 to partially open a window. Here, as the mask 73, a polyimide film having strong resistance to hydrofluoric acid, apiezon wax,
A high resistance epitaxial film or a high resistance non-epitaxial deposition film is used.

Next, the exposed portion to the thin layer 72 is made porous (FIG. 7C).

Thereafter, the mask material 73 is peeled off, and the porous S
Only i74 is selectively removed by chemical etching.

It is clear that it is not necessary to peel off the mask 73 on the surface which does not cover the thin layer 72, when the mask 73 does not have any adverse effect on the application of this processed product such as an epitaxial layer. is there.

FIG. 7D shows a completed diagram of this example. As described above, it is possible to form a hole by leaving one part or more of non-porous Si in an arbitrary shape and leaving a thin film having no support immediately below on one surface.

Embodiment 6 In FIG. 8, after forming a layer which acts as a thin layer and can eventually become a non-supporting thin layer, the surface of the non-porous Si is partially made high in resistance and exposed. An example of making the low resistance portion to a thin layer porous is shown below.

First, as shown in FIG. 8A, a layer 82 is formed on one surface of the non-porous Si 81, which acts as a thin layer and can eventually become an unsupported thin layer.

The layer which can finally become the unsupported thin layer may be a multi-layer.

Next, as shown in FIG. 8B, the surface opposite to the thin layer 82 of non-porous Si is partially made high in resistance 83.
To do. At least one low resistance region 81 is exposed on one surface. The high resistance region 83 is formed by a non-deposition method such as ion implantation or impurity diffusion.

Next, from the exposed low resistance portion 81 to the thin layer 8
It is made porous up to 2 (FIG. 8 (c)).

After that, only the porous Si 84 is selectively removed by chemical etching.

FIG. 8D shows a completed diagram of this example. As described above, it is possible to form a hole by leaving one part or more of non-porous Si in an arbitrary shape and leaving a thin film having no support immediately below on one surface.

[0077]

Example 1 Example 1 200 μm thick low-resistance single crystal S
A 1 μm polyimide film was applied and formed as a mask on both surfaces of the i substrate. At this time, there was at least one exposed Si region on each surface. Also,
The exposed Si region was arranged in the same position on the front and back surfaces. As a result of the subsequent anodization, non-porous Si
A mask was formed to leave the area.

Next, anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 30 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 1.6 (hours) Porous Si thickness: 200 (μm) Porosity: 56 (%) As a result, the maskless portion from the front surface to the back surface was made porous.

After that, the mask is removed, and a single crystal Si layer is formed on one of the surfaces as a layer which can finally become a non-support thin layer by MBE (Molecular Beam Epitaxy: Molecular).
It was formed to a thickness of 0.5 μm by the rBeam Epitaxy method. The growth conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec This substrate was immersed in a solution of fluoronitric acid acetic acid (1: 3: 8).

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which holes were opened up to the single-crystal Si film, and at least one hole was formed at least.

The wall surface of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Finally, a thin layer (Membrane) without a support was formed immediately below the surface of the Si substrate.

Example 2 Apiezon wax was partially coated as a mask on both surfaces of a low resistance single crystal Si substrate having a thickness of 200 μm. At this time, there was at least one exposed Si region on each surface. Also,
The exposed Si region was arranged in the same position on the front and back surfaces. As a result, in the next anodization, non-porous S
A mask for leaving the i region was formed.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the maskless portion from the front surface to the back surface was made porous.

After that, the mask was removed, and LPC was formed as a layer that could eventually become a non-supporting thin layer on either surface.
A Si ₃ N ₄ film having a thickness of 0.5 μm was formed by the VD method. The formation conditions are as follows.

Gas: SiH ₂ Cl ₂ + NH ₃ Temperature: 800 ° C. Formation rate: 3 nm / min This substrate was immersed in a 7M NaOH solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single crystal Si to 7M NaOH solution is about 1 μm / min or less, a 200 μm thick porous Si region is removed in 2 minutes.
A hole was opened up to the Si ₃ N ₄ film, and a single crystal Si substrate in which at least one hole was partially formed was obtained.

The wall surface of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Finally, a thin layer (Membrane) having no support was formed immediately below the surface of the Si substrate.

Example 3 Amorphous S was formed on both surfaces of a low-resistance single crystal Si substrate having a thickness of 200 μm as a mask by vapor deposition.
i was formed. The formation conditions were as follows.

Temperature: 200 ° C. Pressure: 1 × 10 ⁻⁹ Torr Deposition rate: 0.1 nm / sec After that, a resist is patterned on the amorphous Si layer by a lithography technique to expose the amorphous Si layer. RIE until the low resistance single crystal Si substrate is exposed
(Reactive ion etching: Reactive lon
Etching). At this time, there was at least one exposed Si region on each surface. In addition, the exposed Si region was arranged at the same value on both the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the maskless portion from the front surface to the back surface was made porous.

Thereafter, the amorphous Si is removed by etching with hot phosphoric acid, and a SiC film is formed on one of the surfaces by a CVD method as a layer that can finally become an unsupported thin layer.
5 μm was formed. The formation conditions were as follows.

Gas: SiH ₄ + CH ₄ Temperature: 1100 ° C. This substrate was immersed in a 6 M KOH solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single crystal Si with a 6M KOH solution is about 1 μm / min or less, a 200 μm thick porous Si region is removed in 2 minutes,
A hole was opened up to the SiC film, and a single crystal Si substrate partially formed with at least one hole was obtained. The wall of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Finally, a thin layer without a support (Membrane) was formed immediately below the surface of the Si substrate.

Example 4 A polyimide film of 1 μm was applied as a mask on both surfaces of a 200 μm thick low resistance single crystal Si substrate to form a mask. At this time, there was at least one exposed Si region on each surface. Also,
The exposed Si region was arranged in the same position on the front and back surfaces. As a result, in the next anodization, non-porous S
A mask for leaving the i region was formed.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the maskless portion from the front surface to the back surface was made porous. After that, the mask was removed, and a single-crystal Si film having a thickness of 1 μm was formed on one of the surfaces by a low pressure CVD method as a layer which could eventually become an unsupported thin layer. The formation conditions were as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ⁻² Torr Growth time: 3.3 nm / sec This substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution. ..

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which holes were opened up to the single-crystal Si film, and at least one hole was formed at least.

The wall surface of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Finally, a thin layer without a support (Membrane) was formed immediately below the surface of the Si substrate.

Example 5 A 1 μm polyimide film was applied as a mask on both surfaces of a 200 μm thick low-resistance single crystal Si substrate to form a mask. At this time, there was at least one exposed Si region on each surface. Also,
The exposed Si regions were arranged offset on the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the maskless portion from the front surface to the back surface was made porous.

After that, the mask was removed, and a single crystal Si film of 1 μm was formed by plasma CVD as a layer that could eventually become an unsupported thin layer on either surface. The formation conditions are as follows.

Gas: SiH ₄ High frequency power: 100 W Temperature: 800 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 2.5 nm / sec This substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which holes were opened up to the single-crystal Si and at least one or more holes were formed.

The wall surface of this hole was inclined with respect to the surface by the amount of the displacement of the opening of the mask. Here, the shape and size of the opening of the hole are determined only by the mask pattern,
The size was limited only to the size of the substrate used.

Finally, a thin layer (Membrane) having no support was formed immediately below the surface of the Si substrate.

(Embodiment 6) A 200 μm thick P-type low-resistance single crystal Si substrate is provided on one surface with an N-type high-resistance epitaxial S.
MBE (Molecular Beam Epitaxy: Molecular)
It was formed to a thickness of 0.5 μm by the Beam Epitaxy method. The growth conditions are as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec After that, a resist is patterned on the epitaxial Si layer by a lithography technique to form an epitaxial Si layer.
RIE (Reactive Ion Etching: React) is performed until the low resistance single crystal Si substrate is exposed in the region where the layer is exposed.
It was etched by the iv lon Etching method. At this time, at least one exposed low resistance region was present on each surface. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, it was made porous from the front surface to the back surface through the portion without the mask.

After that, the N-type high resistance Si region is removed by etching with ethylenediamine + pyrocatechol, and as a layer which can finally become an unsupported thin layer on the mask-removed surface, LP is used.
E (Liquid Phase Ep: Liquid Phase Ep)
A single crystal Si film having a thickness of 3 μm was formed by an ittaxy method.
The formation conditions were as follows.

Solvent: Sn Growth temperature: 900 ° C. Growth atmosphere: H ₂ Growth time: 30 min This substrate was immersed in a solution of fluoronitric acid acetic acid (1: 3: 8).

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which a hole was opened up to the single-crystal Si film, and at least one hole was formed.

Here, the shape and size of the opening of the hole are
It was determined only by the mask pattern, and its size was limited only to the size of the substrate used.

Although the selective etching solution of this embodiment is a mixed solution of hydrofluoric acid, alcohol and hydrogen peroxide solution, the same results can be obtained by using the other three kinds of etching solutions mentioned in the embodiment example. It was

Finally, a thin layer without a support (Membrane) was formed immediately below the surface of the Si substrate.

Example 7 A high resistance epitaxial Si layer was formed on one surface of a low resistance single crystal Si substrate having a thickness of 200 μm by low pressure CVD (Chemical Vapor Deposition: Chemical Vapo).
The film was formed to a thickness of 0.5 μm by the r Deposition method. The growth conditions are as follows.

Source gas: SiH ₄ Carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ^-2 Torr Growth rate: 3.3 nm / sec After that, a resist is patterned on the epitaxial Si layer by a lithography technique to form epitaxial Si.
RIE (Reactive Ion Etching: React) is performed until the low resistance single crystal Si substrate is exposed in the region where the layer is exposed.
It was etched by the iv lon Etching method. At this time, there was at least one exposed low resistance region. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, it was made porous from the front surface to the back surface through the portion without the mask.

After that, a Si ₃ N ₄ film of 0.5 is formed on the surface opposite to the mask as a layer which can finally become a non-supporting thin layer.
μm formed. The formation conditions were as follows.

Gas: SiH ₂ Cl ₂ + NH ₃ Temperature: 800 ° C. Formation rate: 3 nm / min This substrate was immersed in a solution of hydrofluoric nitric acid (1: 3: 8).

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which holes were opened up to the Si ₃ N ₄ film and at least one hole was formed at least.

Here, the shape and size of the opening of the hole are
It was determined only by the mask pattern, and its size was limited only to the size of the substrate used.

Finally, a thin layer (Membrane) having no support was formed immediately below the surface of the Si substrate.

(Embodiment 8) A 200 μm-thick P-type low resistance (1 × 10 ¹⁹ cm ⁻³ ) single crystal Si substrate was masked with a resist on both sides, and its opening was ion-implanted, followed by heat treatment. To form a high resistance region.
The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ⁻² Heat treatment: 900 ° C., 30 min At this time, at least one or more low-resistance regions not ion-implanted exist on each surface. It was In addition, the exposed Si region was arranged so that both the front surface and the back surface had an in-plane equal value. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the portion from the front surface to the back surface which was not ion-implanted was made porous. After this, MB is used as a layer that can eventually become an unsupported thin layer on either side.
A single crystal Si film having a thickness of 0.5 μm was formed by the E method. The formation conditions were as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec This substrate was immersed in a hydrofluoric nitric acid (1: 3: 8) solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which a hole was opened up to the single-crystal Si film, and at least one hole was formed. The wall of this hole was perpendicular to the surface.
Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method.

Finally, a thin layer without a support (Membrane) was formed immediately below the surface of the Si substrate.

(Embodiment 9) A 200 μm thick P-type low resistance (2 × 10 ¹⁷ cm ⁻³ ) single crystal Si substrate was masked with a resist on both sides, and its opening was ion-implanted, followed by heat treatment. To form a high resistance region.
The implantation and heat treatment conditions were as follows.

Ion species: H ⁺ energy: 100 keV Implantation amount: 2 × 10 ¹⁵ cm ⁻² Heat treatment: 500 ° C., 30 min At this time, at least one or more low-resistance regions not ion-implanted exist on each surface. It was In addition, the exposed Si region was arranged so that both the front surface and the back surface had an in-plane equal value. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the portion not ion-implanted from the front surface to the back surface was made porous.

After that, as a layer which can finally become the unsupported thin layer on either one surface, Si _{3 is formed} by the LPCVD method.
An N ₄ film having a thickness of 0.5 μm was formed. The formation conditions were as follows.

Gas: SiH ₂ Cl ₂ + NH ₃ Temperature: 800 ° C. Growth rate: 3 nm / min This substrate was immersed in a 7M NaOH solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single crystal Si to 7M NaOH solution is about 1 μm / min or less, a 200 μm thick porous Si region is removed in 2 minutes.
A hole was opened up to the Si ₃ N ₄ film, and a single crystal Si substrate in which at least one hole was partially formed was obtained.

The wall surface of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in the present example, similar results were obtained by the diffusion method.

Finally, a thin layer (Membrane) without a support was formed immediately below the surface of the Si substrate.

(Embodiment 10) A 200 μm thick N-type low resistance (1 × 10 ¹⁹ cm ⁻³ ) single crystal Si substrate was masked with a resist on both sides, and its opening was ion-implanted, followed by heat treatment. To form a high resistance region.
The implantation and heat treatment conditions were as follows.

Ion species: B ⁺ energy: 150 keV Implantation amount: 4 × 10 ¹⁴ cm ^-2 Heat treatment: 900 ° C., 30 min At this time, at least one exposed Si region was present on each surface. In addition, the exposed Si region was arranged at the same value on both the front and back surfaces. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

From the front surface to the back surface, the portion not ion-implanted was made porous. After that, a SiC film having a thickness of 0.5 μm was formed on one of the surfaces by a CVD method as a layer that could finally become the unsupported thin layer. The formation conditions were as follows.

Gas: SiH ₄ + CH ₄ Temperature: 1100 ° C. This substrate was immersed in a 6 M KOH solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single crystal Si with a 6M KOH solution is about 1 μm / min or less, a 200 μm thick porous Si region is removed in 2 minutes,
A hole was opened up to the SiC film, and a single crystal Si substrate partially formed with at least one hole was obtained.

The wall surface of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method.

Finally, a thin layer (Membrane) without a support was formed immediately below the surface of the Si substrate.

(Embodiment 11) A 200 μm thick P-type low resistance (1 × 10 ¹⁹ cm ⁻³ ) single crystal Si substrate was masked with a resist on both sides, and its opening was ion-implanted, followed by heat treatment. To form a high resistance region.
The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ⁻² Heat treatment: 900 ° C., 30 min At this time, at least one region where ions were not implanted was present on each surface. Also, the exposed S
The i region is arranged in the same value on the front surface and the back surface. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the portion not ion-implanted from the front surface to the back surface was made porous.

Thereafter, a single crystal Si film having a thickness of 1 μm was formed on one of the surfaces by a low pressure CVD method as a layer which could eventually become an unsupported thin layer. The formation conditions were as follows.

Source gas: SiH ₄ carrier gas: H ₂ Temperature: 850 ° C. Pressure: 1 × 10 ⁻² Torr Growth rate: 3.3 nm / sec This substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution. ..

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which a hole was opened up to the single-crystal Si film, and at least one hole was formed. The wall of this hole was perpendicular to the surface.
Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method.

Finally, a thin layer without a support (Membrane) was formed immediately below the surface of the Si substrate.

(Embodiment 12) A 200 μm thick P-type low resistance (1 × 10 ¹⁹ cm ⁻³ ) single crystal Si substrate was masked with a resist on both surfaces, and the openings were ion-implanted, followed by heat treatment. To form a high resistance region.
The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ^-2 Heat treatment: 900 ° C., 30 min At this time, at least one low resistance region not ion-implanted exists on each surface. It was Further, the exposed Si regions are arranged on the front surface and the back surface with a shift. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the portion not ion-implanted from the front surface to the back surface was made porous.

After that, a single crystal Si film having a thickness of 1 μm was formed on one of the surfaces by a bias sputtering method as a layer that could eventually become an unsupported thin layer.

RF frequency: 100 MHz High frequency power: 600 W Ar gas pressure: 8 × 10 ⁻³ Torr DC bias: −200 V Substrate DC bias: +5 V Temperature: 300 ° C. Growth time: 120 min This substrate was treated with fluoronitric acid acetic acid (1: 3: 3). 8) Infiltrated into the solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which a hole was opened up to the single-crystal Si film, and at least one hole was formed. The wall surface of this hole was inclined with respect to the surface by the amount of deviation of the opening of the mask. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method.

Finally, a thin layer (Membrane) having no support was formed immediately below the surface of the Si substrate.

(Embodiment 13) A 200 μm thick P-type low resistance (1 × 10 ¹⁹ cm ⁻³ ) single crystal Si substrate was masked with a resist on one surface thereof, and its opening was ion-implanted, followed by heat treatment. To form a high resistance region.
The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ⁻² Heat treatment: 900 ° C. (30 min) At this time, at least one low resistance region where ions were not implanted was present. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

As a result, it was made porous from the front surface to the back surface through the non-ion-implanted portion. After this, as a layer that can eventually become an unsupported thin layer on the ion-implanted surface,
A single crystal Si film having a thickness of 1 μm was formed by the MBE method. The formation conditions were as follows.

Temperature: 700 ° C. Pressure: 1 × 10 ⁻⁹ Torr Growth rate: 0.1 nm / sec This substrate was immersed in a solution of fluoronitric acid acetic acid (1: 3: 8).

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which a hole was opened up to the single-crystal Si film, and at least one hole was formed. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used. Although the ion implantation method was used for forming the high resistance region in this example, similar results were obtained by the diffusion method.

Although the selective etching solution of this embodiment is a mixed solution of hydrofluoric acid, alcohol and hydrogen peroxide solution, the same results can be obtained with the other three kinds of etching solutions mentioned in the embodiment. It was

Finally, a thin layer (Membrane) having no support was formed immediately below the surface of the Si substrate.

(Embodiment 14) A 200 μm thick P-type low resistance (1 × 10 ¹⁹ cm ⁻³ ) single crystal Si substrate was masked with a resist on one surface thereof, and its opening was ion-implanted, followed by heat treatment. To form a high resistance region.
The implantation and heat treatment conditions were as follows.

Ion species: P ⁺ energy: 120 keV Implantation amount: 2 × 10 ¹⁴ cm ⁻² Heat treatment: 900 ° C., 30 min At this time, at least one low resistance region where ions were not implanted was present. This formed a mask for leaving the non-porous Si region in the subsequent anodization.

Next, anodization was performed in the HF solution.

The anodization conditions were as follows.

Current density: 15 (mA · cm ⁻² ) Anodizing solution: HF: H ₂ O: C ₂ H ₅ OH = 1: 1: 1
1 hour: 2.6 (hours) Thickness of porous Si: 200 (μm) Porosity: 56 (%) As a result, the surface was made porous from the front surface to the back surface through the non-ion-implanted portion.

Then, a Si ₃ N ₄ film of 0.5 μm was formed on the surface opposite to the ion-implanted surface by LPCVD as a layer which could eventually become an unsupported thin layer. The formation conditions were as follows.

Gas: SiH ₂ Cl ₂ + NH ₃ Temperature: 800 ° C. Growth rate: 3 nm / min This substrate was infiltrated with a fluoronitric acid acetic acid (1: 3: 8) solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Ordinary single crystal Si fluorinated nitric acid (1:
3: 8) Etching rate for solution is about 1 μm / min
Since it is weak, the area of 200 μm thick porous Si is 2
After that, a single-crystal Si substrate was obtained in which holes were opened up to the Si ₃ N ₄ film and at least one hole was formed at least. Here, the shape and size of the opening of the hole are determined only by the pattern at the time of ion implantation, and the size is limited only to the size of the substrate used.

Although the ion implantation method was used for forming the high resistance region of this example, similar results were obtained by the diffusion method.

Although the selective etching solution of this embodiment was a mixed solution of hydrofluoric acid, alcohol and hydrogen peroxide solution, similar results were obtained with the other three kinds of etching solutions mentioned in the embodiment. It was

Finally, a thin layer without a support (Membrane) was formed immediately below the surface of the Si substrate.

Example 15 Apiezon wax was partially applied as a mask on both surfaces of a 200 μm thick low resistance single crystal Si substrate. At this time, there was at least one exposed Si region on each surface. Also,
The exposed Si region was arranged in the same position on the front and back surfaces. As a result, in the next anodization, non-porous S
A mask for leaving the i region was formed.

Next, anodization was performed in the HF solution.

The anodization conditions were the same as in Example 1 described above.

As a result, the maskless portion from the front surface to the back surface was made porous.

After that, the mask is removed, and LPC is formed on one of the surfaces as a layer that can finally become a non-supporting thin layer.
A Si ₃ N ₄ film of 0.1 μm, a SiO ₂ film of 1 μm, and a Si ₃ N ₄ film of 0.1 μm were formed in this order by the VD method. The formation conditions are as follows.

[0216] (Si ₃ N ₄ film) Gas: SiH ₂ Cl ₂ + NH ₃ Temperature: 800 ° C. formation rate: 3nm / min (SiO ₂ film) Gas: 1% SiH ₄ 45SCCM of N ₂ diluted O ₂ 60 SCCM N ₂ 50 SCCM Temperature: 400 ° C. Formation rate: 0.1 μm / min This substrate was immersed in a 7M NaOH solution.

As described above, the etching rate of porous Si is increased about 100 times that of single crystal Si. Since the etching rate of a normal single crystal Si to 7M NaOH solution is about 1 μm / min or less, a 200 μm thick porous Si region is removed in 2 minutes.
A hole was opened up to the Si ₃ N ₄ film, and a single crystal Si substrate in which at least one hole was partially formed was obtained.

The wall surface of this hole was perpendicular to the surface. Here, the shape and size of the opening of the hole are determined only by the mask pattern, and the size is limited only to the size of the substrate used.

Finally, a thin layer (Membrane) without a support was formed immediately below the surface of the Si substrate.

[0220]

As described in detail above, according to the present invention,
The non-porous Si substrate is processed by highly accurately and uniformly chemically etching the porous Si region partially provided in one or more places in the non-porous Si substrate to have an arbitrary shape and an arbitrary size. Now, it is possible to make a hole from one side to the thin layer on the opposite side, and finally it can be formed as a thin layer (Membrane) without a support directly below.

Since the porous Si used in the present invention is formed along the current flow at the time of anodization, the current flow can be controlled by providing a mask or an impurity distribution, and it is almost arbitrary. It is possible to process the non-porous Si into the shape of.

Further, according to the present invention, the non-porous Si substrate is partially transformed into porous Si at one or more places, and chemical etching is performed very efficiently and highly accurately without using an etching preventive film. It is possible to remove the porous Si region and form a hole partially through the non-porous Si substrate to one or more places down to the thin layer on the back surface.

Furthermore, according to the present invention, it becomes possible to manufacture an Si substrate applicable to an X-ray mask, a light-transmissive substrate, micromachining and the like.

Further, the strength of the thin layer can be increased by making the layer which finally becomes an unsupported thin layer one or more layers, and the coefficient of thermal expansion between the substrate and the material of the thin layer can be increased. It is possible to form an unsupported thin layer without sagging or tearing against the stress caused by the difference.

[Brief description of drawings]

FIG. 1 is a sectional view showing the basic steps of a first embodiment of the present invention.

FIG. 2 is a sectional view showing the basic steps of a second embodiment of the present invention.

FIG. 3 is a sectional view showing the basic steps of a second embodiment of the present invention.

FIG. 4 is a sectional view showing the basic steps of a third embodiment of the present invention.

FIG. 5 is a sectional view showing the basic steps of a fourth embodiment of the present invention.

FIG. 6 is a sectional view showing the basic steps of a fourth embodiment of the present invention.

FIG. 7 is a sectional view showing the basic steps of a fifth embodiment of the present invention.

FIG. 8 is a sectional view showing the basic steps of a sixth embodiment of the present invention.

[Explanation of symbols]

 11 Nonporous Si Substrate 12 Mask 13 Porous Si Region 14 Thin Layer 21 Nonporous Si Substrate 22 Mask 23 Porous Si Region 24 Thin Layer 31 Nonporous Si Substrate 32 Mask 33 Porous Si Region 34 Thin Layer 41 Low Resistive non-porous Si substrate 42 High-resistive Si region 43 Porous Si region 44 Thin layer 51 Low-resistive non-porous Si substrate 52 High-resistive Si region 53 Porous Si region 54 Thin layer 61 Low-resistive non-porous Si substrate 62 High Resistance Si region 63 Porous Si region 64 Thin layer 71 Low resistance non-porous Si substrate 72 High resistance Si region 73 Porous Si region 74 Thin layer 81 Low resistance non-porous Si substrate 82 Thin layer 83 High resistance Si region 84 Porous Quality Si area

Claims (5)

[Claims] 1. A non-porous Si substrate having a thin layer on one surface thereof, wherein porous Si partially formed from the surface without the thin layer to the layer is removed by etching by chemical etching to form a cavity. A Si substrate, wherein the thin layer is left in contact with the layer, and the layer is provided as an unsupported thin layer having no support directly below. 2. A step of forming a non-porous Si substrate having a thin layer formed on one surface and a partially formed porous Si region extending from the surface without the thin layer to the layer, and a chemistry. A step of selectively removing only the porous Si region by etching, leaving the thin layer in contact with the cavity formed by the removal, and a non-supporting thin layer having no support immediately below. A method for processing a Si substrate, comprising: 3. The step of porosity forming is performed by anodization (An
The method of processing a Si substrate according to claim 2, wherein 4. The method for processing a Si substrate according to claim 5, wherein the anodization is performed in an HF solution. 5. The method for processing a Si substrate according to claim 2, wherein the thin layer comprises one or more layers.