JPH0590193A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH0590193A
JPH0590193A JP24969891A JP24969891A JPH0590193A JP H0590193 A JPH0590193 A JP H0590193A JP 24969891 A JP24969891 A JP 24969891A JP 24969891 A JP24969891 A JP 24969891A JP H0590193 A JPH0590193 A JP H0590193A
Authority
JP
Japan
Prior art keywords
silicon
film
oxide film
contact hole
silicon substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP24969891A
Other languages
Japanese (ja)
Inventor
Tetsuya Kubota
徹哉 窪田
Michihito Igarashi
未知人 五十嵐
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanyo Electric Co Ltd
Original Assignee
Sanyo Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanyo Electric Co Ltd filed Critical Sanyo Electric Co Ltd
Priority to JP24969891A priority Critical patent/JPH0590193A/en
Publication of JPH0590193A publication Critical patent/JPH0590193A/en
Pending legal-status Critical Current

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  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE:To contrive a reduction in a contact resistance and the stabilization of the contact resistance by a method wherein in the case where a silicon- containing aluminum alloy wiring is formed, the epitaxial growth of a silicon film, which is generated on a silicon substrate in a contact hole, is prevented from being generated. CONSTITUTION:A BPSG film or an insulating film 13, such as a PSG film, formed on a silicon substrate 11 is selectivery etched using a photoresist as a mask to make a contact hole 14. After the substrate 11 in the hole 14 is subjected to HF cleaning and a natural oxide film or the like is previously removed, a cleaning treatment using SC1 to SC2 is performed to form a silicon oxide film 15 on the surface of the substrate 11 and after that, a silicon- containing aluminum alloy wiring 16 is formed on the film 15.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、半導体装置の製造方法
に関し、特にシリコンを含有するアルミニウム合金配線
を施した半導体装置のコンタクトホールにおけるシリコ
ンのエピタキシャル成長を防止し、コンタクト抵抗の低
減化と安定化を図った半導体装置の製造方法に関する。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a semiconductor device, and more particularly, to prevent epitaxial growth of silicon in a contact hole of a semiconductor device provided with an aluminum alloy wiring containing silicon to reduce and stabilize the contact resistance. The present invention relates to a method for manufacturing a semiconductor device.

【0002】[0002]

【従来の技術】図2は従来の半導体装置の製造方法を示
す断面図である。まず、図2の(A)に示すようにシリ
コン基板(1)の表面に不純物をドープして拡散層
(2)を形成し、その後該シリコン基板(1)上にBP
SG膜あるいはPSG膜等の絶縁膜(3)をCVD法を
用いて形成し、しかる後にフォトレジストをマスクとし
て該絶縁膜(3)を選択的にエッチング除去してコンタ
クトホール(4)を形成する。
2. Description of the Related Art FIG. 2 is a sectional view showing a conventional method for manufacturing a semiconductor device. First, as shown in FIG. 2A, the surface of the silicon substrate (1) is doped with impurities to form a diffusion layer (2), and then BP is formed on the silicon substrate (1).
An insulating film (3) such as an SG film or a PSG film is formed by the CVD method, and then the insulating film (3) is selectively removed by etching using a photoresist as a mask to form a contact hole (4). ..

【0003】次いで図2の(B)に示すように、コンタ
クトホール(4)のシリコン基板(1)の表面をHF洗
浄(純水で希釈した弗酸による洗浄)して、その表面に
付着した自然酸化膜等を除去し、その後シリコンを1〜
2%含有したアルミニウム合金配線(5)をスパッター
法等を用いて形成する。続いて、拡散層(3)とアルミ
ニウム合金配線(5)とのオーミック接触を得るために
400℃〜450℃での熱処理が行なわれ、さらにこの
後にはアルミニウム合金配線(5)上にシリコン窒化膜
等の保護膜が形成され、該保護膜のアニール処理が行な
われる。これらの熱処理の際には、図2の(C)に示す
如く、アルミニウム合金配線(5)中に含有されていた
シリコンが該配線(5)中に析出するとともに、コンタ
クトホール(4)のシリコン基板(1)の表面にはシリ
コンのエピタキシャル成長が起こり、コンタクトホール
(4)の全面あるいは一部を覆う析出物となる。同図に
おいて、(6)がエピタキシャル成長層を示している。
Then, as shown in FIG. 2B, the surface of the silicon substrate (1) in the contact hole (4) is cleaned with HF (cleaning with hydrofluoric acid diluted with pure water) and adhered to the surface. Remove the natural oxide film, etc.
An aluminum alloy wiring (5) containing 2% is formed by using a sputtering method or the like. Subsequently, heat treatment is performed at 400 ° C. to 450 ° C. to obtain ohmic contact between the diffusion layer (3) and the aluminum alloy wiring (5), and thereafter, a silicon nitride film is formed on the aluminum alloy wiring (5). Etc., a protective film is formed, and the protective film is annealed. During these heat treatments, as shown in FIG. 2C, the silicon contained in the aluminum alloy wiring (5) is precipitated in the wiring (5) and the silicon of the contact hole (4) is also deposited. Epitaxial growth of silicon occurs on the surface of the substrate (1) to form a deposit covering the whole or a part of the contact hole (4). In the figure, (6) indicates an epitaxial growth layer.

【0004】[0004]

【発明が解決しようとする課題】上述したように、従来
方法にあってはコンタクトホール(4)のシリコン基板
(1)をHF洗浄して自然酸化膜等を除去して該基板
(1)の表面を露出させ、その上にシリコンを含有した
アルミニウム合金配線(5)を形成していたので、その
後の熱処理によってシリコンが析出し、コンタクトホー
ル(4)の拡散層(2)の表面はシリコンのエピタキシ
ャル成長層(6)で覆われることでコンタクト抵抗が増
大するという問題があった。
As described above, according to the conventional method, the silicon substrate (1) of the contact hole (4) is cleaned with HF to remove the natural oxide film and the like, and thus the silicon substrate (1) of the substrate (1) is removed. Since the surface was exposed and the aluminum alloy wiring (5) containing silicon was formed on it, silicon was deposited by the subsequent heat treatment, and the surface of the diffusion layer (2) of the contact hole (4) was covered with silicon. There was a problem that the contact resistance was increased by being covered with the epitaxial growth layer (6).

【0005】本発明は、かかる従来の問題点に鑑みてな
されたものであり、コンタクトホール(4)におけるシ
リコンのエピタキシャル成長を防止し、コンタクト抵抗
の低減化と安定化を図った半導体装置の製造方法を提供
することを目的としている。
The present invention has been made in view of the above conventional problems, and it is a method of manufacturing a semiconductor device in which the epitaxial growth of silicon in the contact hole (4) is prevented and the contact resistance is reduced and stabilized. Is intended to provide.

【0006】[0006]

【課題を解決するための手段】本発明は、シリコン基板
(11)上に形成されたBPSG膜あるいはPSG膜等
の絶縁膜(13)をフォトレジストをマスクとして選択
的にエッチングしてコンタクトホール(14)を形成
し、前記コンタクトホール(14)の前記シリコン基板
(11)をHF洗浄して自然酸化膜等を予め除去した後
に、SC1又はSC2洗浄処理を施して該シリコン基板
(11)の表面に薄いシリコン酸化膜(15)を形成
し、その後該薄いシリコン酸化膜(15)上にシリコン
を含有したアルミニウム合金配線(16)を形成するも
のである。
According to the present invention, an insulating film (13) such as a BPSG film or a PSG film formed on a silicon substrate (11) is selectively etched using a photoresist as a mask to form a contact hole ( 14) is formed, the silicon substrate (11) in the contact hole (14) is subjected to HF cleaning to remove a natural oxide film and the like in advance, and then SC1 or SC2 cleaning treatment is applied to the surface of the silicon substrate (11). Then, a thin silicon oxide film (15) is formed on the thin silicon oxide film (15), and then an aluminum alloy wiring (16) containing silicon is formed on the thin silicon oxide film (15).

【0007】[0007]

【作用】上述した手段によれば、シリコン基板(11)
の表面は、SC1洗浄液、SC2洗浄液に含まれる過酸
化水素(H22)の酸化作用により形成された薄いシリ
コン酸化膜(15)で覆われるので、シリコンのエピタ
キシャル成長が起こらないのである。
According to the above-mentioned means, the silicon substrate (11)
Since the surface of is covered with a thin silicon oxide film (15) formed by the oxidizing action of hydrogen peroxide (H 2 O 2 ) contained in the SC1 cleaning liquid and the SC2 cleaning liquid, epitaxial growth of silicon does not occur.

【0008】さらに、SC1洗浄にあっては洗浄液に含
まれる水酸化アンモニウム(NH4OH)によるシリコ
ン表面のエッチング作用、またSC2洗浄にあっては洗
浄液に含まれる塩化水素(HCl)の重金属の除去作用
により、欠陥の少ない良質の薄い酸化膜(15)を形成
することが可能となり、シリコンのエピタキシャル成長
を確実に防止することができるのである。
Further, in the SC1 cleaning, the etching action of the silicon surface by ammonium hydroxide (NH 4 OH) contained in the cleaning liquid, and in the SC2 cleaning, the removal of heavy metal of hydrogen chloride (HCl) contained in the cleaning liquid. By the action, it becomes possible to form a high-quality thin oxide film (15) with few defects, and it is possible to reliably prevent the epitaxial growth of silicon.

【0009】[0009]

【実施例】次に本発明の実施例を図面を参照して説明す
る。図1は、本発明の半導体装置の製造方法を示す断面
図である。まず、図1の(A)に示すように、常法の如
くシリコン基板(11)の表面にリンやボロン等の不純
物をドープして拡散層(12)を形成し、その後該シリ
コン基板(11)上にBPSG膜あるいはPSG膜等の
絶縁膜(13)をCVD法を用いて形成し、しかる後に
フォトレジストをマスクとして該絶縁膜(13)を選択
的にエッチング除去して前記拡散層(12)上にコンタ
クトホール(14)を形成する。
Embodiments of the present invention will now be described with reference to the drawings. FIG. 1 is a cross-sectional view showing a method for manufacturing a semiconductor device of the present invention. First, as shown in FIG. 1A, a diffusion layer (12) is formed by doping impurities such as phosphorus and boron on the surface of a silicon substrate (11) as in a conventional method, and then the silicon substrate (11) is formed. ), An insulating film (13) such as a BPSG film or a PSG film is formed by a CVD method, and then the insulating film (13) is selectively removed by etching using a photoresist as a mask to remove the diffusion layer (12). ), A contact hole (14) is formed thereon.

【0010】次いで、拡散層(12)上に形成される自
然酸化膜あるいは絶縁膜(13)のリフロー熱処理で付
着される酸化膜を除去するためにHF洗浄を施す。しか
る後にSC1洗浄処理(H22,NH4OH,H2Oの所
定混合比の混合液による洗浄処理)又はSC2洗浄処理
(H22,HCl,H2Oの所定混合比の混合液による
洗浄処理)を施し、図1の(B)に示すようにシリコン
基板(11)の表面に10オングストローム程度の薄い
シリコン酸化膜(15)を形成する。かかる洗浄処理に
より薄いシリコン酸化膜(15)が形成されるのは主と
して過酸化水素(H22)の酸化作用によるものであ
り、純水(H2O)の混合比によりその成長レートが制
御される。さらに、SC1洗浄にあっては水酸化アンモ
ニウム(NH4OH)の有するシリコンエッチ作用、S
C2洗浄にあっては塩化水素(HCl)の有するFe,
Cu等の重金属除去作用により、シリコン基板(11)
の表面の浄化がなされるのであり、これにより良質の薄
いシリコン酸化膜が均一に形成されるのである。
Then, HF cleaning is performed in order to remove the natural oxide film formed on the diffusion layer (12) or the oxide film attached by the reflow heat treatment of the insulating film (13). Then, SC1 cleaning treatment (cleaning treatment with a mixed solution of H 2 O 2 , NH 4 OH and H 2 O having a predetermined mixing ratio) or SC2 cleaning treatment (mixing of H 2 O 2 , HCl and H 2 O having a predetermined mixing ratio). Then, a thin silicon oxide film (15) of about 10 Å is formed on the surface of the silicon substrate (11) as shown in FIG. 1B. The thin silicon oxide film (15) is formed by the cleaning treatment mainly due to the oxidizing action of hydrogen peroxide (H 2 O 2 ), and its growth rate depends on the mixing ratio of pure water (H 2 O). Controlled. Furthermore, in SC1 cleaning, the silicon etching action of ammonium hydroxide (NH 4 OH), S
In C2 cleaning, Fe contained in hydrogen chloride (HCl),
Silicon substrate (11) by removing heavy metals such as Cu
The surface is cleaned, and a thin silicon oxide film of good quality is uniformly formed.

【0011】なお、薄い酸化膜(15)を形成するには
他に、大気中放置あるいは温水に漬ける方法が考えられ
る。しかし、これらは膜厚の制御が難しいこと、また異
物による汚染のおそれがある等の欠点がある。この後
は、図1の(C)に示すようにシリコンを1〜2%含有
したアルミニウム合金配線(16)をスパッター法等に
より形成する。ここで、コンタクトホールにおけるシリ
コン析出防止効果を高めるためにアルミニウム合金配線
(16)下に100オングストローム〜1000オング
ストロームのポリシリコン層を設けてもよい。
In addition, in order to form the thin oxide film (15), a method of leaving it in the air or immersing it in warm water may be considered. However, these have drawbacks such as difficulty in controlling the film thickness and risk of contamination by foreign matter. After this, as shown in FIG. 1C, an aluminum alloy wiring (16) containing 1 to 2% of silicon is formed by a sputtering method or the like. Here, a polysilicon layer of 100 Å to 1000 Å may be provided under the aluminum alloy wiring (16) in order to enhance the effect of preventing silicon deposition in the contact hole.

【0012】このように本発明によれば拡散層(12)
とアルミニウム合金配線(16)との間に、導通に実質
的に影響しない程度の薄いシリコン酸化膜(15)を形
成しているので、その後の熱処理工程の際にも、コンタ
クトホール(14)におけるシリコンのエピタキシャル
成長は防止され、コンタクト抵抗の低減化と安定化を図
ることができるのである。
Thus, according to the present invention, the diffusion layer (12)
A thin silicon oxide film (15) is formed between the aluminum alloy wiring (16) and the aluminum alloy wiring (16) so that the conduction is not substantially affected. Epitaxial growth of silicon is prevented, and contact resistance can be reduced and stabilized.

【0013】[0013]

【発明の効果】以上説明したように、本発明によれば、
シリコン基板(11)の表面は薄いシリコン酸化膜(1
5)で覆われるので、コンタクトホール(14)におけ
るシリコンのエピタキシャル成長が防止され、コンタク
ト抵抗の低減化を図ることが可能となる。
As described above, according to the present invention,
The surface of the silicon substrate (11) has a thin silicon oxide film (1
Since it is covered with 5), the epitaxial growth of silicon in the contact hole (14) is prevented, and the contact resistance can be reduced.

【0014】さらに本発明によれば、欠陥等のない良質
な薄いシリコン酸化膜(15)が形成されるので、かか
る欠陥部分からシリコンのエピタキシャル成長が起こる
おそれがなく、コンタクト抵抗の低減化とともにそのば
らつきを小さくする効果も有している。
Further, according to the present invention, since a high-quality thin silicon oxide film (15) having no defects is formed, there is no possibility of epitaxial growth of silicon from such a defective portion, and the contact resistance is reduced and its variation is reduced. Also has the effect of reducing

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例に係る半導体装置の製造方法を
示す断面図である。
FIG. 1 is a cross-sectional view showing a method of manufacturing a semiconductor device according to an embodiment of the invention.

【図2】従来例に係る半導体装置の製造方法を示す断面
図である。
FIG. 2 is a cross-sectional view showing a method of manufacturing a semiconductor device according to a conventional example.

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 シリコン基板上に形成された絶縁膜を選
択的にエッチングしてコンタクトホールを形成する工程
と、 前記コンタクトホールの前記シリコン基板にHF洗浄処
理及びSC1洗浄処理を順次施して、該シリコン基板の
表面にシリコンのエピタキシャル成長を防止するための
薄いシリコン酸化膜を形成する工程と、該薄いシリコン
酸化膜上にシリコンを含有するアルミニウム合金配線を
形成する工程とを有することを特徴とする半導体装置の
製造方法。
1. A step of selectively etching an insulating film formed on a silicon substrate to form a contact hole, and a step of subjecting the silicon substrate of the contact hole to HF cleaning treatment and SC1 cleaning treatment in sequence to obtain the contact hole. A semiconductor comprising a step of forming a thin silicon oxide film on the surface of a silicon substrate for preventing epitaxial growth of silicon, and a step of forming an aluminum alloy wiring containing silicon on the thin silicon oxide film. Device manufacturing method.
【請求項2】 シリコン基板上に形成された絶縁膜を選
択的にエッチングしてコンタクトホールを形成する工程
と、 前記コンタクトホールの前記シリコン基板にHF洗浄処
理及びSC2洗浄処理を順次施して、該シリコン基板の
表面にシリコンのエピタキシャル成長を防止するための
薄いシリコン酸化膜を形成する工程と、該薄いシリコン
酸化膜上にシリコンを含有するアルミニウム合金配線を
形成する工程とを有することを特徴とする半導体装置の
製造方法。
2. A step of selectively etching an insulating film formed on a silicon substrate to form a contact hole, and an HF cleaning process and an SC2 cleaning process being sequentially performed on the silicon substrate of the contact hole, A semiconductor comprising a step of forming a thin silicon oxide film on the surface of a silicon substrate for preventing epitaxial growth of silicon, and a step of forming an aluminum alloy wiring containing silicon on the thin silicon oxide film. Device manufacturing method.
JP24969891A 1991-09-27 1991-09-27 Manufacture of semiconductor device Pending JPH0590193A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP24969891A JPH0590193A (en) 1991-09-27 1991-09-27 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP24969891A JPH0590193A (en) 1991-09-27 1991-09-27 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH0590193A true JPH0590193A (en) 1993-04-09

Family

ID=17196877

Family Applications (1)

Application Number Title Priority Date Filing Date
JP24969891A Pending JPH0590193A (en) 1991-09-27 1991-09-27 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH0590193A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008034730A (en) * 2006-07-31 2008-02-14 Mitsumi Electric Co Ltd Manufacturing method of semiconductor device
WO2016017007A1 (en) * 2014-07-31 2016-02-04 三菱電機株式会社 Semiconductor device manufacturing method

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247928A (en) * 1984-05-23 1985-12-07 Seiko Instr & Electronics Ltd Cleaning method of semiconductor substrate
JPS62260320A (en) * 1986-05-06 1987-11-12 Mitsubishi Electric Corp Manufacture of semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60247928A (en) * 1984-05-23 1985-12-07 Seiko Instr & Electronics Ltd Cleaning method of semiconductor substrate
JPS62260320A (en) * 1986-05-06 1987-11-12 Mitsubishi Electric Corp Manufacture of semiconductor device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008034730A (en) * 2006-07-31 2008-02-14 Mitsumi Electric Co Ltd Manufacturing method of semiconductor device
WO2016017007A1 (en) * 2014-07-31 2016-02-04 三菱電機株式会社 Semiconductor device manufacturing method
JPWO2016017007A1 (en) * 2014-07-31 2017-04-27 三菱電機株式会社 Manufacturing method of semiconductor device

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