JPH0593920A - Liquid crystal display device and manufacturing method thereof - Google Patents

Abstract

PURPOSE:To improve the yield of production by the improvement in the working efficiency of TFTs and the relaxation of a scale factor and to reduce the production cost of a TFT substrate. CONSTITUTION:The many TFTs 2 are simultaneously and concentrically formed at a high density on a substrate, such as wafer 1, different from a TFT substrate 5 separably by cutting from the substrate. The discrete transistors 21 cut and separated from the TFTs 2 formed at the high density are mounted respectively in the positions corresponding to the respective picture elements on the substrate having wirings, etc., for a matrix, by which the TFT substrate 5 is formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a flat panel type liquid crystal display device, such as a switch matrix type liquid crystal television monitor, in which a large number of display pixels are individually controlled by switching transistors, and a manufacturing method thereof.
In particular, by improving the manufacturing yield of thin film transistors,
The present invention relates to a liquid crystal display device suitable for reducing the manufacturing cost of a thin film transistor substrate and a manufacturing method thereof.

[0002]

2. Description of the Related Art In the field of flat panel displays such as liquid crystal television monitors among liquid crystal display devices, there is an increasing need for products capable of realizing bright images, high resolution, fast response, and multi-gradation display. A 3-terminal thin film transistor (T) is formed on a glass substrate for a display by using a photoresist process or a film forming process.
A TFT liquid crystal television monitor that directly forms a thin-film-transistor (hereinafter simply referred to as a TFT) uses a TFT as a switching element and can control each pixel individually and in multiple gradations. It is in the spotlight and is in the process of being developed to further increase the screen size and resolution.

FIG. 11 shows a structural concept of a switch matrix type liquid crystal television monitor. In the figure, 24a-2
4m is a data line connected to the signal drive system 51, 25a-
25n is a gate line connected to the scan drive system 50, 26 is a data line 24a to 24m and gate lines 25a to 25n.
Is a large number of pixel electrodes provided corresponding to the above, 29 is a capacitance storage portion of the pixel electrode 26, and 52 is a transistor for a pixel drive switch. When the transistor 52 is selected by the data lines 24a to 24m and the gate lines 25a to 25n, charges are stored in the capacitance storage unit 29, and the pixel electrode 26 and the pixel electrode 26 are opposed to each other in accordance with the stored charge amount. The electric field between the transparent electrode (not shown) arranged changes and the orientation of the liquid crystal sealed between the two is controlled.

The conventional manufacturing method of the above-mentioned TFT liquid crystal television monitor is "flat panel display 1991".
(Edited by Nikkei Electronics / Nikkei Microdevices,
Nikkei BP 1990.11.26 issued, p82), T
The FT forming process, the process of making an active matrix type substrate, the process of forming cells and mounting the driver, etc. are described. Of these, a general example of the TFT formation process is
It will be described with reference to FIG. In the figure, a gate electrode 12 is first formed on a glass substrate 28, and then a gate oxide film 13, a gate insulating film 14, amorphous Si 15, and a channel stopper 16 are sequentially formed. Next, an island of amorphous Si 15 is formed and a diffusion prevention film 17, 1 called an ohmic layer is formed on the island.
7'is formed. Next, a pixel electrode of an ITO film (not shown) is formed, and the source electrode 18 and the drain electrode 1 are further formed.
After forming 9, the protective film 20 is formed to complete the TFT. This TFT is manufactured by a photoresist process for exposing and developing a pattern, as in the case of a semiconductor,
It was carried out by a film forming process such as sputtering, etching or CVD. Then, a TFT liquid crystal television monitor has a TFT substrate on which a large number of completed TFTs are mounted, after forming a black matrix or a color filter (not shown) on the TFT substrate and a cover glass provided with a counter electrode of an ITO film. , Are formed so as to face each other through the enclosed liquid crystal. In this case, the gap of the enclosed liquid crystal was kept constant by enclosing a large number of beads having a small diameter together with the liquid crystal.

[0005]

Since the photoresist process and the film forming process in the manufacture of the above-mentioned TFT are a batch process performed on the entire surface of the substrate of the TFT, conventionally, this method is the same as the case of the semiconductor. It was thought to be the key to reducing manufacturing costs. However, since most of the area of the TFT substrate is occupied by the openings of the pixels, the total area ΣAt of all the TFTs on the substrate shown in Equation 1 is a proportion of the total area Ad of the TFT substrate. That is, the value of the processing efficiency η becomes a very small value of 1 / several hundred to 1 / several thousand. This value is almost equal to the ratio of one TFT area At and one pixel area Ae.

[0006]

[Equation 1]

Therefore, the substantial processing efficiency of the photoresist process and the film forming process is lowered, the manufacturing throughput is lowered, and the need for an expensive manufacturing apparatus such as a high-precision exposure apparatus is brought about. However, there is a problem in that there is a limit to the reduction of

The transistor characteristics of the TFT largely depend on the channel length L shown in FIG. 12, but in order to make the area of the pixel opening as wide as possible,
Therefore, the size of the TFT itself tends to be reduced. However, since there is a strong need for a larger screen of the display, the area of the TFT substrate that becomes the screen tends to increase. Therefore, the required processing accuracy of the channel length L with respect to the screen size S shown in Formula 2 is required. The scale factor C defined as the ratio of ΔL is usually 2 to 3
It is PPM.

[0009]

[Equation 2]

This value is about half or less compared to several PPM in the case of semiconductors, and image distortion and alignment error at the time of exposure cannot be ignored, which lowers the manufacturing yield and raises the manufacturing cost. Had a point.

Further, conventionally, as shown in FIG. 10 which is an enlarged plan view of one pixel portion, the position of the transistor 52 is deviated from the data line 24 and the gate line 25 for the reason of stabilizing the characteristics of the transistor 52 and the like. Had formed. Therefore, the area of the opening 31 of each pixel is limited to the reduced area shown by hatching in the figure excluding the area of the pixel electrode 26 and the area where the capacitor 29 and the drain electrode 19 are connected, and the image quality is degraded. It was one of the causes.

The present invention has been made in view of the above problems of the prior art.
An object of the present invention is to provide a liquid crystal display device and a method for manufacturing the same, which can improve the manufacturing yield of the TFT by reducing the processing efficiency of the TFT and reduce the scale factor, and reduce the manufacturing cost of the TFT substrate.

[0013]

To achieve the above object, the present invention provides a matrix wiring, a large number of pixel electrodes provided corresponding to the wiring, and a switching transistor for each pixel electrode. In a flat panel type liquid crystal display device comprising a substrate having, a cover glass having a counter electrode, and a liquid crystal sealed between the two facing each other, on a substrate such as a wafer different from the substrate,
A large number of thin film transistors are formed at high density so that they can be cut and separated from the substrate, and individual transistors formed by cutting and separating from the thin film transistors are respectively placed at positions corresponding to each pixel on the substrate having the matrix wiring and the like. This is configured to include a thin film transistor substrate formed by mounting.

It is desirable that the individual transistor is formed by cutting and separating by the lift-off method, and the mounting surface of the individual transistor is formed in a circular shape, and three concentric electrodes are formed on the mounting surface. Alternatively, the shape of the mounting surface may be formed asymmetrically to the left or right or top and bottom. Furthermore, it is preferable that the thickness of the individual transistor is formed to have a predetermined constant dimension.

On the other hand, the method of manufacturing a liquid crystal display device of the present invention comprises a substrate having wirings for a matrix, a large number of pixel electrodes provided corresponding to the wirings, and transistors for switching each pixel electrode, In a method of manufacturing a flat panel type liquid crystal display device comprising a cover glass having a counter electrode, and a liquid crystal sealed between the two facing each other, on a substrate such as a wafer different from the substrate,
A lift-off layer made of a resist material that can be selectively removed later is formed, and a large number of thin film transistors are formed on the upper surface of the lift-off layer by a photoresist process or a film-forming process, and electrodes for connecting to the matrix wiring and the pixel electrodes are the lift-off layer. Each pixel is formed on the substrate having the matrix wiring etc. by forming the transistor with a high density so as to be flush with the upper surface, removing the lift-off layer and cutting and separating individual transistors from the thin film transistor. The thin film transistor substrate is formed by being mounted at a position corresponding to the above and electrically connecting.

Then, it is desirable to separate and separate the individual transistors from the thin film transistors formed on the substrate such as the wafer by a lift-off method. Further, the mounting surface of the individual transistor is formed into a circular shape and the mounting surface is formed. It is advisable to form three concentric electrodes or to form the mounting surface asymmetrically to the left or right or up and down. On the other hand, a positioning layer for positioning during mounting, which corresponds to the mounting surface shape of the individual transistor, may be formed on the substrate surface of the thin film transistor on which the individual transistor is mounted. Further, it is preferable that the thickness of the individual transistor is formed in a predetermined constant dimension by controlling the film forming process.

[0017]

With the above structure, many TFTs are
On a glass or Si wafer different from the TFT substrate,
As in the case of the conventional semiconductor manufacturing, a photoresist process or a film forming process is used to intensively form the wafer so that the wafer can be cut and separated. T formed in this way
The FT does not require a dicing width close to 100 μm as in the conventional mechanical cutting method using a dicing saw or the like, so that it can be formed on the wafer at a high density with a gap of several μm. Therefore, as will be described later, the value of the processing efficiency η is remarkably improved as compared with the level of the prior art, and the value of the scale factor C is also eased to a level several times higher, thus improving the manufacturing yield of TFTs. Let me T
It is possible to significantly reduce the manufacturing cost of the entire FT substrate. And by controlling the film formation process,
It is also possible to form the thickness of the large number of TFTs into thin and stable predetermined dimensions.

The TFT formed on the wafer is cut and separated into individual transistors from the wafer by using a technique such as a lift-off method, and the separated individual transistors are divided into a matrix wiring and the wiring. It is mounted at a position corresponding to each pixel on a substrate having a large number of pixel electrodes provided correspondingly. By this mounting, the electrodes and the like are electrically connected to each other, and a transistor for switching each pixel electrode is formed to complete the TFT substrate.

[0019]

Embodiments of the present invention will be described below with reference to FIGS. 1 to 9. FIG. 1 is a flow chart for forming a TFT substrate, FIG. 2 is a cross-sectional view showing a structural example of a TFT formed on a wafer, FIG. 3 is an explanatory diagram for mounting individual transistors on a TFT substrate, and FIG. 4 is mounting individual transistors. FIG. 5 is a side sectional view showing the first embodiment of the surface shape, FIG. 5 is a view taken from the direction of arrows VV in FIG. 4 (bottom view), and FIG. 6 is a plan view showing the second embodiment of the mounting surface shape of the individual transistor. FIG. 7 is a plan view showing a third embodiment of the mounting surface shape of individual transistors, and FIG. 8 is an enlarged plan view of one pixel portion mounting individual transistors.
FIG. 9 is a partial side sectional view of a liquid crystal display device equipped with individual transistors. In the figure, the same symbols as those in FIGS. 10 to 12 indicate the same components.

In FIG. 1, 1 is a wafer made of glass or Si or the like, and 2 is formed on the wafer 1 in a high density with a gap of several μm by a photoresist process or a film forming process as in the conventional semiconductor manufacturing. It is a large number of TFTs.
In this case, when forming the TFT 2, first, the wafer 1
A lift-off layer 11 shown in FIG. 2 made of a resist material that can be selectively removed later is formed thereon, and then formed on the upper surface of the lift-off layer 11 by the above process. 3 indicated by an arrow is a cutting and separating step of removing the lift-off layer 11 by the lift-off method to separate the TFT 2 from the wafer 1, and 21 is a separated individual transistor. Reference numeral 5 denotes a TFT substrate having a matrix wiring and a large number of pixel electrodes provided corresponding to the wiring, and 4 shown by an arrow mounts an individual transistor 21 at a position corresponding to each pixel on the TFT substrate 5. The process is shown.

By the formation of the TFT 2 by the above process, the substantial processing efficiency η of the present invention is one TFT area At, and the cutting allowance area Ac is added to the area At, as shown in Equation 3. It becomes the ratio with the area. Therefore, the substantial processing efficiency η is at a level of several tens of percent, as is clear from this formula. Therefore, it is improved by two digits or more as compared with the conventional level value of 1 / several hundreds to 1 / several thousands.

[0022]

[Equation 3]

From the above, it is possible to improve the throughput of manufacturing the TFT substrate, to dispense with the use of expensive manufacturing equipment such as a highly accurate exposure apparatus which has been conventionally required, and to significantly reduce the manufacturing cost.

Further, the scale factor C is the ratio of the required processing precision ΔL of the channel length L to the processing (exposure) unit size T, as shown in the equation (4). Therefore, the scale factor C in the present invention has a level of about 10 to several tens PPM. This value is relaxed several times as compared with the conventional 2-3PPM.

[0025]

[Equation 4]

The relaxation of the scale factor C has an effect that image distortion at the time of exposure, alignment error and the like can be alleviated, the manufacturing yield is improved and the manufacturing cost is reduced.

Since the processing accuracy of the substrate before mounting the TFT 2 is eased, a manufacturing apparatus of an inexpensive method such as a printing method is used instead of the expensive manufacturing apparatus of the photoresist process which has been used conventionally. Becomes possible, TF
The manufacturing cost of the T substrate 5 can be reduced.

Next, in FIG. 2, the gate electrode 12 is first formed on the upper surface of the lift-off layer 11 formed on the wafer 1 in the same manner as shown in FIG. 12, and then the gate oxide film 13 and the gate insulating film 14 are formed. , Amorphous Si15,
The channel stoppers 16 are sequentially formed. Next, islands of amorphous Si 15 are formed, and diffusion preventing films 17 and 17 'called ohmic layers are formed on the islands. Next, an ITO film pixel electrode (not shown) is formed, and further,
After forming the source electrode 18 and the drain electrode 19, the TFT 2 is formed by covering with the protective film 20. In this case, the surfaces of the source electrode 18 and the drain electrode 19 on the one end side are made to coincide with the upper surface of the lift-off layer 11 similarly to the gate electrode 12. After the TFT 2 is formed, if the lift-off layer 11 is removed by immersing it in a developing solution or the like, the TFT 2 becomes the wafer 1
The individual transistors 21 are formed by cutting and separating.

As described above, since the TFT 2 is cut and separated from the wafer 1 by using the lift-off method, the wafer 1
The upper TFT 2 does not require a dicing width close to 100 μm unlike the conventional mechanical cutting method such as a dicing saw,
It becomes possible to form a high density with a gap of several μm. Accordingly, the value of the substantial processing efficiency η is significantly improved by two digits or more as compared with the level of the prior art as shown in the above-mentioned expression 3, and the value of the scale factor C is also the above-mentioned expression 4. As shown in the figure, the manufacturing cost of the TFT 2 can be reduced to several times, the manufacturing yield of the TFT 2 can be improved, and the manufacturing cost of the entire TFT substrate 5 can be significantly reduced. Then, by controlling the film forming process, it becomes possible to form the plurality of TFTs 2 to a thin and stable predetermined size.

Next, in FIG. 3, 6 is a data line 24 and a gate line 25 which form a matrix wiring,
A pixel electrode 26 formed of an ITO film, and a substrate 23 formed by sandwiching an insulating layer 27 on a glass substrate 28,
Reference numeral 23 'is a positioning layer using irregularities formed near the intersection of the matrix wiring on the upper surface of the substrate 6. Positioning layer 2
3, 23 ′ are arranged so that when the individual transistors 21 are mounted on the substrate 6, they can be easily inserted and arranged at predetermined positions.
It is formed so as to serve as a guide hole for positioning the outer peripheral portion of the individual transistor 21. In the mounted individual transistor 21, the source electrode 18 is connected to the data line 24 via the solder 22a, the gate electrode 12 is connected to the gate line 25 via the solder 22b, and the drain electrode 19 is connected to the solder 2.
The pixel electrodes 26 are respectively connected via 2c.

4 and 5, the mounting surface of the individual transistor 21 on the substrate 6 is formed in a circular shape, and the source electrodes 18, 18 'and the drain electrodes 19, 1 are formed.
9'is concentrically arranged around the gate electrode 12 on the mounting surface on the substrate 6. By arranging the mounting surface shape of the individual transistor 21 and each electrode in this manner, the source electrode 18, the gate electrode 12, and the drain electrode 1 are mounted when the individual transistor 21 is mounted.
9 electrodes and data lines 24 corresponding to the respective electrodes,
Each connection with the gate line 25 and the pixel electrode 26 can be easily and accurately performed without making a mistake in polarity. Here, 32 is the source electrodes 18, 18 'and the drain electrode 1
It is an insulating layer between 9, 19 '.

6 and 7 are examples in which the mounting surface shape on the substrate 6 is formed in an asymmetrical rectangular shape. In this case, the positioning layers 23 and 23 'are formed so that their shapes and arrangements match the mounting surface shapes of the individual transistors 21a and 21b. Here, FIG. 6 shows the individual transistor 21.
The protrusion 30a is provided in a part of a, and the three electrodes of the source electrode 18, the gate electrode 12, and the drain electrode 19 are arranged in a line in order. 7 is a modification of FIG. 6, in which a protrusion 30b is provided in a part of the individual transistor 21b, the drain electrode 19 connected to the pixel electrode 26 is provided in the protrusion 30b, and the source electrode 18 and the gate electrode 12 are provided. In this example, the positions are shifted. In the case of the example of FIGS. 6 and 7, as in the case of FIG. 4, the mounting can be performed easily and accurately without making a mistake in the polarity.

FIG. 8 is a view corresponding to FIG. 10 and shows a state in which the individual transistor 21b having the shape shown in FIG. 7 is mounted. In this case, as is apparent from the figure, the individual transistor 21b can be mounted on the intersection of the data line 24 and the gate line 25, and the area of the opening 33 in one pixel shown by the diagonal lines is the same as that in FIG. Opening 3 shown in
It will be considerably enlarged compared to the area of 1. Therefore, there is an effect that it is possible to reproduce an image with higher brightness than in the past.

Next, in FIG. 9, 40 is a counter electrode, 4
Reference numeral 1 is a color filter, 42 is a cover glass, and 43 is a liquid crystal. In this case, the thickness of the individual transistor 21 is controlled to a predetermined constant size by controlling the film forming process, so that the individual transistor 21 is formed into the counter electrode 40.
And cover glass 42 with color filter 41
It can be used as a spacer at the time of bonding the TFT substrate 5 and the TFT substrate 5, and the liquid crystal gap between the bonded substrates can be set easily and highly accurately.
For this reason, the thickness of the enclosed liquid crystal 43 becomes constant, and there is an effect that a large number of beads used conventionally for setting the liquid crystal gap become unnecessary.

In the above embodiment, the switch matrix type liquid crystal television monitor is described as an example, but the present invention is not limited to this, and a small transistor of several μm to several tens μm is formed on the wafer 1. A large number of devices are formed at one time in a concentrated manner, and after being cut and separated from the wafer 1, a large number of separated individual transistors 21 are mounted on the substrate 6 having a large area. Further, the structure of the transistor may be changed depending on the object to which the present invention is applied, and further, in the form of a unit in which a plurality of elements such as transistors are formed on a size of several μm to several tens μm,
It is also possible to mount a large number on the substrate 6.

[0036]

As described above, according to the present invention, a large number of TFTs are formed at the same time in a concentrated manner on a substrate such as a wafer different from the TFT substrate so that the TFTs can be cut and separated from the substrate. Since individual transistors cut and separated from the TFT formed in the above are respectively mounted at positions corresponding to each pixel on the substrate having the matrix wiring and the like to form the TFT substrate, it is practically possible to form the TFT substrate. By improving the processing efficiency and reducing the scale factor, the manufacturing yield can be improved. And
Since the cutting accuracy in forming the matrix wiring and the pixel electrode is also relaxed, an expensive manufacturing apparatus such as a high-precision exposure apparatus for a large area is not required, and the manufacturing cost of the TFT substrate can be significantly reduced. Thus, it is possible to reduce the cost of the liquid crystal display device and the manufacturing method thereof.

[Brief description of drawings]

FIG. 1 is a flow explanatory diagram of forming a TFT substrate of the present invention.

FIG. 2 is a diagram showing a TF formed on a wafer according to an embodiment of the present invention.
It is sectional drawing which shows the constructional example of T.

FIG. 3 is an explanatory diagram showing how individual transistors are mounted on a TFT substrate according to an embodiment of the present invention.

FIG. 4 shows a first mounting surface shape of an individual transistor of the present invention.
It is a side sectional view showing an example of.

FIG. 5 is a view (bottom view) taken along the line VV of FIG.

FIG. 6 shows a second mounting surface shape of the individual transistor of the present invention.
It is a top view showing an example of.

FIG. 7 shows a third mounting surface shape of the individual transistor of the present invention.
It is a top view showing an example of.

FIG. 8 is an enlarged plan view of one pixel portion on which the individual transistor of one embodiment of the present invention is mounted.

FIG. 9 is a partial side sectional view of a liquid crystal display device equipped with an individual transistor according to an embodiment of the present invention.

FIG. 10 is an enlarged plan view of one pixel portion including a conventional transistor.

FIG. 11 is a diagram showing a schematic structure of a switch matrix type liquid crystal television monitor.

FIG. 12 is a side sectional view of a conventional TFT.

[Explanation of symbols]

1 ... Wafer, 2 ... TFT (thin film transistor), 5 ... T
FT substrate, 6 ... Substrate, 11 ... Lift-off layer, 12 ... Gate electrode, 18, 18 '... Source electrode, 19, 19' ... Drain electrode, 21, 21a, 21b ... Individual transistor, 23, 23 '... Positioning layer, 24 ... data line, 25
... Gate lines, 26 ... Pixel electrodes, 31, 33 ... Pixel openings, 43 ... Liquid crystal.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Satoru Todoroki 292 Yoshida-cho, Totsuka-ku, Yokohama-shi, Kanagawa Prefectural Institute of Technology Hitachi, Ltd.

Claims (11)

[Claims] 1. A substrate having wiring for a matrix, a large number of pixel electrodes provided corresponding to the wiring, and transistors for switching each pixel electrode, and a cover glass having a counter electrode are opposed to each other. In a flat panel type liquid crystal display device comprising a liquid crystal sealed between the both, on a substrate such as a wafer different from the substrate,
A large number of thin film transistors are formed at high density so that they can be cut and separated from the substrate, and individual transistors formed by cutting and separating from the thin film transistors are respectively placed at positions corresponding to each pixel on the substrate having the matrix wiring and the like. A liquid crystal display device comprising a thin film transistor substrate formed by being mounted. 2. The liquid crystal display device according to claim 1, wherein the individual transistors are formed by cutting and separating by a lift-off method. 3. The liquid crystal display device according to claim 1, wherein the individual transistor has a mounting surface formed in a circular shape, and three concentric electrodes are formed on the mounting surface. 4. The liquid crystal display device according to claim 1, wherein the individual transistors are formed such that the shape of the mounting surface thereof is asymmetrical to the left or right or the top and bottom. 5. The liquid crystal display device according to claim 1, wherein the individual transistors are formed to have a predetermined thickness. 6. A substrate having wiring for a matrix, a large number of pixel electrodes provided corresponding to the wiring, and transistors for switching each pixel electrode, and a cover glass having a counter electrode are opposed to each other. In a method of manufacturing a flat panel type liquid crystal display device comprising a liquid crystal sealed between the two, a lift-off layer made of a resist material that can be selectively removed later on a substrate such as a wafer different from the substrate. And forming a large number of thin film transistors on the upper surface of the lift-off layer by a photoresist process or a film-forming process with high density so that the electrodes connecting to the matrix wiring and the pixel electrodes are flush with the upper surface of the lift-off layer, The lift-off layer is removed to separate individual transistors from the thin film transistors, and the separated individual transistors are separated. A method of manufacturing a liquid crystal display device, comprising forming a thin film transistor substrate by mounting a transistor at a position corresponding to each pixel on a substrate having the matrix wiring or the like and electrically connecting the transistors. 7. The method for manufacturing a liquid crystal display device according to claim 6, wherein the individual transistors are cut and separated from the thin film transistors formed on the substrate such as the wafer by a lift-off method. 8. The method for manufacturing a liquid crystal display device according to claim 6, wherein a mounting surface of the individual transistor is formed in a circular shape, and three electrodes having concentric circles are formed on the mounting surface. 9. The method of manufacturing a liquid crystal display device according to claim 6, wherein the shape of the mounting surface of the individual transistor is formed asymmetrically in the left-right direction or the vertical direction. 10. The liquid crystal display device according to claim 6, wherein a positioning layer for positioning at the time of mounting corresponding to the mounting surface shape of the individual transistor is formed on the substrate surface of the thin film transistor on which the individual transistor is mounted. Production method. 11. The thickness of the individual transistor is controlled to a predetermined constant size by controlling a film forming process.
A method for manufacturing the liquid crystal display device described.