JPH0612721B2 - Substrate for chip resistor - Google Patents
Substrate for chip resistorInfo
- Publication number
- JPH0612721B2 JPH0612721B2 JP60041856A JP4185685A JPH0612721B2 JP H0612721 B2 JPH0612721 B2 JP H0612721B2 JP 60041856 A JP60041856 A JP 60041856A JP 4185685 A JP4185685 A JP 4185685A JP H0612721 B2 JPH0612721 B2 JP H0612721B2
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- chip resistor
- electrodes
- electrode
- view
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 239000000758 substrate Substances 0.000 title claims description 16
- 238000005192 partition Methods 0.000 claims description 3
- 238000000926 separation method Methods 0.000 claims 1
- 238000005259 measurement Methods 0.000 description 11
- 239000000523 sample Substances 0.000 description 8
Landscapes
- Apparatuses And Processes For Manufacturing Resistors (AREA)
- Non-Adjustable Resistors (AREA)
- Details Of Resistors (AREA)
Description
【発明の詳細な説明】 (産業上の利用分野) 本発明は、電子回路に一般的に使用されるチップ抵抗器
用の基板に関するものである。BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a substrate for a chip resistor generally used in electronic circuits.
(従来の技術) 従来のチップ抵抗器用基板について第4図および第5図
により説明する。(Prior Art) A conventional chip resistor substrate will be described with reference to FIGS. 4 and 5.
第4図において、チップ抵抗器用基板は、縦溝1と横溝
2によって区画された絶縁基板3の個々の区画の表面に
それぞれ、横溝2を介して隣接する区画と共通になった
相対向する一対の電極4および5を形成し、この一対の
電極4および5に接触する状態で低抗体6を設けたもの
である。In FIG. 4, a chip resistor substrate is a pair of opposed and common sections that are common to adjacent sections via the horizontal groove 2 on the surfaces of the individual sections of the insulating substrate 3 defined by the vertical groove 1 and the horizontal groove 2. Electrodes 4 and 5 are formed, and the low antibody 6 is provided in contact with the pair of electrodes 4 and 5.
第5図は第4図の一部を拡大した平面図で、各区画の電
極4および5にそれぞれプローブ7を接触させて抵抗を
測定する。FIG. 5 is an enlarged plan view of a part of FIG. 4, in which the probe 7 is brought into contact with the electrodes 4 and 5 of each section to measure the resistance.
(発明が解決しようとする問題点) このような従来の構成では、プローブ7の先端部が接触
する電極4および5の面積が小さく、4端子測定を行う
ためには、プローブ7の形状を加工することが難しく、
また強度にも難点であり、やむなく2端子測定が採用さ
れていた。しかしながら、2端子測定では接触抵抗およ
び線抵抗を除去できず真値を得ることができないという
問題があり、特に低抵抗の場合に顕著であった。(Problems to be Solved by the Invention) In such a conventional configuration, the area of the electrodes 4 and 5 with which the tip portion of the probe 7 contacts is small, and in order to perform four-terminal measurement, the shape of the probe 7 is processed. Difficult to do,
In addition, the strength is also a drawback, and the two-terminal measurement was unavoidably adopted. However, in the two-terminal measurement, there is a problem that the contact resistance and the line resistance cannot be removed and the true value cannot be obtained, which is particularly remarkable in the case of low resistance.
また、使用者から全抵抗値域で高精度化するよう強い要
望が出されていることも、上記の問題点がクローズアッ
プされる背景にある。In addition, there is a strong demand from the user to improve the accuracy in the entire resistance value range, which is the background to the above-mentioned problem.
本発明は上記の問題点を解決するもので、4端子測定が
行え、抵抗値の高精度測定が可能なチップ抵抗器用基板
を提供しようとするものである。The present invention solves the above-mentioned problems, and an object of the present invention is to provide a substrate for a chip resistor capable of performing 4-terminal measurement and highly accurate measurement of a resistance value.
(問題点を解決するための手段) 上記の問題点を解決するために、本発明は相対向する電
極のうち一方が縦溝を介して隣接する区画の電極と、他
の一方が逆方向の縦溝を介して隣接する区画の電極とそ
れぞれ共通にし、このような一対の電極に接触する低抗
体を設けるものである。(Means for Solving Problems) In order to solve the above problems, according to the present invention, one of electrodes facing each other has an electrode in a partition adjacent to each other via a vertical groove, and the other has electrodes in opposite directions. The low antibody that is in common with the electrodes of the adjacent sections via the vertical groove and is in contact with such a pair of electrodes is provided.
(作用) 上記の構成によって、抵抗体1個に対する電極面積を従
来の2倍強にすることができ、4端子測定が可能とな
り、抵抗値を高精度で測定できるようにするものであ
る。(Operation) With the above configuration, the electrode area for one resistor can be made slightly more than twice that of the conventional one, and 4-terminal measurement can be performed, and the resistance value can be measured with high accuracy.
(実施例) 本発明の実施例を第1図ないし第3図により説明する。(Embodiment) An embodiment of the present invention will be described with reference to FIGS.
第1図は本発明によるチップ抵抗器用基板の平面図で、
チップ抵抗器用基板は、縦溝1と横溝2によって区画さ
れた絶縁基板3の個々の区画の表面にそれぞれ、縦溝1
を介して逆方向に相隣接する区画と共通の相対向する一
対の電極8および9を形成し、この一対の電極8および
9に接触するように低抗体6を設けたものである。FIG. 1 is a plan view of a chip resistor substrate according to the present invention.
The chip resistor substrate is provided with vertical grooves 1 on the surfaces of the individual partitions of the insulating substrate 3 partitioned by the vertical grooves 1 and the horizontal grooves 2, respectively.
A pair of electrodes 8 and 9 facing each other in common with the adjacent compartments in the opposite direction via is formed, and the low antibody 6 is provided so as to contact the pair of electrodes 8 and 9.
第2図は第1図の一部を拡大した平面図で、相対向する
電極8および9が、その区画を形成する両側の縦溝1を
介し、それぞれ逆方向に隣接する区画と共通の電極とな
っている。FIG. 2 is an enlarged plan view of a part of FIG. 1, in which electrodes 8 and 9 facing each other are common to adjacent sections in opposite directions via the longitudinal grooves 1 on both sides forming the section. Has become.
第3図は抵抗器を4端子測定する場合の具体例を示した
もので、低抗体6aの抵抗値を測定する場合は、隣接する
区画と共通の電極8aおよび9aにそれぞれ接触しているプ
ローブ7の測定端子7aと7b、および7cと7dで測定する。
プローブ7は従来と同じものを使用する。FIG. 3 shows a specific example of measuring the resistance of a resistor with four terminals. When measuring the resistance value of the low antibody 6a, the probes in contact with the adjacent sections and the common electrodes 8a and 9a, respectively. 7 measurement terminals 7a and 7b, and 7c and 7d.
The probe 7 is the same as the conventional one.
(発明の効果) 本発明によれば、電極の面積が大きいために、4端子測
定が可能となり、抵抗値の測定精度が向上する。特に、
低抵抗領域での測定精度の向上に著しい効果があり、使
用者の要望を満足させ、製品への信頼度を向上する著し
い効果がある。(Effect of the Invention) According to the present invention, since the area of the electrode is large, four-terminal measurement is possible, and the measurement accuracy of the resistance value is improved. In particular,
There is a significant effect in improving the measurement accuracy in the low resistance region, and there is a significant effect in satisfying the user's request and improving the reliability of the product.
第1図は本発明によるチップ抵抗器用基板の平面図、第
2図は第1図の部分拡大平面図、第3図は本発明のチッ
プ抵抗器用基板を4端子測定する場合の電極とプローブ
端子の位置関係を示す平面図、第4図は従来のチップ抵
抗器用基板の平面図、第5図は第4図を一部を拡大し、
電極とプローブの位置関係を示した平面図である。 1……縦溝、2……横溝、3……絶縁基板、4,5,
8,8a,9,9a……電極、6,6a……低抗体、7……プ
ローブ、7a,7b,7c,7d……測定端子。FIG. 1 is a plan view of a chip resistor substrate according to the present invention, FIG. 2 is a partially enlarged plan view of FIG. 1, and FIG. 3 is an electrode and a probe terminal for measuring four terminals of the chip resistor substrate of the present invention. FIG. 4 is a plan view showing the positional relationship of FIG. 4, FIG. 4 is a plan view of a conventional chip resistor substrate, and FIG. 5 is a partially enlarged view of FIG.
It is a top view showing the physical relationship of an electrode and a probe. 1 ... Vertical groove, 2 ... Horizontal groove, 3 ... Insulating substrate, 4, 5,
8,8a, 9,9a ... electrode, 6,6a ... low antibody, 7 ... probe, 7a, 7b, 7c, 7d ... measurement terminals.
Claims (1)
よって区画された個々の区画上に相対向する電極を形成
し、これに接触する低抗体を設けたチップ抵抗器用基板
において、一方の電極は縦溝を介して隣接する区画と共
通の電極に、他方の電極は逆方向の縦溝を介して隣接す
る区画と共通の電極になっており、横溝を挟んでそれぞ
れ独立していることを特徴とするチップ抵抗器用基板。1. A chip resistor substrate, in which electrodes facing each other are formed on individual partitions defined by vertical grooves and lateral grooves for separation on an insulating substrate, and a low antibody is provided in contact with the electrodes. The electrode is a common electrode with the adjacent section through the vertical groove, the other electrode is the common electrode with the adjacent section through the vertical groove in the opposite direction, and they are independent with the horizontal groove in between. A substrate for a chip resistor.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60041856A JPH0612721B2 (en) | 1985-03-05 | 1985-03-05 | Substrate for chip resistor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP60041856A JPH0612721B2 (en) | 1985-03-05 | 1985-03-05 | Substrate for chip resistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS61201402A JPS61201402A (en) | 1986-09-06 |
| JPH0612721B2 true JPH0612721B2 (en) | 1994-02-16 |
Family
ID=12619887
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP60041856A Expired - Lifetime JPH0612721B2 (en) | 1985-03-05 | 1985-03-05 | Substrate for chip resistor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0612721B2 (en) |
-
1985
- 1985-03-05 JP JP60041856A patent/JPH0612721B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS61201402A (en) | 1986-09-06 |
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