JPH06141202A - White limiter circuit - Google Patents

Abstract

(57) [Abstract] [Purpose] To realize a white limiter having a constant clip level that does not depend on the magnitude of the input signal or the I _S variation. [Structure] The output of the sync tip clamp circuit 3 is connected to the input of the DC level shift circuit 5 and the non-inverting input of the differential amplifier circuit 4, and the same temperature dependence and power supply voltage dependence as the sync tip clamp circuit 3 are provided. The output of the DC voltage source 7 and the output of the DC level shift circuit 5 are compared by the comparator 6, and the higher voltage is used as the inverting input of the differential amplifier circuit 4 to change the output level to the input signal level or I
_S Clip to a fixed value that does not depend on the variation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a white limiter circuit for a video signal used in a magnetic recording / reproducing apparatus, a television apparatus or the like.

[0002]

2. Description of the Related Art In a white limiter circuit, a video signal is amplified by a differential amplifier circuit, and its output is clipped by an upper clipping circuit, so that when an abnormal signal exceeding 100% of white is input, It is widely practiced to limit the level on the side.

FIG. 4 shows a block configuration of a conventional white limiter circuit. In FIG. 4, 1 is an input signal source, 2 is a coupling capacitor, 3 is a sync tip clamp circuit, 4 is a differential amplifier circuit, and 7 is a DC voltage having a temperature-dependent power supply voltage dependency equivalent to that of the sync tip clamp circuit. Source, 8 is the upper clip circuit.

Next, the operation principle of the above conventional example will be described below. By inputting a video signal to the non-inverting input of the differential amplifier circuit 4 and connecting to the inverting input a DC voltage source 7 having temperature dependency and power supply voltage dependency equivalent to the DC voltage of the non-inverting input, the input signal Is amplified in the same phase, and the output of the upper side is limited by the function of the upper clip circuit 8 when an abnormal signal that greatly exceeds 100% of white is input.

FIG. 5 shows a specific example of a conventional white limiter circuit. In FIG. 5, Q1
Q7 is npn transistor, Q8 are pnp transistors, I ₁ ~I ₃ is a constant current _{source, R E, R L, R} X is resistance, V _1,
V ₂ is a constant voltage source. The clip level V _{CL at the} emitter of the pnp transistor Q8 is expressed by the formula 1 when the current amplification factor h _FE is infinite.

[0006]

[Equation 1]

Where k is the Boltzmann constant, q is the amount of charge of electrons, T is the absolute temperature, I _S is the reverse saturation current of the pnp transistor Q8, and I ₈ is the emitter current of Q8.

[0008]

However, in such a conventional method, the clip level V _CL depends on I ₈ , as can be seen from the equation (1). This I ₈ is pn
The peak level in the state where the p-transistor Q8 is not connected is significantly different from the case where the peak level is sufficiently higher than the clip level and the case where the peak level is only slightly higher. Therefore, the clip level changes depending on the size of the input video signal. As a specific numerical value, the difference ΔV _{CL of} V _CL between the case where I ₈ has a certain value and the case where it has a value four times that is assumed to be T is 300 K (Kelvin) is given by Formula 2. .

[0009]

[Equation 2]

Moreover, V _CL itself is a pnp transistor Q.
It is affected by the I _S variation due to the diffusion condition of No. 8.
The present invention has been made in view of the above points, and by combining a DC level shift circuit and a comparator,
It is an object of the present invention to provide a white limiter circuit that realizes an operation equivalent to that of the upper clip circuit and has a constant clip level that does not depend on the magnitude of the input signal and that does not depend on the I _S variation.

[0011]

In order to achieve the above object, the present invention connects an output of a sync tip clamp circuit to a non-inverting input of a differential amplifier circuit, and a reference which is provided via a DC level shift circuit. The voltage and the comparator are compared, and the higher voltage is selected and used as the inverting input of the differential amplifier circuit so that the clip level does not change due to the magnitude of the input signal or the I _S variation.

[0012]

Therefore, according to the present invention, when the input signal level exceeds a certain value by the above means, only the exceeding portion is applied to the inverting input of the differential amplifier circuit,
The output level can be clipped at a certain constant value due to the cancellation effect with the original signal component applied to the non-inverting input. Further, the clip level does not depend on the input signal level or the I _S variation.

[0013]

1 is a block diagram of a white limiter circuit according to an embodiment of the present invention. In FIG. 1, 1 is an input video signal source, 2 is a coupling capacitor, 3 is a sync tip clamp circuit, 4 is a differential amplifier circuit, 5 is a DC level shift circuit, and 6 is one of two inputs having a higher voltage. A comparator 7 for outputting the voltage is a DC voltage source having the same temperature dependency and power supply voltage dependency as the sync tip clamp circuit 3.

FIG. 2 shows a circuit in which the structure shown in FIG. 1 is more specifically realized by using a bipolar transistor. In FIG. 2, 1 to 7 respectively correspond to those in FIG. 1, 9 is a power supply terminal, 10 is a ground terminal, V ₁ is a constant voltage source, I _{1 to} I ₃ are constant current sources, R _E , _RL , R _X is a resistor, and Q1 to Q7 and QA are npn transistors.

Next, the operation of the embodiment will be described. Figure 2
In, the peak value of the input video signal is (v + v _A. However, v is the original standard input peak value, v _A is the excess from the standard input, and R ₁ I ₁ = V _S , (V
+ V _A )> V _S > v (see FIG. 3). During the period when the input video signal level is lower than V _S (corresponding to period A in FIG. 3), Q4 in FIG. 2 is on and QA is off. Therefore, the differential amplifier circuit 4 acts as a differential amplifier circuit having the Q3 base as a non-inverting input and the Q4 base as an inverting input, and its gain G
Is determined by the following equation (3).

[0016]

Equation 3] _{G = R L / (R E} + 2r e) , however [dB], whereas _{= r e (k · T)} / (q · I 1), in the period B of FIG. 3, the Q4 of FIG. 2 Off and QA is on. Therefore, the differential amplifier circuit 4 operates as a differential amplifier circuit having the Q3 base as a non-inverting input and the QA base as an inverting input. In this state, since the same AC signal component is input to the non-inverting input and the inverting input, the signal component is canceled in the B period, and the output is fixed at the constant level V ₀ . V ₀ is determined by the following equation (4). However, G is determined by Equation 3.

[0017]

V ₀ = V _S G From the above, the output level is limited to the formula 4 or less throughout the entire period, and the output level does not fluctuate even when the input level further increases. Moreover, it is not affected by the variation due to I _S. The clip level can be arbitrarily determined by changing R ₁ or I ₁ .

[0018]

As is apparent from the above embodiments, according to the present invention, a white limiter circuit can be realized with an extremely simple structure, and the clip level thereof is not influenced by the size of the input video signal or the I _S variation. It has the effect of being able to do so.

[Brief description of drawings]

FIG. 1 is a block configuration diagram of a white limiter circuit according to an embodiment of the present invention.

FIG. 2 is a circuit diagram in which a white limiter circuit according to an embodiment of the present invention is embodied using bipolar transistors.

FIG. 3 is a timing chart illustrating the circuit operation of FIG.

FIG. 4 is a block configuration diagram of a conventional white limiter circuit.

FIG. 5 is a circuit diagram in which a conventional white limiter circuit is embodied using a bipolar transistor.

[Explanation of symbols]

1 ... Input signal source, 2 ... Coupling capacitor, 3
… Sync tip clamp circuit, 4… Differential amplifier circuit,
5 ... DC level shift circuit, 6 ... Comparator, 7
... DC voltage source, 8 ... Upper clip circuit, 9 ... Power supply terminal, 10 ... Ground terminal.

Claims (1)

[Claims] 1. An input signal source is connected via a capacitor to an input of a circuit (sync tip clamp circuit) for fixing a sync signal tip to a certain DC voltage value, and an output of the sync tip clamp circuit is DC level-shifted. A comparator is connected to the input of the circuit and the non-inverting input of the differential amplifier circuit, and the output of the DC level shift circuit and a DC voltage source having temperature dependency and power source voltage dependency equivalent to those of the sync tip clamp circuit. A white limiter circuit which compares and selects the one with the higher voltage and uses it as the inverting input of the differential amplifier circuit.