JPH06148864A - Phase shift mask and manufacturing method thereof - Google Patents

Phase shift mask and manufacturing method thereof

Info

Publication number
JPH06148864A
JPH06148864A JP29834892A JP29834892A JPH06148864A JP H06148864 A JPH06148864 A JP H06148864A JP 29834892 A JP29834892 A JP 29834892A JP 29834892 A JP29834892 A JP 29834892A JP H06148864 A JPH06148864 A JP H06148864A
Authority
JP
Japan
Prior art keywords
phase shift
film
shifter
shift mask
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP29834892A
Other languages
Japanese (ja)
Other versions
JP2908649B2 (en
Inventor
Shinichiro Tanaka
眞一郎 田中
Shoichi Sakamoto
正一 坂本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Renesas Semiconductor Engineering Corp
Mitsubishi Electric Corp
Original Assignee
Renesas Semiconductor Engineering Corp
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Semiconductor Engineering Corp, Mitsubishi Electric Corp filed Critical Renesas Semiconductor Engineering Corp
Priority to JP29834892A priority Critical patent/JP2908649B2/en
Publication of JPH06148864A publication Critical patent/JPH06148864A/en
Application granted granted Critical
Publication of JP2908649B2 publication Critical patent/JP2908649B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Preparing Plates And Mask In Photomechanical Process (AREA)
  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)

Abstract

PURPOSE:To easily form the phase shift mask having high accuracy by forming shifter films only in the fine pattern parts. CONSTITUTION:An etching stopper layer 2 is formed on a glass substrate y and after the shifter film (for example, SOG) 3 is applied thereon, an electron beam negative type resist 4 is applied thereon. This resist is subjected to electron beam exposing then to developing. The shifter film 3 of the peripheral circuit pattern parts is etched off with these resist patterns as a mask. The resist is then subjected to electron beam exposing then to developing and with such resist patterns as a mask, a semi-transmissive light shielding film 5 is etched; in succession, the shifter films 3 are etched and finally an electron beam positive type resist 6 is peeled. The shifter films of the peripheral circuit pattern parts of the phase shift mask where a transfer margin is not so much requested are removed in such a manner, by which the shifter films 3 are provided only in the fine pattern parts.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、写真製版法に適用さ
れる位相シフトマスクおよびその製造方法に関するもの
である。特に、フォトマスクにおける光が透過する部分
に、光の位相をシフトするシフター膜を形成した位相シ
フトマスクのシフター膜の製造方法に関するものであ
る。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase shift mask applied to a photoengraving method and a manufacturing method thereof. In particular, the present invention relates to a method for manufacturing a shifter film of a phase shift mask in which a shifter film that shifts the phase of light is formed in a portion of a photomask where light is transmitted.

【0002】[0002]

【従来の技術】一般に、この種の位相シフトマスクは、
ガラス基板上に、遮光性金属薄膜のパターンを形成した
フォトマスクにおいて、光が透過する部分に光の位相を
シフトさせるためのシフター膜となる所要のパターン膜
を形成したものである。
2. Description of the Related Art Generally, a phase shift mask of this type is
This is a photomask in which a pattern of a light-shielding metal thin film is formed on a glass substrate, and a required pattern film serving as a shifter film for shifting the phase of light is formed in a portion through which light is transmitted.

【0003】ここで、従来例による位相シフトマスクの
シフター膜の製造方法を図3(a)〜(c)及び図4
(d)、(e)を参照しながら説明する。
Here, a conventional method of manufacturing a shifter film of a phase shift mask will be described with reference to FIGS. 3 (a) to 3 (c) and FIG.
A description will be given with reference to (d) and (e).

【0004】図3(a)に示すように、ガラス基板1上
に、ガラス基板1のエッチングを防ぐために、エッチン
グストッパー層2(例えば、Al32)をスパッタ法に
よって形成する。
As shown in FIG. 3A, an etching stopper layer 2 (for example, Al 3 O 2 ) is formed on the glass substrate 1 by a sputtering method in order to prevent the glass substrate 1 from being etched.

【0005】次に、光の位相をシフトさせるためのシフ
ター膜3(例えば、SOG)を塗布する。その後、半透
過遮光膜5(例えば、透過率15%のCr膜)をスパッ
タ法によって形成し、その上に電子線ポジ型レジスト6
を塗布する。
Next, a shifter film 3 (for example, SOG) for shifting the phase of light is applied. After that, a semi-transmissive light-shielding film 5 (for example, a Cr film having a transmittance of 15%) is formed by a sputtering method, and an electron beam positive resist 6 is formed thereon.
Apply.

【0006】次に、電子線ビーム露光を行い現像する
と、図3(b)に示すように、電子線ポジ型レジスト6
がパターニングされる。
Next, electron beam exposure is carried out and development is carried out, as shown in FIG.
Are patterned.

【0007】そのレジストパターンをマスクとして、図
3(c)に示すように、半透過遮光膜5をエッチングし
て、続いてシフター膜3をエッチングすると、図3
(d)に示すようになる。
Using the resist pattern as a mask, the semi-transmissive light-shielding film 5 is etched, and then the shifter film 3 is etched, as shown in FIG.
As shown in (d).

【0008】最後に、図3(e)に示すように、電子線
ポジレジスト6を剥離する。そうすると、所期通りの位
相シフトマスクを得るのである。
Finally, the electron beam positive resist 6 is peeled off as shown in FIG. Then, the expected phase shift mask is obtained.

【0009】[0009]

【発明が解決しようとする課題】しかしながら、上述し
たような従来の位相シフトマスクでは、マスクパターン
サイズによって光の位相反転によるウエハ転写で得られ
る効果が異なるために、マスクパターンサイズによっ
て、サイジング量の最適化を行う必要があり、メモリセ
ルパターンでは均一なマスクパターンサイズであるが、
周辺回路パターンにおいてはマスクパターンサイズが多
様であるために、露光データ上あるいは露光時にサイジ
ングが同時に行えず、設計データ上でサイジングを行う
必要があるという問題点があった。
However, in the conventional phase shift mask as described above, the effect obtained by wafer transfer by phase inversion of light differs depending on the mask pattern size. Therefore, the sizing amount varies depending on the mask pattern size. It is necessary to perform optimization, and the memory cell pattern has a uniform mask pattern size.
Since the peripheral circuit pattern has various mask pattern sizes, there is a problem in that sizing cannot be performed simultaneously on exposure data or at the time of exposure, and sizing needs to be performed on design data.

【0010】この発明は、前述した問題点を解消するた
めになされたもので、周辺回路パターンのサイジングを
行うことなく、この種の位相シフトマスクおよびその製
造方法を得ることを目的とする。
The present invention has been made in order to solve the above-mentioned problems, and an object thereof is to obtain a phase shift mask of this type and a manufacturing method thereof without sizing the peripheral circuit pattern.

【0011】[0011]

【課題を解決するための手段】この発明の請求項1に係
る位相シフトマスクは、ガラス基板上にパターンが形成
された遮光性金属薄膜、及びこの遮光性金属薄膜を通過
した光の位相を反転させるシフター膜を設けた位相シフ
トマスクにおいて、前記シフター膜は微細パターン部の
みに設けたものである。
According to a first aspect of the present invention, there is provided a phase shift mask in which a light shielding metal thin film having a pattern formed on a glass substrate and a phase of light passing through the light shielding metal thin film are inverted. In the phase shift mask provided with the shifter film, the shifter film is provided only in the fine pattern portion.

【0012】この発明の請求項2に係る位相シフトマス
クの製造方法は、ガラス基板上に遮光性金属薄膜のパタ
ーンを形成すると共に、前記遮光性金属薄膜を通過した
光の位相を反転させるシフター膜を形成する位相シフト
マスクの製造方法において、前記遮光性金属膜及びシフ
ター膜を同時に一度の露光でパターンを形成する際、成
膜したシフター膜を任意に除去する工程を含むものであ
る。
A method of manufacturing a phase shift mask according to a second aspect of the present invention is to form a pattern of a light-shielding metal thin film on a glass substrate and shift the phase of light passing through the light-shielding metal thin film. The method of manufacturing a phase shift mask for forming the step described above includes a step of optionally removing the formed shifter film when the light-shielding metal film and the shifter film are simultaneously formed with a pattern by one exposure.

【0013】[0013]

【作用】この発明においては、半導体素子の構造とし
て、メモリセル部分に比べて、周辺回路パターン部分で
は、高段差ではなく、それほど微細パターンでないため
に、光の位相反転効果によるウエハ転写マージンの拡大
がほとんど必要ないので、その部分のシフター膜は設け
ずに、形成したものである。すなわち、この発明は、ガ
ラス基板上にシフター膜を形成した後、前記周辺回路パ
ターン部分の領域のシフター膜を除去した上、遮光性金
属薄膜およびシフター膜でパターンを形成するものであ
る。従って、シフターパターンを形成する前に、周辺回
路パターン部分の領域のシフター膜を除去した上で、パ
ターンを形成するために、マスクパターン上の前記周辺
回路パターン部分にサイジング処理を行う必要がなく、
マスクを形成し得るのである。
According to the present invention, as the structure of the semiconductor element, the peripheral circuit pattern portion does not have a high step and is not so fine as compared with the memory cell portion. Therefore, the wafer transfer margin is expanded by the phase inversion effect of light. Since it is almost unnecessary, the film was formed without providing the shifter film in that portion. That is, according to the present invention, after forming a shifter film on a glass substrate, the shifter film in the region of the peripheral circuit pattern portion is removed, and then a pattern is formed by a light-shielding metal thin film and a shifter film. Therefore, before forming the shifter pattern, after removing the shifter film in the region of the peripheral circuit pattern portion, in order to form a pattern, it is not necessary to perform a sizing process on the peripheral circuit pattern portion on the mask pattern,
A mask can be formed.

【0014】[0014]

【実施例】実施例1.以下、この発明の実施例1の製造
方法について図1及び図2を参照しながら説明する。図
1(a)〜(c)及び図2(d)〜(g)は、この発明
の実施例1の製造方法の主要な工程を示した位相シフト
マスクの断面図である。
EXAMPLES Example 1. Hereinafter, a manufacturing method according to the first embodiment of the present invention will be described with reference to FIGS. 1A to 1C and 2D to 2G are cross-sectional views of the phase shift mask showing the main steps of the manufacturing method according to the first embodiment of the present invention.

【0015】図1(a)に示すように、ガラス基板1上
に、ガラス基板1のエッチングを防ぐために、エッチン
グストッパー層2(例えば、Al32)をスパッタ法に
より形成する。
As shown in FIG. 1A, an etching stopper layer 2 (for example, Al 3 O 2 ) is formed on the glass substrate 1 by a sputtering method in order to prevent the glass substrate 1 from being etched.

【0016】次に、光の位相をシフトさせるためのシフ
ター膜3(例えば、SOG)を塗布する。その後、電子
線ネガ型レジスト4を塗布する。
Next, a shifter film 3 (for example, SOG) for shifting the phase of light is applied. Then, the electron beam negative resist 4 is applied.

【0017】そして、図1(b)に示すように、電子線
ビーム露光を行い、現像して、そのレジストパターンを
マスクとして、周辺回路パターン部分(例えば、電極)
のシフター膜3をエッチングし、除去すると図1(c)
に示すようになる。
Then, as shown in FIG. 1B, electron beam exposure is carried out, development is performed, and the resist pattern is used as a mask to form a peripheral circuit pattern portion (for example, an electrode).
When the shifter film 3 is etched and removed, FIG.
As shown in.

【0018】次に、図2(d)に示すように、半透過遮
光膜5(例えば、透過率15%のCr膜)をスパッタ法
によって形成し、その上に電子線ポジ型レジスト6を塗
布する。
Next, as shown in FIG. 2D, a semi-transmissive light-shielding film 5 (for example, a Cr film having a transmittance of 15%) is formed by a sputtering method, and an electron beam positive resist 6 is applied thereon. To do.

【0019】次に、電子線ビーム露光を行い、現像する
と、図2(e)に示すように、レジストパターニングさ
れる。
Next, electron beam exposure is performed and development is performed, and resist patterning is performed as shown in FIG.

【0020】そのレジストパターンをマスクとして、半
透過遮光膜5をエッチングし、続いて、シフター膜3を
エッチングすると図2(f)に示すようになり、最後
に、図2(g)に示すように電子線ポジ型レジスト6を
剥離する。
By using the resist pattern as a mask, the semi-transmissive light-shielding film 5 is etched, and then the shifter film 3 is etched, as shown in FIG. 2 (f), and finally, as shown in FIG. 2 (g). Then, the electron beam positive resist 6 is peeled off.

【0021】このように図2(g)に示すような、所期
通りの位相シフトマスクを得ることができるのである。
Thus, the intended phase shift mask as shown in FIG. 2 (g) can be obtained.

【0022】この発明の実施例1は、前述したように、
位相シフトマスクにおいて、それほど転写マージンが要
求されない周辺回路パターン部分のシフター膜は除去
し、微細パターン部分のみ、シフター膜3を設けるもの
である。すなわち、周辺回路について、プロセス要因の
サイジングを露光データ上で均一に、処理を行うことに
より、高精度で微細パターンが容易に形成でき、かつそ
れを用いて転写することで微細パターン形成に有利にな
るという効果を奏する。
The first embodiment of the present invention, as described above,
In the phase shift mask, the shifter film in the peripheral circuit pattern portion where a transfer margin is not required so much is removed, and the shifter film 3 is provided only in the fine pattern portion. That is, for the peripheral circuit, the sizing of the process factor is uniformly processed on the exposure data, whereby the fine pattern can be easily formed with high accuracy, and the transfer using the sizing is advantageous for forming the fine pattern. Has the effect of becoming.

【0023】[0023]

【発明の効果】この発明は、以上説明したとおり、位相
シフトマスクにおいて、微細なパターン部分のみにシフ
ター膜を形成することによって、それほど転写マージン
が要求されない周辺回路について、プロセス要因のサイ
ジングを露光データ上で均一に処理を行うことにより、
高精度な位相シフトマスクが容易に形成でき、かつそれ
を用いて転写することで微細パターンの形成に有利とな
る効果を奏する。
As described above, according to the present invention, in the phase shift mask, the shifter film is formed only on the fine pattern portion, so that the sizing of the process factor can be performed on the peripheral circuit in which the transfer margin is not so required. By uniformly treating the above,
A highly accurate phase shift mask can be easily formed, and transfer using the phase shift mask has an advantageous effect in forming a fine pattern.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明の実施例1による位相シフトマスクの
製造過程の断面を示す図である。
FIG. 1 is a diagram showing a cross section of a manufacturing process of a phase shift mask according to a first embodiment of the present invention.

【図2】この発明の実施例1による位相シフトマスクの
製造過程の断面を示す図である。
FIG. 2 is a diagram showing a cross section in the process of manufacturing the phase shift mask according to the first embodiment of the present invention.

【図3】従来の位相シフトマスクの製造過程の断面を示
す図である。
FIG. 3 is a diagram showing a cross section of a manufacturing process of a conventional phase shift mask.

【図4】従来の位相シフトマスクの製造過程の断面を示
す図である。
FIG. 4 is a diagram showing a cross section of a manufacturing process of a conventional phase shift mask.

【符号の説明】[Explanation of symbols]

1 ガラス基板 2 エッチングストッパー層 3 シフター膜 4 電子線ネガ型レジスト 5 半透過遮光膜 6 電子線ポジ型レジスト 1 Glass Substrate 2 Etching Stopper Layer 3 Shifter Film 4 Electron Beam Negative Resist 5 Semi-transparent Light-shielding Film 6 Electron Beam Positive Resist

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】 ガラス基板上にパターンが形成された遮
光性金属薄膜、及びこの遮光性金属薄膜を通過した光の
位相を反転させるシフター膜を設けた位相シフトマスク
において、前記シフター膜は微細パターン部のみに設け
たことを特徴とする位相シフトマスク。
1. A phase shift mask provided with a light-shielding metal thin film having a pattern formed on a glass substrate and a shifter film for inverting the phase of light passing through the light-shielding metal thin film, wherein the shifter film is a fine pattern. A phase shift mask characterized in that it is provided only in the area.
【請求項2】 ガラス基板上に遮光性金属薄膜のパター
ンを形成すると共に、前記遮光性金属薄膜を通過した光
の位相を反転させるシフター膜を形成する位相シフトマ
スクの製造方法において、前記遮光性金属膜及びシフタ
ー膜を同時に一度の露光でパターンを形成する際、成膜
したシフター膜を任意に除去する工程を含むことを特徴
とする位相シフトマスクの製造方法。
2. A method of manufacturing a phase shift mask, comprising forming a pattern of a light-shielding metal thin film on a glass substrate and forming a shifter film for inverting the phase of light passing through the light-shielding metal thin film. A method of manufacturing a phase shift mask, which comprises a step of optionally removing a formed shifter film when a pattern is formed by exposing the metal film and the shifter film at the same time.
JP29834892A 1992-11-09 1992-11-09 Phase shift mask and method of manufacturing the same Expired - Fee Related JP2908649B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP29834892A JP2908649B2 (en) 1992-11-09 1992-11-09 Phase shift mask and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP29834892A JP2908649B2 (en) 1992-11-09 1992-11-09 Phase shift mask and method of manufacturing the same

Publications (2)

Publication Number Publication Date
JPH06148864A true JPH06148864A (en) 1994-05-27
JP2908649B2 JP2908649B2 (en) 1999-06-21

Family

ID=17858519

Family Applications (1)

Application Number Title Priority Date Filing Date
JP29834892A Expired - Fee Related JP2908649B2 (en) 1992-11-09 1992-11-09 Phase shift mask and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2908649B2 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5641715A (en) * 1994-02-24 1997-06-24 Hitachi, Ltd. Semiconductor IC device fabricating method
KR100882730B1 (en) * 2007-11-06 2009-02-06 주식회사 동부하이텍 Mask manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5641715A (en) * 1994-02-24 1997-06-24 Hitachi, Ltd. Semiconductor IC device fabricating method
KR100882730B1 (en) * 2007-11-06 2009-02-06 주식회사 동부하이텍 Mask manufacturing method

Also Published As

Publication number Publication date
JP2908649B2 (en) 1999-06-21

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