JPH061502Y2 - Monitoring device for crossing control device for single track - Google Patents

Description

[Detailed Description of the Invention] Industrial field of application The present invention relates to a supervisory control device for a single-rail crossing control device,
In particular, it relates to a train detector that monitors whether the train detector is normal or abnormal.

Conventional Technology and Its Deficiencies Conventionally, this type of single-rail crossing control device has three train detectors (hereinafter referred to as detectors) D, as illustrated in FIG.
1, D2, D3 are installed. Of these, detector D1
Is a first detector for alarm start installed at a predetermined distance in the up direction from the level crossing RC to start the level crossing alarm based on the train traveling in the up direction, and the detector D
Reference numeral 2 is a second detector for starting a warning installed at a predetermined distance in the downward direction from the railroad crossing RC in order to start a railroad crossing warning based on a train traveling in the downward direction. Further, the detector D3 is a railroad crossing. Is a third detector that is installed in the vicinity of, and detects the passage of a train through a railroad crossing and stops the railroad crossing warning.

Considering the case where the train travels in the up direction, an alarm is started when the train enters the first detector D1, and the alarm is stopped when the train passes the third detector D3. Eventually, the train passes through the second detector D2. However, at this time, the alarm should not be started.

For that purpose, it is necessary to store the traveling direction of the train and prohibit the alarm based on the train detection by the detector on the side where the train exits (D2 for the up direction, D1 for the down direction). Further, the memory of the traveling direction needs to be canceled when the detector on the side where the train exits has passed.

In order to meet such a demand, the first detector D1 is conventionally used.
Alternatively, when a passage detection signal is input from the second detector D2, in order to store the traveling direction of the train, that is, in order to identify whether the train approaches the railroad crossing or the train that has passed the railroad crossing, FIG. As illustrated, based on the first passage detection signal from the first detector D1, the fact that the train is in one direction, for example, an upward direction, is stored in the upward direction storage circuit FF11 via the gate circuit AND1, and The alarm drive circuit FF21 is set by the stored output of the upward direction storage circuit FF11, the alarm device AB is operated by the set output, and when the train crosses the railroad crossing, an alarm is issued by the train passage detection signal from the third detector D3. The drive circuit FF21 is reset to stop the operation of the alarm device AB.

Then, based on the detection signal from the detector that exits the railroad crossing, that is, the second detector D2, the upward direction storage circuit F
Upward memory of F11 is reset.

Further, based on the detection signal from the second detection device D2, the gate circuit AND
The data is stored in the downstream storage circuit FF12 via 2 and
The alarm drive circuit FF22 is set by the stored output of the downward direction storage circuit FF12, and the alarm device AB is set by the set output.
The alarm drive circuit FF22 is reset by the train passage detection signal from the third detector D3 to stop the operation of the alarm device AB.

Then, based on the detection signal from the detector exiting from the railroad crossing, that is, the first detector D1, the downward direction storage circuit FF.
Resetting 12 down memory.

By the way, for example, in the case of an upward train, when the second detector D2 is abnormal and the train passing through the railroad crossing RC cannot be detected or remains detected, the upward memory circuit FF11 is not reset. , A second detector D for initiating an alarm in the opposite direction, ie in the downward direction
Even after passing 2, the gate circuit AND2 does not set the downward direction storage circuit FF12, so that the alarm device AB does not operate and causes a "no alarm" state.

In order to prevent this, whether or not there is a failure in the second detector D2 and the first detector D1 which are the detectors on the side where the train exits, that is, whether or not the train passing through the railroad crossing RC is normally detected is determined. Need to be monitored.

Detector D for resetting the heading memory of this train
The conventional means for monitoring the failure of 1 and D2 is that the train passes through the third detector D3 and then the second detector D2 (in the case of an upward train) or the first detector D1 (in the case of a downward train). Since the time to reach to is equal to the time to travel in this section at a predetermined speed (the value obtained by dividing the sum of the detection width and the distance between detectors (distance between D2 and D3 in the case of an up train) by the traveling speed), The monitoring times WH1 and WH2 are defined, and the second time is set between the detection time by the third detector D3 and the monitoring time WH1 or WH2.
It is determined whether or not the detectors D1 and D2 have normally detected the train passing through the railroad crossing RC depending on whether or not there is a detection output from the detector D2 or the first detector D1.

The failure monitoring method by the time monitoring from the passage of the third detector D3 is, as illustrated in FIG. 7, an alarm drive circuit FF2.
1, activated by the differential signal of the reset output based on the detection signal from the third detector D3 of FF22, and the monitoring time WH
Abnormality detection monitoring timer T that times up at 1 and WH2
1, T2 are provided, and the detectors D1 and D2 on the train exit side have a monitoring time WH1 from the time when the train crosses the crossing (detection output of D3).
When each passage detection signal is output within WH2,
The monitoring timers T1 and T2 are reset (see the chain line in FIG. 8).

However, when each of the detectors D1 and D2 does not output the passage detection signal within the monitoring time, the monitoring timers T1 and T2 time out and output the abnormality detection signals AN1 and AN2.

Technical Problem to be Solved As described above, the conventional device uses the monitoring timer for detecting the failure of the detector for starting the alarm, but, for example, the train waits for a signal change before the on-site signal, or If the first detector D1 (for the down direction) or the second detector D2 (for the up direction) does not output a passage detection signal for a long time due to an accident, etc. Despite the failure of the devices D1 and D2, the monitoring timers T1 and T2 output the abnormality detection signals AN1 and AN2 (FIG. 8 shows the case of an upward train), causing the maintenance staff to be dispatched deviously. The cause was unavoidable.

The present invention has been made in view of the above points, and an object thereof is to provide a monitoring device for a single-rail crossing control device that can output an abnormality detection signal only when the detector actually fails.

Means for Solving the Problems In order to achieve the above object, the device of the present invention has a monitoring timer (Ta, Tb) and a detection memory circuit (FFa, FFb).
An on-rail detection circuit (a, b) and an AND gate (AND
a, ANDb) and a single-rail crossing control device, wherein the monitoring timer (Ta, Tb) outputs the train detection output of the first detector (D3) installed near the crossing (RC). A second detector that is set by inputting, outputs a time-up output after a predetermined time has elapsed from the time of setting, and is installed at a position apart from the railroad crossing (RC) by a predetermined distance in the direction in which the train passes during the predetermined time. When the train detection output of (D2, D1) is input, it is reset, and the detection storage circuit (FFa, FFb) is set to the monitoring timer (T
a, Tb) the time-up output is input and the time-up state is stored, the train detection output of the second detector (D2, D1) clears the memory, and the on-rail detection circuit (a, b) , The second detector (D2, D
The track circuit (3LT, 6RT) including the rail provided in 1) is provided, and outputs a signal indicating that a train is present when a train is present in the rail, and AND gates (ANDa, ANDb). ) Is a second signal when the time-up state signal of the detection memory circuit (FFa, FFb) and the inverted output of the on-rail detection circuit (a, b) are input.
The detectors (D2, D1) of (1) output a signal indicating that they are in an abnormal state.

Action In the above configuration, even if the train passes the first detector (D3) for a predetermined time, the second detector (D1, D3)
2) when the train does not pass the second detector (D1,
If it exists on the track circuit (3LT, 6RT) including D2), the AND gate (ANDa, ANDb) becomes the second
Does not output an abnormal signal indicating that the detectors (D1, D2) of (2) have a failure.

Embodiment of the Invention Next, an embodiment of the invention will be described with reference to the drawings of FIGS. 1 to 5.

Generally, as illustrated in FIG. 1, a track is provided with a track circuit for each block section in order to perform signal control for detecting the position of a train and instructing the operation of a succeeding train. Train detection relay (hereinafter referred to as detection relay)
An automatic signal device for automatically controlling the traffic signal at the entrance of each block section is provided by using the contact point.

In FIG. 1, 3LT and 6RT are closed sections, upper 6RTR and upper 3LTR are upstream detection relays, lower 3LTR and lower 6RTR are downstream detection relays, S1 to S, respectively.
6 is a traffic light, SC is an automatic signal device near the railroad crossing, and CC is a railroad crossing control device.

A track circuit 3 including a detector D2 (corresponding to the second detector of the present invention) on the side where a train traveling in the upward direction exits the railroad crossing RC.
The detection relay of the track circuit 6RT (lower 6RTR) including the LT detection relay (upper 3LTR) and the detector D1 (corresponding to the second detector of the present invention) on the side where the train traveling in the down direction exits the railroad crossing RC It is provided in the automatic signal device SC near the railroad crossing RC.

This invention is a detector for a train to use for resetting the memory of the train traveling direction, that is, a second detector D2 (in the case of an upward direction) or a first detector D1 on the side of exiting the railroad crossing RC.
When the vehicle is stopped for a long time while straddling (in the down direction), the contact t of the detection relay (upper 3 LTR), (lower 6 RTR) of the track circuit is detected in order to detect this and obtain on-rail information.
The on-rail detection circuits a and b are configured using a and tb.

When the train is in the track circuit 3LT or 6RT, that is, when the train detection relay (upper 3LTR) or (lower 6RTR) is dropped, the contacts ta, tb close the on-rail detection circuits a, b. When outputting the information, when the detectors D1 and D2 for suspending the monitoring by the monitoring timer and resetting the memory of the traveling direction of the train before the train leaves the track circuit output the passage detection signals, respectively. In order to store this, the monitoring circuits A and B are constructed as shown in FIG.

That is, the monitoring circuit A of the second detector D2 for resetting the upward memory has the monitoring timer Ta, the detection memory circuit FFa, and the AND gate ANDa. The monitoring circuit A includes an on-rail detection circuit a including a track circuit 3LT,
b is connected.

The monitoring timer Ta is reset by a train passage detection signal from the third detector D3 for alarm termination, and is cleared by a passage detection signal from the second detector D2.

The detection memory circuit FFa is provided at the subsequent stage of the monitoring timer Ta, is set by the count-up output of the monitoring timer, and is reset by the passage detection signal of the second detector D2.

The on-rail detection circuit a is formed by connecting the inverter circuit Ia to the circuit in which the contact point ta of the track circuit 3LT is inserted.

The AND gate ANDa receives the inverted output of the on-rail detection circuit a and the set output of the storage circuit FFa as inputs.

Further, the monitoring circuit B of the first detector D1 for downward memory reset has a monitoring timer Tb, a detection memory circuit FFb, and an AND gate ANDb. The monitoring circuit B is connected to the on-rail detection circuit b including the track circuit 6RT.

The monitoring timer Tb is set by a train passage detection signal from the third detector D3 for alarm termination, and is cleared by a passage detection signal from the first detector D1.

The detection memory circuit FFb is provided in the subsequent stage of the monitoring timer Tb, is set by the count-up output of the monitoring timer, and is reset by the train passage detection signal of the first detector D1.

The on-rail detection circuit b is formed by connecting the inverter circuit Ib to the circuit in which the contact point tb of the track circuit 6RT is inserted.

The AND gate ANDb receives the inverted output of the on-rail detection circuit a and the set output of the storage circuit FFb.

Considering an upstream train as a representative with the above configuration, when the detector D2 for resetting the upstream memory is normal and the train passing through the railroad crossing RC progresses at the normal speed, As shown in the figure, the monitoring timer T
a is set by the output of the first detector D3 when the train passes through the railroad crossing RC, and the second detector D2 outputs the passage detection signal within the monitoring time WH1 of the monitoring timer Ta.
a is cleared, so the detection memory circuit FFa is not set.

Further, since the detection relay (upper 3LTR) of the track circuit 3LT is dropped when the train crosses the railroad crossing, the on-rail detection circuit a using its contact point ta is turned on, and its inverted output becomes low level via the inverter circuit Ia. After that, the level becomes high when the train leaves the track circuit 3LT.

However, since the detection storage circuit FFa stores that the detector D2 has detected the passage of the train, that is, since it has been reset, the AND gate ANDa does not satisfy the condition, and therefore the abnormality detection signal ANa (of the present invention) (Corresponding to a signal indicating the above state) is not output.

When the second detector D2 is normal and the train passing through the railroad crossing stops for a long time in the state where the train crosses the second detector D2 in the track circuit 3LT before the on-site signal S3,
As shown by the solid line in Fig. 4, the third detector D
After the monitoring timer Ta is set by the passage detection signal from No. 3, the passage detection signal is not output from the second detector D2 within the monitoring time WH1, so the timer expires when the monitoring time WH1 elapses, and the detection storage circuit FFa is set. Further, at this time, since the train is on the track circuit 3LT, the on-rail detection circuit a is turned on, and the inverted output thereof becomes low level, so the AND gate ANDa does not output the abnormality detection signal.

When the train leaves the track circuit 3LT, the second detector D2 outputs a detection signal before the train timer Ta is cleared and the detection memory circuit FFa is reset. The AND gate ANDa does not output the abnormality detection signal even if the inverted output Ia of the on-rail detection circuit becomes high level at the same time as passing through 3LT.

Next, when the second detector D2 is abnormal, and when the train passing through the railroad crossing RC travels at the normal speed, and when the train passing through the railroad crossing RC is the second train in the track circuit 3LT.
In any case of stopping for a long time while straddling the detector D2, even if the train passes the second detector D2, this detector D2 does not output a passage detection signal. As indicated by the chain line in FIG. 4, the monitoring timer Ta has expired when the monitoring time WH1 has elapsed and the detection storage circuit FF
Set a. That is, the detection storage circuit FFa stores that the monitoring timer Ta has timed out. Then, the detection storage circuit FFa is not reset,
That is, the above storage state is maintained without being cleared.

The on-rail detection circuit a, which is turned on when the train crosses the railroad crossing, is turned off when the train exits the track circuit 3LT, and its inverted output Ia becomes high level. Therefore, the AND gate ANDa outputs the abnormality detection signal ANa at the moment when the train leaves the track circuit.

The above has described the operation in the case of the up train, but for the down train, the monitoring timer Tb, the detection memory circuit F
Fb, the on-rail detection circuit b, the inverter circuit Ib, and the AND gate ANDb act in the same manner as in the case of an upward train.

In the above embodiment, the monitoring circuits A and B are provided with the on-rail detection circuits a and b, which are independent of each other, to provide the on-rail information. Therefore, it is necessary to insert each contact point ta and tb into the corresponding monitoring device accurately. However, the error in the insertion position may pose a serious risk to train operation.

By the way, the track circuits in the single-track block section switch the power transmission / reception ends so that power is transmitted from the front side of the train and power is received at the rear side depending on the driving direction.

Therefore, two track circuit detection relays will be provided for each track circuit. As shown in the attached table, the contact state of the relay is shown.
However, when the vehicle is traveling in the down direction, the up relays (upper 3 LTRs) are always set so that the contacts ta and tb are turned on.

Focusing on this point, in another embodiment of the present invention, as shown in FIG. 5, a track circuit 3L including a two-way alarm start point is provided.
The on-line detection circuit ab is configured by connecting the contacts ta and tb of the detection relays of T and 6RT in series, and the inverted output thereof is used as one input of the AND gates ANDa and ANDb via the inverter circuit I.

The output of the on-rail detection circuit ab corresponding to the traveling position of the train and its inverted output are as shown in the attached table, and the track circuit 3LT
Or, the inverting output is turned off while staying at 6RT,
It will be understood that the monitoring by the AND gates ANDa and ANDb is suspended.

With the configuration shown in FIG. 5, it is not necessary to insert the contact points ta and tb of the detection relay in correspondence with the monitoring devices A and B, and simply connect them in series with the inverter circuit I to detect the presence line information. Since it only needs to be input to the gates ANDa and ANDb, there are advantages that the circuit can be mounted extremely easily, the configuration is simplified, and the reliability of detection and monitoring is improved.

Effects of the Invention As described above, in the monitoring device according to the invention, even if the monitoring timer times out, the output of the abnormality detection signal is blocked when the train is in line, so that the detector does not malfunction. Nevertheless, it is possible to prevent the inconvenience that the staff member has to be dispatched.

[Brief description of drawings]

FIG. 1 is a conceptual diagram for explaining the basic technical idea of this invention,
FIG. 2 is a block diagram showing an example of an electrical configuration of a monitoring device that realizes the above basic idea, FIGS. 3 and 4 are time charts for explaining the operation of the configuration, and FIG. FIG. 4 shows the operation when passing at normal speed, and FIG. 4 shows the operation when the train is stopped for a long time. FIG. 5 is a block diagram showing the electrical construction of the preferred embodiment of the present invention. FIG. 6 is a conceptual diagram for explaining the prior art, FIG. 7 is a block diagram showing an example of the same electrical configuration, and FIG. 8 is a time chart for explaining the operation of the same configuration. RC ... Railroad crossing, D1 ... 1st detector (2nd detector), D2 ... 2nd detector (2nd detector), D3 ... 3rd detector (1st detector), 3LT, 6RT ... Track circuit, S1 to S6 ... traffic light, upper 3 LTR, lower 6 RTR ... detection relay, ta, tb ... relay contact, Ta, Tb ... monitoring timer, FFa, FFb ... detection memory circuit, a, b, ab ... presence line detection circuit, Ia, Ib, I ... Inverter circuit, ANDa, ANDb ... AND gate, ANa, ANb ... Abnormality detection signal.

Claims (1)

[Scope of utility model registration request] 1. A monitoring timer (Ta, Tb), a detection memory circuit (FFa, FFb), an on-rail detection circuit (a, b),
A monitoring device for a single-track level crossing control device having an AND gate (ANDa, ANDb), wherein a monitoring timer (Ta, Tb) is a first train detector (D3) installed near the level crossing (RC). It is set by inputting the train detection output, and outputs a time-up after a predetermined time has elapsed from the time of setting, and during the predetermined time, it is installed at a position a predetermined distance away from the railroad crossing (RC) in the direction in which the train passes. When the train detection output of the second train detector (D2, D1) is input, the train detection output is reset, and the detection storage circuit (FFa, FFb) receives the monitoring timer (T
a, Tb) the time-up output is input and the time-up state is stored, the train detection output of the second train detector (D2, D1) clears the memory, and the on-rail detection circuit (a, b) Is the second train detector (D2,
D1) consists of a track circuit (3LT, 6RT) including a rail, and outputs a signal indicating that a train is present when a train is present in the rail, and AND gates (ANDa, ANDb). ) Is a second signal when the time-up state signal of the detection memory circuit (FFa, FFb) and the inverted output of the on-rail detection circuit (a, b) are input.
The train detector (D2, D1) of No. 1 outputs a signal indicating that it is in an abnormal state.