JPH0615871A - Method and apparatus for generating bit map image data for laser beam printer - Google Patents

Abstract

(57) [Abstract] [Purpose] After the bitmap pattern data output from the buffer is stored in the image memory and before being output to the laser beam modulating means, the discontinuity of the bitmap pattern data is corrected. The bit map data stored in the image memory 41 is read line by line for every M columns and stored in an M bit × N bit shift register 44.
The edge detectors 45 and 46 perform differentiation in the line direction and the column direction and extract the contour data. Further, the classification circuits 47 and 48 classify into the form of discontinuous points in the horizontal direction and the vertical direction, and the determination circuit 49 converts the size of the dots to be printed and the printing position into the width of the pulse and the timing to generate the pulse. Width modulation circuit 50
The pulse width is converted into a pulse width and output to the laser beam modulator. As a result, a smooth pattern is printed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention uses a laser beam to generate a laser beam based on data representing a character pattern as a bit map.
Print data suitable for a laser beam printer that performs N-OFF modulation and writes it as a latent image on an electrostatic photoconductor, electrostatically attracts toner to this latent image, and then transfers it to recording paper to print characters and images. Technology for generating

[0002]

2. Description of the Related Art Laser beam printers can print characters and images with extremely high resolution by increasing the accuracy of laser beam modulation. For this purpose, it is necessary to configure the image data to be printed with a high density bit map pattern. In order to output the character data of such a high density bitmap pattern, not only is it troublesome to create the data, but also a storage means for storing this requires a large capacity. ,
There is a problem that the cost of the device increases.

In order to solve such a problem, US Pat. No. 4,847,641 discloses that character pattern data corresponding to a character code output from a host device or the like is stored in a first-in / first-out memory for printing. The dot at the specified position and multiple dots around it are sampled from this first-in / first-out memory and compared with the pattern data for comparison such as a large number of templates prepared in advance and matching bitmap data. To do. If the sampled bit map pattern matches the pattern data for comparison, replace it with the correction dot pattern assigned to this pattern data for comparison, and output this as the data for printing. It is disclosed.

According to this technique, since the bit map pattern data output from the character generator can be modified at any time during printing, a character pattern having a smooth contour can be printed without increasing the storage capacity of the character data storage means. You can

[0005]

However, since the bit map pattern stored in the first-in first-out memory itself is the object of pattern matching, the number of data to be subjected to pattern matching becomes extremely large. A large-scale arithmetic circuit is required to finish the pattern matching calculation within the time for printing 1 dot.

The present invention has been made in view of such a problem, and an object of the present invention is to reduce the data used for calculation when correcting a dot to be printed as much as possible. Another object of the present invention is to propose a new bit map image data generation method for a laser beam printer, which can speed up the calculation.

Another object of the present invention is to provide an apparatus for generating the bitmap image data.

[0008]

In order to solve such a problem, according to the present invention, a step of converting coded data output from an external device into bit map data and storing a plurality of lines in a memory, , A bit of the memory
A step of digitally differentiating the map data for M columns × 1 line in the horizontal direction and the vertical direction to obtain contour data in the horizontal direction and contour data in the vertical direction, and a current print target based on the contour data. And the step of determining the positional relationship between the dot data that is being printed and the surrounding dot data that is not to be printed, and converting the dot data that is to be printed into dots of a predetermined size based on the result of the determination. And outputting as print data.

[0009]

The bit map data stored in the memory is read every M columns × 1 line to obtain M columns × N.
While being stored in the line shift register, they are subjected to differentiation in the vertical direction and the horizontal direction and extracted as data of only the contour portion. As a result, dots that clearly form a continuous portion are excluded from the data, and the amount of data to be calculated in the subsequent steps is extremely small. The data representing the contour portion is used as the discontinuous point classification data in the horizontal direction and the vertical direction. The discontinuity point classification data is used to determine the relationship between the target point that is currently printed and the surrounding dots, that is, whether it is a continuous relationship or a discontinuous relationship. If the dot to be printed is used and is related to the discontinuity, it is replaced with a dot of a size smaller than the regular dot that is predetermined according to the shape of the discontinuity, or is blank. In case of copy, dots are generated.

[0010]

The details of the present invention will be described below with reference to the illustrated embodiments.

FIG. 1 shows the configuration of an example of a laser beam printer, in which the photosensitive drum 1 is
A photoconductive material layer is formed on the surface of a drum driven by a motor in a direction indicated by an arrow A in the figure.
Before receiving the writing of print data, the photosensitive drum 1
The toner remaining on the surface is removed by the rubber blade 2, and the remaining charges are discharged and removed by uniform light irradiation from the erase lamp 3. After cleaning, the photoconductor drum 1 is charged with a constant surface potential by receiving the charge generation means, for example, the ions generated by the corona discharge unit 4. Upon completion of such preparation, the photosensitive drum 1 is irradiated with the laser beam from the laser beam generating means 5 and data is written in the selected area.

The laser beam supplies the electric power supplied to make the laser diode 6 emit light as shown in FIG.
It is modulated by matching the data to be printed and turning it on and off. The laser beam 7 from the laser diode 6 is collimated by the collimator lens 8 and then focused on the scanning mirror 9. The scanning mirror 9 is a regular polygonal mirror fixed to the rotating shaft of the motor 10, and the scanning mirror 9 is rotated by the motor 10 which rotates in the direction indicated by reference symbol B in the figure.
The laser beam is moved in the horizontal direction to scan the surface of the photosensitive drum 1 in the horizontal direction.

Since the photosensitive drum 1 also rotates in the direction of arrow D while the laser beam scans the length of the photosensitive drum 1, the entire surface of the photosensitive drum 1 is covered with the raster image. become. Since the rotation speeds of the motor 10 for driving the scanning mirror 9 and the motor for driving the photosensitive drum 1 are set to be synchronized with each other, the laser beam is scanned at a predetermined interval, for example, 1/300. It is offset by shifting in inches in the circumferential direction. The laser diode 6 outputs a required resolution, for example, a resolution required to form correction data while advancing the surface of the photosensitive drum 1 by 1 inch (24.5 mm), for example, a character generator. 1/30 dot
When printing at 0 inch, the laser beam travels 1 inch to correct at 4 times the resolution.
It is designed to receive 0 times of ON-OFF. As a result, the photoconductor drum as a whole has a circumferential direction of substantially 300.
It is possible to realize a resolution of dot / inch × horizontal direction 1200 dot / inch.

When the writing with the laser beam is completed in this way, the portion not irradiated with the laser beam still maintains a high negative voltage, and the irradiated portion discharges the charged particles and becomes negative. Raise to a lower voltage.

In the developing unit 11, based on the potential difference on the surface of the photosensitive drum, the toner is slid only by the toner sleeve 12 only on the written portion to selectively adsorb the toner, and the latent image is converted into a toner image. Convert.

The transfer unit 13 transfers the toner image on the surface of the photosensitive drum onto a recording sheet. The recording paper is
While being in contact with the photosensitive drum 1, the photosensitive drum 1 is conveyed at the same speed as the peripheral speed of the photosensitive drum 1, and the toner of the photosensitive drum 1 is attracted by the electric field applied from the back surface of the recording paper and adsorbed on the front surface. The photosensitive drum 1 is further rotated as it is, and undergoes the above-mentioned cleaning process to prepare for forming the next electrostatic image. In the thermal fixing unit 14, the toner image transferred onto the recording paper is melted by heat and fixed to the recording paper. The heat fixing unit 14 is configured by incorporating a heater 16 in a roller 15, and heats the toner image on the recording paper while applying pressure to melt the toner particles and fuse them to the recording paper. .

FIG. 3 shows an embodiment of a control device for controlling all the operations of the printing process. The dot pattern data is corrected in accordance with the print data and a mechanism such as a light control device or a photosensitive drum is provided. Control the behavior of. The control device is a microcomputer including a central processing unit (CPU) 20, a RAM 21 constituting a main storage device and an external storage device, and a ROM 22 storing a program for controlling the operation.
A character generator 28 having a built-in font storage means for storing character set data for converting print data into a dot pattern or bitmap image, and image data directly input as a bitmap pattern and bits from the character generator 28. A buffer 23 for storing map data is provided.

The central processing unit 20 is supplied with the clock signal from the clock signal generating circuit 24. Coded data output from an external device 25 such as a personal computer is taken into a bus 27 via an interface circuit 26, processed by a printer control command, and a character generator 28 is used to modulate a laser beam. It is converted into bit map data and stored in the buffer 23. As will be described later, the bit map data is corrected in size and position by a bit map data generation circuit 29 according to the relationship with other dots positioned in the horizontal and vertical directions of the dot to be printed. Laser beam modulator 17
Is output to. Further, the central processing unit 20 controls the photosensitive drum 1 via the bit shift circuit 30 and the address control circuit 31 to control the rotation of the photosensitive drum 1 so as to be suitable for writing data.

The above-mentioned bit map data generating circuit 29
Is output from the character generator 28 in FIG.
The bit map data as shown in (4) is corrected to a smooth pattern, and is connected between the character generator 28 and the laser beam modulating means 17.

When the buffer 23 outputs a character "$" composed of a combination of a curved line and a slanted line as shown in FIG. 4, the bit map data generating circuit 29 outputs a step portion of the character, for example, in the figure. A small dot F ′ (FIG. 29) is added to the blank portion F forming the area surrounded by the circle E, or a part of the dot G forming the step portion is deleted (G ′ in FIG. 29). ), And the dots R constituting the step of the area surrounded by the ellipse of reference numeral K in the figure are replaced with small dots R ′ (FIG. 29) and output. The coded signal designating the character "$" output from an external device such as a personal computer is used to read the data for generating the bit map pattern corresponding to this coded signal from the font storage means. It is converted into the bitmap data shown in FIG. 4 by the generator 28 and stored in the buffer 23.

When the bit map data output from the buffer 23 is directly output to the laser beam modulating means 17 without any modification, the step due to the position change in the normal bit size is printed as it is, as described above. , The printed pattern will lack smoothness. In other words, the buffer 23 stores a pattern formed by using only regular-sized dots for the purpose of reducing its storage capacity as much as possible. Can't be small. For this reason, in the case of representing a slanted line or a curved line by dots, it is unavoidable that the dots are projected to the left, right, up and down in units of one dot, or depressed.

FIG. 5 shows an embodiment of the bit map data generating circuit indicated by reference numeral 29 in FIG.

The bit pattern data in the serial signal format output from the character generator 28 is the flip-flop F. When the shift register configured by F for shifting data in the line direction shifts in the line direction bit by bit and the data of M column 1 line sentence is accumulated in the flip-flop 40, it is configured by a static random access memory or the like. It is stored in the image data storage means 41. The storage of such data is performed by the address signal generating means 42 and the writing / reading control means 43 which operate on the basis of the horizontal synchronizing signal from the detector which detects the scanning start point of the laser beam. When the data for a plurality of lines, that is, for five lines in this embodiment, are stored in the image data storage means 41, the address signal generation means 42 and the writing / reading control means 43 match the printing timing for each dot. Then, the data is read from the image data storage means 41 for each one line of M columns and sequentially output to the shift register 44 of M columns × N lines. The next 1-bit signal output in the serial signal format is stored in the image data storage means 41 when the data for one line of M columns is accumulated in the flip-flop 40. The data stored in the shift register 44 corresponds to the timing of writing and reading by the address signal generating means 42 and the write / read control means 43, and the first edge detecting means 4
5, and the second edge detecting means 46 digitally differentiates in the horizontal direction and the vertical direction to extract the data of the contour portion.

Digitally differentiating in the horizontal direction means, for example, data in which dots are continuous from the 3rd bit to the 7th bit as shown in FIG. 6, as viewed from the left end (printing start side). In this case, as shown in FIG. 7, the signal "1" is placed at the position (third bit) where the dot exists next to the blank part.
If there is a blank part next to the dot, it means that the signal "1" is generated at the position (the 7th bit) where the dot was present at the end.

In the vertical direction, as shown in FIG. 8, an example of a pattern in which the 2nd bit to the 6th bit in the Y-axis direction are continuous, as shown in FIG. The signal "1" at the position (x = 2, y = 6) next to the dot, and the signal "1" at the position (x = 2, y = 2) next to the dot. It means to generate.

When the bitmap data of the character "$" shown in FIG. 4 is differentiated by such a method, the data about the rising edge in the horizontal direction becomes as shown by the black circles in FIG. 10, and the rising edge in the horizontal direction is shown. The data for the falling edge is shown as a black circle in FIG. 11, the vertical rising edge is shown as a black circle in FIG. 12, and the vertical falling edge is shown as a black circle in FIG. It becomes like

The rising edge data and the falling edge data obtained by differentiating the bitmap data in the horizontal direction are as follows:
The vertical characteristics of the bitmap data are represented, and the rising and falling edge data obtained by differentiating in the vertical direction represent the horizontal characteristics of the bitmap data.

When the correlation between the rising edge and falling edge in the horizontal direction and the rising edge and falling edge in the vertical direction obtained from the bit map data of the original pattern in this manner and the original pattern are examined. , What relationship the dots to be printed form with respect to the surrounding dots, that is, one of the dots that are continuous in the horizontal direction or the vertical direction, or form a discontinuous portion It can be determined whether it is a dot.

That is, these horizontal rising, falling, vertical rising, and falling data are centered around the data at the point of interest, that is, the position to be printed, and M columns by N lines are arranged around it. Buffer 23 by sampling only, and using the first and second classifying means 47, 48 composed of logic means such as a gate array to classify and judge into a plurality of types of formats.
It is possible to know the shape of the boundary portion of the bitmap data from.

FIGS. 14 to 19 show that the original pattern is sampled by a sampling window of size 3 columns × 3 lines, and the data of the edge portion obtained by differentiating this sampling data is classified by logical judgment.
This shows the relationship with the data from the character generator, and there are many that may be included in the original pattern (about 6
It is possible to classify 100 types of boundary patterns into extremely small groups (about 150 types). In the figure, black circles indicate places where dots exist, white circles indicate places where dots do not exist, and gray circles indicate places where dots may or may not exist.

That is, the data differentiated in the horizontal direction is
Pay attention to the pattern in the upper area that includes the point of interest and attach a classification symbol of A0 to A4 to the shape, and focus on the pattern of the lower area that includes the point of attention to attach a classification symbol of B0 to B4 to the shape. 14 and FIG. 15 are obtained by classifying the original patterns by using these classification symbols. Further, the rising edge obtained by differentiating the original pattern in the vertical direction is a pattern of classifications E0 to E4 in the shape of the pattern on the right side area including the point of interest, and a left side area including the point of interest. 16 and 17 when the original patterns are classified by these classification symbols by paying attention to the pattern No. and classifying the shapes with classification symbols F0 to F4.

Further, the rising edge data obtained by differentiating the original pattern in the vertical direction is focused on the pattern in the area on the right side of the dot one dot below the target point, and its shape is G0.
When classifying the classification symbols of O to G4 and the pattern of the area on the left side one dot below the point of interest, the shapes are classified by the classification symbols of H0 to H4, and the original pattern is classified by these classification symbols. , FIG. 18 and FIG.

In this way, the results obtained by determining the shape by the classifying means 47, 48, that is, A0 to A4, B0
To B4, D4, E0-E4, F0-F4, G0-G4, H0-
H4 is used by the determination means 49 to determine which form the data of the point of interest belongs to, that is, which group of the patterns classified in FIGS.

Although the rising edge has been described above, the same processing is performed for the falling edge.

The judging means 49 is the first and second classifying means 4
Based on the data from Nos. 7 and 48, it is determined which data among the data shown in FIGS.

The result determined by the determining means 49 is used by the pulse modulating means 50 to generate data having different pulse widths as shown in FIGS. That is, one-fourth the size of one regular dot of the bitmap data output from the buffer 23 is set as the unit size, and dots of this unit size are displaced by 1/4 dot (see FIG. 20). 60, 61, 62,
63), which is three times the unit size and whose position is shifted by 1/4 dot, that is, the right side of the regular size dot is cut by 1/4 dot or the left side is cut (64, 65 in FIG. 21). ), Which is four times the unit size, that is, a regular dot (FIG. 22), which is a 5/4 dot projecting toward the printing start side (that is, the left side in the figure) by the unit size from the regular dot (66 in FIG. 23), And 5/4 dots (67 in FIG. 23) projected to the right in the figure by a unit size larger than the regular dot are converted into printing data.

By the way, the shift register 44 constitutes a sampling window of 3 columns × 3 lines as shown in FIG. 24A, and the data of the point of interest is at the center position R0 and the line including the point of interest. The data one line before is stored in R1 to R3, the data on the same line before and after the attention point is stored in R4 and R5, and the data one line after the attention point is stored in R6 to R8, and the data R9 to R16. Auxiliary data for calculating the data of the boundary portion at the time of vertical differentiation, and data R17 to R20 at the time of horizontal differentiation are stored. That is, regions R9 to R12
Area R17, R1 to R3, R of the (n-2) th line
A region (R4, R0, R5, R2) of the (n-1) th line is shown at
1 is the nth line, regions R19, R6 to R8, R20 are the (n + 1) th line, and regions R13 to R16 are the (n +) th line.
2) Line data is stored, data in the same column is input from the right side in the figure for 5 lines per column, and the lines are shifted to the left side in the figure by 5 lines per column.

Therefore, for example, taking the bitmap pattern shown in FIG. 4 as an example, when the blank portion F in the area indicated by reference numeral E in the drawing is the print target (point of interest), determination is made. Without doing so, the determination is made when the dot H that forms the next rising edge is stored at the point of interest R0 of the shift register 44. That is, the determination is made when the data shown in FIG. 25 (I) is stored in the shift register 44. Along with this, the first edge detecting means 45 outputs edge data as shown in FIG. The classification means 47 uses this edge data (see FIG. 2).
5) II) is divided into an above-described method, that is, an upper pattern including the attention point R0 and a lower pattern including the attention point R0, and the determination is performed. The former pattern is A2 and the latter pattern is B1 (FIG. 15). ). As a result, the point of interest R0 currently stored in the shift register 44 is determined to be a dot forming the pattern of the group surrounded by the dotted line block in FIG. As a result, it is determined that it is necessary to add 1/4 dot to the position one position before the point of interest R0, that is, the blank portion F, and FIG.
The printing of the dots as shown in FIG. 23, that is, the dots (FIG. 23) (FIG. 25III) longer to the left by ¼ dot than the regular dot is instructed. It should be noted that these calculation results are output at a stage in which at least 1/4 dot is printed from the time when printing is actually started, so that the irradiation point of the laser beam exists in the blank portion F. There is.

As a result, the laser beam irradiates the blank area F by 3 /
By starting the printing of dots at the time when four passes, the pattern in which ¼ dot is added to the blank portion F as shown by reference numeral 66 is substantially printed. That is, F ′ shown in FIG. 29 is printed.

When G in the circle indicated by the symbol E in FIG. 4 becomes the point of interest Q0, the shift register 44 stores the pattern as shown in FIG. Outputs the data as shown in FIG. The classifying means 47 classifies the upper pattern including the point of interest Q0 into A3 and the lower pattern into B2. As a result, the pattern containing the point of interest Q0, which is now stored in the shift register 44, is classified as A3 and B2 (the pattern surrounded by the block indicated by the chain line in FIG. 15). The determination means 49 outputs a signal for printing a dot (dot shown by reference numeral 65 in FIG. 21) (FIG. 26III) obtained by deleting 1/4 dot on the left side of the regular dot. After this calculation result is output, the laser beam is focused on Q0
When the laser beam further moves to the right by ¼ dot from the time point when the value reaches, the printing of the dot obtained by the calculation result is started, and the pattern shown as G ′ in FIG. 29 is printed. As a result, the blank portion F forming the stepped portion indicated by E in FIG.
It is formed by dots that increase in order of / 4 dots and 3/4 dots, and is converted into a smooth pattern.

Dots are also corrected for a line extending in the horizontal direction by the same process. That is, in the step portion indicated by the ellipse K in FIG.
When stored in the shift register 44 as 0, FIG.
Since the data shown as (I) is stored, the data differentiated in the vertical direction from the edge detecting means 48 (FIG. 11).
To use. The classifying means 48 classifies the pattern on the right side including the point of interest Q0 into E1 and the pattern on the left side into F2 (a pattern surrounded by a block shown by a dotted line in FIG. 16). The judging means 49 outputs a signal for printing a dot (FIG. 27III) in which the right side of the regular dot is deleted by 1/4 dot. When the laser beam reaches the point of interest Q0 after the output of this calculation result, the laser beam is turned on until the laser beam moves to the right by 3/4 dot, and the pattern shown as R'in FIG. 29 is printed. .

Further, when the blank portion L surrounded by the symbol K in FIG. 4 becomes the point of interest Q0, the pattern shown in FIG. 28 (I) is stored in the shift register 44, and the edge detecting means 46 produces a vertical differential pattern. The edge data as shown in FIG. II is output. The classification means 48 determines the point of interest Q0.
The area on the right side of the pattern one dot below is classified as G1, and the pattern on the left side is classified as H2 (block surrounded by a dotted line in FIG. 18). Based on this classification result, the determination means 49 outputs the dot indicated by reference numeral 61 in FIG. 20, and prints the dot indicated by L ′ in FIG. 29 on the blank portion L.

Hereinafter, as described above, the dot array in the sampling area is classified based on the differential data in the horizontal and vertical directions of the original pattern, and it is determined from this classification result that the point of interest corresponds to the edge portion. In this case, a dot smaller than the regular dot is added to the white space adjacent to the left and right direction, or the dot at the point of interest is corrected to a small dot that is partially deleted. Then, when the edge portion exists, an operation of adding a dot smaller than the regular dot is performed.

By the way, in FIG. 29, the dots are shown in a rectangular shape in order to facilitate understanding of the explanation. However, at the stage of being printed on the recording paper, the spread or blurring of the laser beam and each dot on the photosensitive drum are shown. Due to the electrostatic induction of 1 and the size of the toner particles, the small dots are drawn and fused with the regular dots existing in the surroundings, resulting in a smooth shape. As a result, the stepped portion generated by the size of the regular dot is filled with the small dot, and becomes a smooth rising or falling portion.

As described above, in the present invention, the data of the contour portion obtained by differentiating the data of the original pattern is used as the index data to detect the portion which needs to be corrected. Pattern can be classified into about 150, and not only the circuit configuration can be simplified, but also calculation can be performed by software within the period of printing one dot, and only hardware is required. Instead, the device can be configured by software.

Next, an embodiment of each means for performing the above-mentioned processing will be described with reference to the timing chart shown in FIG.

FIG. 31 shows an embodiment of the image data storage means for storing the data in the serial signal format outputted from the buffer 23.

Flip-flops 70, 71, 72, 7
3, 74, and 75 are buffers 2 input to the input terminal 76.
Video signal in serial signal format from 3 (VIDEO)
To the video clock signal (VCL
K), a horizontal shift register 83 for sequentially shifting in the line direction (the main scanning direction if schematically expressed).
Are configured. The output from the shift register 83 is 3
It is stored in the image memory 78 configured by a static random access memory or the like via the state circuit 77. The memory 78 synchronizes the horizontal synchronization signal (HSYNC) input from the input terminal 79 at the start of laser beam scanning, the address generation circuit 81 receiving the video clock (VCLK) input from the input terminal 80, and the horizontal synchronization signal (HSYNC). Under the control of the control circuit 82 for converting the stored data into the output terminal 8 during the video clock of 5 cycles.
It is configured to output 5 lines of 6 columns from 4 to 89 and store a signal of 6 lines of 1 line from the shift register 83 during one cycle of the video clock.

That is, as schematically shown in FIG. 32 according to the printing form, the memory 78 has the Nth line, the (N + 1) th line, the (N + 2) th line, the (N + 3) th line, and And data forming the (N + 4) th line are stored. In this state, in synchronization with the video clock, the data 90 of the 6th column of the Nth line is read out as a parallel signal format in the period of the video clock of one cycle, and in the period of the video clock of the next cycle of the + 1st line. The data 91 of 6 columns is read out, and the data 92, 93, and 94 are similarly read out. During this time, the data 95 of the 6th column of the (N + 5) th line stored in the shift register 83 is stored in the memory 78 during the period of one cycle of the video clock. As a result, the data 90 in the 6th column of the Nth line is lost from the memory 78. After that, the data for 6 columns from the Nth line to the N + 4th line is read out,
The operation of storing 6 columns of +5 lines is repeated.

FIG. 33 shows an embodiment of the shift register 44 constituting the above-mentioned sampling window. The output terminal 84 of the image memory 78 shown in FIG. 31 has D-type flip-flops 1001, 1011, 1021, 103.
1, 1041 in parallel, and the output terminal 85 of the memory 78 has D-type flip-flops 1002, 1012, 1022, 1032, 1042 having selectors on the data input terminals.
In parallel, the output terminal 86 of the memory 78 has a D-type flip-flop 1003 having a selector at the data input terminal,
1013, 1023, 1033, 1043 in parallel, and the output terminal 87 of the memory 78 has D-type flip-flops 1004, 1014, 1 with a selector at the data input terminal.
024, 1034, and 1044 in parallel, and the output terminal 88 of the memory 78 has D-type flip-flops 1005, 1015, 1025, and 10 with data input terminals having selectors.
35 and 1045 in parallel, the output terminal 89 of the memory 78 is a D-type flip-flop 1006, 1016, 1026, 1036, 104 having a selector at the data input terminal.
6 are connected in parallel and the shift clock (SH
IFT CK) is supplied. D-type flip-flops 1001, 1011, 1021, 1031, 1041
The shift clocks are selectively connected as described below.

The data of 6 columns of the Nth line output from the image memory 78 are simultaneously stored in the flip-flops 1001 to 1006, and the 6th of the N + 1th line output from the memory 78 in the next video clock cycle.
The data for the columns is flip-flops 1011 to 1010.
16 simultaneously stored. At this time, 6 of the Nth line
The data for the columns are flip-flops 1002 to 100.
It has shifted to 26. Further, the data for 6 columns of the (N + 2) th line output from the memory 78 in the next video clock cycle are flip-flops 1021 to 1
It is stored in 026 at the same time. At this time, the data of 6 columns of the Nth line is stored in the flip-flops 1003 to 1001.
The data for 6 columns of the (N + 1) th line are shifted to 008 and flip-flops 1012 to 1017.
Have shifted to. Similarly, when the data of 6 columns of the (N + 3) th line and the data of the (N + 4) th line are stored in the flip-flops, the data of the N-th line is stored in the flip-flops 1005 to 1010, and the data of the (N + 1) th line is stored in the flip-flop 1041. Through 1019, the Nth
The data of the +2 line is 1023 to 1028, the N + th line
Three lines of data are flip-flops 1032 to 10
37, the data of the (N + 4) th line is the flip-flop 1
It is stored in 041 to 1046. Further, at the timing of the next video clock, the data on the Nth line is flip-flops 1006 to 1010 and 100, the data on the N + 1th line is flip-flops 1015 to 1019 and 104, and the data on the N + 2th line is flip-flop 1024 to 1024. 1028 and 109
In addition, the data of the N + 3th line is the flip-flop 103
3 to 1037 and 113, the data of the (N + 4) th line is stored in the flip-flops 1042 to 1046 and 118.

That is, the data for 5 lines per column is flip-flops 100, 104, 109, 113, 1
It means that it has been shifted to 18. The video data stored in the shift register 83 during this timing is stored in the image memory 78. Further, at the timing of the next video clock, data for 6 columns of the Nth line are simultaneously stored in the flip-flops 1001 to 1006. At this time, the data for 5 lines per column is shifted to the flip-flops 101, 105, 110, 114, 119.

By repeating the above operation, the data for 5 lines per column shifts the flip-flop.

By the connection described above, reference numeral 122 in the figure
The flip-flops 101, 102, 103, 105, 106, 10 surrounded by the dotted line blocks indicated by
7, 110, 111, 112, 114, 115, 11
6, 119, 120 and 121 form a window for detecting an edge when viewed from the vertical direction.

Further, the flip-flops 104 to 117 surrounded by the block denoted by reference numeral 123 in the figure form a window for detecting an edge when viewed from the horizontal direction. Then, the flip-flop 111 located at the center of both blocks stores the data of the point of interest. Note that the flip-flops 100 and 118 do not contribute to edge detection, but are connected for the timing of shifting data.

As a result, the flip-flop 111 for storing the data of the point of interest updates the data of the line to be printed one bit at a time, every time 1-bit data is output from the buffer. . Although the video signal 76 has been described above in the serial signal format, it may be in the parallel signal format by changing the shift register 83.

34 and 35 show one embodiment of the first edge detecting means 45, and FIG. 34 shows a portion where the blank portion is switched to the dot existing portion when viewed from the left side in the horizontal direction. FIG. 35 shows an edge rising portion detecting circuit for detecting, and FIG. 35 shows an edge falling portion detecting circuit for detecting a portion where the dot existing portion is switched to the blank portion when viewed from the left side in the horizontal direction.

The rising portion detection circuit shown in FIG. 34 has inverters 160 to 166 and AND gates 170 to 1.
A signal from the flip-flop of the shift register shown in FIG. 33 is provided to one input terminal of the AND gates 170 to 176 through the inverters 160 to 166, and the other terminal of the AND gates 170 to 176. Is configured to enter.

Since the input signal via the inverter is a signal one dot before the signal directly input, when the signal "0" is one column before and the signal "1" is next column. , The signal “0” is input to the terminal 138, this signal is converted to the signal “1” by the inverter 160, and the signal “1” is input from the terminal 137. As a result, the signal is output from the AND gate 170. "1" is output, and the rising signal "1" is output from the output terminal 180.

The falling edge detection circuit shown in FIG. 35 includes inverters 200 to 206 and AND gates 210 to 21.
6 and is configured so that a signal from the shift register shown in FIG. 33 is input directly to one input terminal of the AND gates 210 to 216 and to the other input terminal via the inverters 200 to 206. ing. Since the signal directly input to the AND gate 210 is a signal one column before the signal input via the inverter 200, the signal one column before in time is "1" and the signal in the next column is " In the case of 0 ”, the signal“ 1 ”is input to the terminal 137, the signal“ 0 ”is input to the terminal 136, and this signal is converted into the signal“ 1 ”by the inverter 200. The AND gate 210 outputs the signal “1” and the output terminal 220 outputs the falling signal “1”.

FIGS. 36 and 37 each show an embodiment of the second edge detecting means 46. FIG. 36 shows a portion where a blank portion changes to a dot existing portion when viewed from above in the vertical direction. FIG. 37 shows an edge rising edge detecting circuit for detecting, and FIG. 37 shows a falling edge detecting circuit for detecting a portion where a dot existing portion changes to a blank portion when viewed from above in the vertical direction.

The rising edge detecting circuit shown in FIG. 36 has inverters 230 to 238 and AND gates 240 to 24.
8 and one of the input terminals of AND gates 240 to 248 is connected via inverters 230 to 238.
The signal from the shift register shown in FIG. 3 is input, and the signal from the shift register is directly input to the other input terminals of the AND gates 240 to 248.

Since the input signal via the inverter is a signal one line before the signal directly input, the signal one line before in time is "0" and the signal in the next line is "1". In this case, the signal “0” is input to the terminal 133, converted into the signal “1” by the inverter 230 and output to the AND gate 240, and the signal “1” input to the terminal 137 is directly input to the AND gate 240. As a result, the AND gate 240 outputs the signal "1" and the output terminal 250 outputs the rising signal "1".

The falling edge detection circuit shown in FIG. 37 has inverters 260 to 268 and AND gates 270 to 27.
8 and inputs signals from the shift register directly to one input terminals of the AND gates 270 to 276, and to the other input terminals of the AND gates 270 to 278 from the shift register via the inverters 260 to 268. The signal is configured to be input.

Since the direct input signal is a signal one line before the signal input via the inverter 260, the signal one line before in time is "1" and the signal in the next line is "0". In this case, the signal “1” is input to the terminal 137 and is output to the AND gate 270 as it is, and the signal “0” input to the terminal 142 is converted to the signal “1” by the inverter 260 and the AND gate 270 is output. Since it is output to 270, as a result, the signal "1" is output from the AND gate 270.
Is output, and the falling signal “1” is output from the output terminal 280.

38 and 39, the classification means 4 for judging the type of step portion of a line extending in the vertical direction, respectively.
38 shows the embodiment of FIG. 7, in which FIG. 38 is in charge of the step portion on the rising side, and FIG. 39 is in charge of the classification of the step portion on the falling side.

The rising edge classification circuit shown in FIG.
The input terminals 180 to 186 are the output terminals 180 to 18 of the horizontal rising edge detecting circuit shown in FIG.
The same number is assigned so as to be associated with 6. This circuit includes inverters 290, 291 and an AND gate 2.
93 to 301, OR gates 303 and 304, and NOR gates 305, 306, and 308, and IF X = 0 THEN correction amount = 0 based on the rising portion data obtained by differentiating the original pattern in the horizontal direction. IF D0 = 0 AND D1 = 0 AND D2 = 0 THEN correction amount = 0 IF D8 = 0 AND D9 = 0 AND D10 = 0 THEN correction amount = 0 IF D0 = 1 AND D2 = 1 THEN correction amount = 0 IF D8 = 1 AND D10 = 1 THEN Correction amount = 0 is determined, a pattern that does not require correction is selected based on the relationship between the point of interest and the differential data surrounding it, and a carry signal is output to the output terminal 310.

Then, a logical operation of IF D1 = 1 THEN: A2 IF D0 = 1 THEN: A1 IF D2 = 1 THEN: A3 IF D9 = 1 THEN: B2 IF D8 = 1 THEN: B1 IF D10 = 1 THEN: B3 Patterns are classified by the following, and as a result of classification, the output terminal 312 (V A1 Rise) when A1, the output terminal 313 (V A2 Rise) when A2, the output terminal 314 (V A3 Rise) when A3, A carry signal is output to the output terminal 315 (V B1 Rise) when B1, the output terminal 316 (V B2 Rise) when B2, and the output terminal 317 (V B3 Rise) when B3.

However, the arrangement of the differential data is

[0070]

[Table 1]

The falling edge classification circuit shown in FIG. 39 has its input terminals 220 to 226 output terminal 2 of the falling edge detection circuit shown in FIG.
The same numbers are assigned so as to correspond to Nos. 20 to 226. This circuit includes inverters 320 and 321, AND gates 322 to 330, and OR gates 331 and 33.
2, NOR gates 333, 334, and 335, and performs classification by the same logical operation as the circuit shown in FIG.

IF X = 0 THEN correction amount = 0 IF D0 = 0 AND D1 = 0 AND D2 = 0 THEN correction amount = 0 based on the data of the falling portion obtained by differentiating the original pattern in the horizontal direction. IF D8 = 0 AND D9 = 0 AND D10 = 0 THEN correction amount = 0 IF D0 = 1 AND D2 = 1 THEN correction amount = 0 IF D8 = 1 AND D10 = 1 THEN correction amount = 0 A carry signal is output to the output terminal 340 by selecting a pattern that does not require correction based on the relationship between the point and the differential data surrounding it.

Then, a logical operation of IF D1 = 1 THEN: C2 IF D0 = 1 THEN: C1 IF D2 = 1 THEN: C3 IF D9 = 1 THEN: D2 IF D8 = 1 THEN: D1 IF D10 = 1 THEN: D3 Patterns are classified by the following, and as a classification result, the output terminal 342 (V C1 Fall) for C1, the output terminal 343 (V C2 Fall) for C2, and the output terminal 344 (V C3 Fall) for C3, A carry signal is output to the output terminal 345 (V D1 Fall) when D1, to the output terminal 346 (V D2 Fall) when D2, and to the output terminal 347 (V D3 Fall) when D3.

However, the arrangement of the differential data is

[0075]

[Table 2]

It is defined as

40 and 41 show an embodiment of a classifying means 48 for classifying the types of step portions of a line extending in the horizontal direction into a plurality of groups, and the one shown in FIG. The step portion of the rising and falling portions when dots are present is comprehensively classified, and the one shown in FIG. 41 shows the rising and falling portions when there is a blank portion at the point of interest. It is a comprehensive classification of the steps.

The classification circuit shown in FIG. 40 is the same as that shown in FIGS.
7 and the input terminals 250 to 252, 254, 25 connected to FIGS. 38 and 39.
6 to 258 are output terminals 250 to 252 and 256 to 2 of the vertical rising edge detecting circuit shown in FIG.
58, output terminals 280 to 282, 284, 286 to 28 of the vertical falling edge detection circuit in FIG.
8, output terminals 31 of the rising edge detection circuit and the falling edge detection circuit as seen from the horizontal direction in FIGS.
The same numbers are assigned so as to correspond to 1, 341. This circuit includes AND gates 350 to 368,
It is composed of OR gates 370 to 377, NOR gates 378, and inverters 390 to 392.

Then, whether or not the dot rising signal (FIG. 38) or the dot falling signal (FIG. 39) is input to the input terminals 311 and 341 is largely judged by the AND gates 365 to 368. If it is not the rising edge or the falling edge, the output of the classification result is stopped.

On the other hand, in the case of the rising edge portion, IF D5 = 1 AND D3 = 1 THEN E4 ELSE IF D5 = 1 THEN E3 ELSE IF D4 = 1 THEN E2 ELSE IF D3 = 1 THEN E1 ELSE E0 IF D8 = 1 AND D6 = 1 THEN F4 ELSE IF D8 = 1 THEN F3 ELSE IF D7 = 1 THEN F2 ELSE IF D6 = 1 THEN F1 ELSE F0 On the other hand, IF D5 = 1 AND D3 = 1 THEN E4 ELSE IF D3 = 1 THEN E3 ELSE IF D4 = 1 THEN E2 ELSE IF D5 = 1 THEN E1 ELSE E0 IF D8 = 1 AND D6 = 1 THEN F4 ELSE IF D6 = 1 THEN F3 ELSE IF D7 = 1 THEN F2 ELSE IF D8 = 1 THEN F1 ELSE F0 performs a logical operation for classification, and as a result of the classification, output terminal 403 (Shave E1) at E1, output terminal 402 (Shave E2) at E2, output terminal at F1 A carry signal is output to the output terminal 400 (Shave F2) of F2 at 401 (Shave F1).

However, the arrangement of the differential data is

[0082]

[Table 3]

It is defined as

The falling edge classification circuit shown in FIG. 41 is connected to the output terminals of FIGS. 36 and 37, and its input terminals 250 to 252, 255, 256 to 258 are shown in FIG. The output terminal of the vertical edge detecting circuit for the falling edge, and the output terminals 280 to 283 of the vertical edge detecting circuit for the vertical direction shown in FIG.
The same numbers are assigned to correspond to 286 to 288. This circuit includes AND gates 410 to 42.
8, OR gates 431 to 436, NAND gate 438
And inverters 440 to 442.

If it is a rising edge part, IF D5 = 1 AND D3 = 1 THEN G4 ELSE IF D5 = 1 THEN G3 ELSE IF D4 = 1 THEN G2 ELSE IF D3 = 1 THEN G1 ELSE G0 IF D8 = 1 AND D6 = 1 THEN H4 ELSE IF D8 = 1 THEN H3 ELSE IF D7 = 1 THEN H2 ELSE IF D6 = 1 THEN H1 ELSE H0 Also IF D5 = 1 AND D3 = 1 THEN G4 ELSE IF D3 = 1 THEN G3 ELSE IF D4 = 1 THEN G2 ELSE IF D5 = 1 THEN G1 ELSE G0 IF D8 = 1 AND D6 = 1 THEN H4 ELSE IF D6 = 1 THEN H3 ELSE IF D7 = 1 THEN H2 ELSE IF D8 = 1 THEN H1 ELSE H0 performs a logical operation for classification, and as a result of the classification, the output terminal 433 (HG1) for G1, the output terminal 432 (HG2) for G2, and the output terminal 431 for H1. When (H H1) is H2, a carry signal is output to the output terminal 430 (H H2).

However, the arrangement of the differential data is

[0087]

[Table 4]

It is defined as

The signals output from the classification circuits shown in FIGS. 38 to 41 indicate the form of the original pattern stored in the shift register means 44 by grouping. That is, when the carry signals A0 to A4 and the carry signals B0 to B4 from the classification circuit shown in FIG. 38 are combined, the original pattern having the rising edge seen from the horizontal direction shown in FIGS. 14 and 15 can be recognized. You can

When the carry signals C0 to C4 and the carry signals D0 to D4 from the classification circuit shown in FIG. 39 are combined, the patterns symmetrical with the patterns shown in FIGS. The original pattern with a falling edge can be recognized.

When the carry signals E0 to E4 and the carry signals F0 to F4 from the classification circuit shown in FIG. 40 are combined, there is a dot at the target point among the edges seen from the vertical direction shown in FIGS. The original pattern can be recognized.

Further, when the carry signals G0 to G4 and the carry signals H0 to H4 from the classification circuit shown in FIG. 41 are combined, a dot exists at the target point among the edges seen from the vertical direction shown in FIGS. The original pattern that does not exist can be recognized.

FIG. 42 shows an embodiment of the judging means 49 described in FIG. 5, which receives the carry signal from the classification circuit shown in FIGS. 38 to 41,
The size of the dot to be printed and its printing position are determined, and the same numbers 312 to 31 as those of the output terminals of FIGS. 38 to 41 correspond to the signals input to the input terminals.
7 (FIG. 38), 342 to 347 (FIG. 39), 400 to 403 (FIG. 40), and 430 to 433 (FIG. 41). This circuit is composed of AND gates 440 to 451 and OR gates 460 to 469.

This circuit corresponds to (A
When a carry signal of (A1, B1); (A1, B2); (A2, B1) is output, a dot having a size of ¼ on the left side of the regular dot, that is, a unit dot on the left side of the target point is output terminal 470 Output a signal to be added to the
When a carry signal is output from (A3, B2); (A3, B2); (A3, B2); (A3, B3), a signal for deleting the left side of the dot of interest by the unit dot is output to the output terminal 471.

In the classification circuit (C1, D1) shown in FIG. 39,
When carry signals are output from (C1, D2) and (C2, D1), a signal that deletes 1/4 dot on the right side of the regular dot is output from the output terminal 472, and (C2, D1).
When carry signals are output from (3), (C3, D2), and (C3, D3), a signal for adding 1/4 dot to the right side of the regular dot is output from the output terminal 473.

When the carry signal (E2, F1) of the classification circuit shown in FIG. 40 is output, a signal for deleting the 1/4 dot on the left side of the normal dot of the target point is output to the output terminal 471. When the carry signal is output from (E1, F2), the output terminal 472 outputs a signal that deletes 1/4 dot on the right side of the regular dot of the target point.

When a carry signal is output from (G2, H1) of the classification circuit shown in FIG. 41, the determination circuit causes the output terminal 4
When a signal for adding 1/4 dot to the position of 3/4 dot on the right side of the point of interest is output to 74 and a carry signal is output from (G1, H2), 1/4 is added to the position of 2/4 dot on the right side of the point of interest.
A signal for adding 4 dots is output from the output terminal 475.

FIG. 43 shows an embodiment of the pulse width modulation means in FIG. 5, and the flip-flop 1 for storing the data of the point of interest of the shift register shown in FIG.
Signals from 11 and clocks L1, L2, L3, L4 obtained by dividing one video clock into four cycles (see FIG. 30)
Flip-flop 48 for receiving the fourth clock L4 of
0, a flip-flop 481 that receives the signal from the output terminal 470 of the determination circuit and the third clock L3, a flip-flop 482 that receives the signal from the output terminal 471 of the determination circuit and the third clock L3, and the output of the determination circuit Terminal 4
Flip-flop 483 that receives the signal from 75 and the third clock L3, and flip-flop 48 that receives the signal from the output terminal 474 of the determination circuit and the third clock L3
4, a flip-flop 485 for receiving a signal from the output terminal 472 of the determination circuit and the first clock L1, and a flip-flop 486 for receiving a signal from the output terminal 473 of the determination circuit and the first clock L1. The output signal from the flip-flops 480 to 486 is the clock L1.
Through L4 and inverters 490 through 493, AND gates 495 through 499, OR gates 500 through 503, and NAND gates 504 and 505, and a signal having a pulse width corresponding to the signal from the determination circuit is output to the output terminal 506.

Since the data to be printed is the data S1 which has been calculated one column before the data S2 which is currently being calculated, data indicating a blank portion is stored at the point of interest of the flip-flop and is blank. Even if there is no signal for the dot addition operation for a copy, it is possible to print a dot in the blank area by using the delay with the print target point at the stage when the data indicating the next rising or falling edge is stored. it can.

By the way, in time VI, a mode in which the right side of the regular dot is deleted by 1/4 dot (shave right)
And a mode of adding 1/4 dot to the left side of the regular dot (add left), and a mode of adding 1/4 dot to the right side of the regular dot (add right) and 1 / dot to the left side of the regular dot at time VII. Mode to delete 4 dots (shave le
ft) and ft) are shown to wrap with each other, but there is practically no inconvenience because only one mode is selected at the same point of interest.

The pulse signal output in this way is
The laser beam is output to the laser beam modulator 17, and the laser beam is turned on for a time corresponding to the pulse width.
Therefore, the individual dot data forming the bitmap data output from the buffer is printed as a size suitable for forming a smooth curve or diagonal line. In the above-described embodiment, the point of interest is centered and
Although the data for the column x 3 lines is the target of judgment,
If a size larger than this, for example, a sampling window for 5 columns × 5 lines is used, it is possible to take into consideration the degree of inclination or step from a position away from the point of interest, so It can be converted into a smoother pattern.

The above-described specific circuits constituting each means shown in FIG. 5 are merely examples, and can be optimized by using a logical operation circuit constructing means such as a gate array. It is obvious that can be replaced by software or a dictionary structure using a memory.

In the above-mentioned embodiment, the calculating means after the shift register 44 shown in FIG. 5, that is, the edge detecting means 45 and 46, the classifying means 47 and 48, and the judging means 49.
However, in the case of using a microcomputer having an arithmetic processing speed higher than the printing speed, these means are replaced with a microcomputer 510 as shown in FIG. The microcomputer 510 can be responsible for data processing.

FIG. 46 is a block diagram showing the outline of the program structure showing the data processing to be processed by the above-mentioned microcomputer. The case where the flip-flop is composed of 7 × 7 pieces as shown below is taken as an example. Explain.

[0105]

[Table 5]

The data Rmn stored in this flip-flop is identified by subscripts representing columns and rows, respectively, and the data R33 in the central portion is set as a target point, that is, dot data to be printed next.

The program structure shown in FIG. 46 is divided into a flow I for obtaining horizontal line correction data and a block II for obtaining vertical line correction data.

The block I for obtaining the data for vertical line correction is
7x7 shift register 44 centered on the point of interest R33
Step 530 of calculating the rising edge in the horizontal direction from the upper and lower regions 520 when divided by 5 degrees, and AL, BL, CL,
Step 531 for extracting DL, EL, step 532 for calculating the correction amount, step 540 for calculating the falling edge in the horizontal direction, step 541 for extracting AR, BR, CR, DR, ER, and correction amount And step 542 for computing

Flow II for obtaining the data for horizontal line correction is as follows:
Processes 560, AU, BU, CU that execute the operation of the rising edge in the vertical direction of the region 550 of 3 rows × 7 columns extracted from the 7 × 7 shift register with the point of interest R33 as the center.
Step 561 for extracting DU, EU, FU, GU, step 562 for calculating the amount of dots to be replenished when the data at the position to be printed is blank, and data for the position to be printed is for the dot In step 563, the amount of shaving to reduce this is calculated, and in step 570, the falling edge in the vertical direction is calculated. AD, BD, C
Step 571 for extracting D, DD, ED, FD, GD
Then, step 572 for calculating the amount of dots to be supplemented when the data at the position to be printed is blank, and the amount of reduction for reducing the amount of dot to be added at the position to be printed is calculated. And step 573.

These steps 532, 542, 562
The data calculated by 563, 572 and 573 are combined in step 580 of the output determination calculation and output as print data.

Next, details of the above-mentioned steps will be described.

[Calculation of Horizontal Rising Edge in Step 530] [Calculation of Horizontal Falling Edge in Step 540] [Extraction operation in step 531] Of the differential data thus obtained, the following windows centering on the differential value DXL of the point of interest R33 are assigned and only predetermined differential data is extracted.

[0113]

[Table 6]

Based on these extracted differential data , A horizontal line dot scraping valid signal is generated, and Then, a vertical line correction presence / absence signal is generated.

On the other hand, based on the differential data The following logical operation is executed to obtain AL, BL, CL, DL, EL.

[Calculation of Correction Amount in Step 532] Then, the correction amount in the leftward direction is calculated.

In addition, Then, the correction amount in the right direction is calculated.

[Extraction operation in step 541] Of the differential data thus obtained, the following windows centering on the differential value DXR of the point of interest R33 are assigned to extract the differential data.

[0119]

[Table 7]

Based on these data , A horizontal line dot scraping valid signal is generated, Then, a vertical line correction presence / absence signal is generated.

On the other hand, based on the differential data AR, BR, CR, DR, ER are calculated by executing the following logical operation.

[Calculation of Correction Amount in Step 542] Then, the correction amount in the leftward direction is calculated.

Also Then, the correction amount in the right direction is calculated.

Next, the horizontal line correction of block II will be described.

[Calculation of Vertical Edge in Step 560] YU = R33 AND (NOT R32) DXU = R34 AND (NOT R33) D0U = R14 AND (NOT R13) D1U = R13 AND (NOT R12) D2U = R12 AND (NOT R11) D3U = R24 AND (NOT R23) D4U = R23 AND (NOT R22) D5U = R22 AND (NOT R21) D6U = R44 AND (NOT R43) D7U = R43 AND (NOT R42) D8U = R42 AND (NOT R41) D9U = R54 AND (NOT R53) D10U = R53 AND (NOT R52) D11U = R52 AND (NOT R51) D12U = R04 AND (NOT R03) D13U = R03 AND (NOT R02) D14U = R02 AND (NOT R01) D15U = R64 AND (NOT R63) D16U = R63 AND (NOT R62) D17U = R62 AND (NOT R61) [Extraction calculation in step 561] Differential data obtained in step 560 to calculate the rising edge in the vertical direction On the other hand, the differential data YU at the attention point R33 is set as the attention point.

[0126]

[Table 8]

The following window is allocated.

Then AU, BU, CU, DU, FU, GU are calculated by the following logical operation.

[Calculation of additional amount in step 562] Is executed.

Calculation of Cutting Amount in Step 563] The cutting amount of the rising edge is calculated by Is executed.

[Calculation of Vertical Falling Edge in Step 570] YD = R33 AND (NOT R34) DXD = R32 AND (NOT R33) D0D = R14 AND (NOT R15) D1D = R13 AND (NOT R14) D2D = R12 AND (NOT R13) D3D = R24 AND (NOT R25) D4D = R23 AND (NOT R24) D5D = R22 AND (NOT R23) D6D = R44 AND (NOT R45) D7D = R43 AND (NOT R44) D8D = R42 AND (NOT R43) D9D = R54 AND (NOT R55) D10D = R53 AND (NOT R54) D11D = R52 AND (NOT R53) D12D = R04 AND (NOT R05) D13D = R03 AND (NOT R04) D14D = R02 AND (NOT R03) D15D = R64 AND (NOT R65) D16D = R63 AND (NOT R64) D17D = R62 AND (NOT R63) [Extraction operation in step 571] Among the differential data obtained in step 570, the data of the attention point R33 is YD.
Was the point of interest.

[0132]

[Table 9]

A window is allocated and the data of the falling edge in the vertical direction is extracted. Based on the differential data obtained in this way, AD0 = (NOT D0D) AND (NOT D1D) AND (NOT D2D) AD3 = D0D AND (NOT D2D) AD2 = D1D AD1 = D2D AND (NOT D0D) BD0 = ( NOT D3D) AND (NOT D4D) AND (NOT D5D) BD3 = D3D AND (NOT D5D) BD2 = D4D BD1 = D5D AND (NOT D3D) CD0 = (NOT D6D) AND (NOT D7D) AND (NOT D8D) CD3 = D6D AND (NOT D8D) CD2 = D7D CD1 = D8D AND (NOT D6D) DD0 = (NOT D9D) AND (NOT D10D) AND (NOT D11D) DD3 = D9D AND (NOT D11D) DD2 = D10D DD1 = D11D AND (NOT D9D) FD0 = (NOT D12D) AND (NOT D13D) AND (NOT D14D) FD3 = D12D AND (NOT D14D) FD2 = D13D FD1 = D14D AND (NOT D12D) GD0 = (NOT D15D) AND (NOT D16D) AND ( NOT D17D) GD3 = D15D AND (NOT D17D) GD2 = D16D GD1 = D17D AND (NOT D15D)

[Calculation of additional amount in step 572] [Calculation of Output Determination in Step 580] Steps 532, 542, 562, 563, 572, 573 described above.
SVLR = SVL AND SVR AND X Signal that adds 1/4 dot to the left of the black dot when the calculation for all correction amounts by is completed ADDL = SFTL0 Adds 1/4 dot to the right of the black dot Signal ADDR = SFTR1 Signal to delete the left end of black dot by 1/2 dot (00001111) SHL1 = SVLR AND (SVU3 OR SVD3) Signal to delete the right end of black dot by 1/2 dot (1110000) SLR1 = SVLR AND (SVU4 OR
SVD4) Signal for deleting right edge of black dot by 1/8 dot (11111110) Signal that adds 1/4 dot to the right of the center (00001100) ADD2 = (NOT X) AND (ADD2U OR ADD2D) Signal that adds 1/4 dot to the left of the center (00110000) ADD3 = (NOT X) AND ( ADD3U OR ADD3D) is executed to combine the respective data, and the result is output to the pulse width modulation means 50.

By enlarging the sampling frame in this way, it is possible to carry out the correction in consideration of the form of connection with dots existing at a position farther from the target point, and therefore, as shown in FIG. It is possible to generate a smoother dot pattern as compared with the above embodiment, and it is possible to improve the printing quality.

That is, comparing FIG. 44 with FIG. 47,
For example, data 591 for a half dot, or ¼ for a blank part in contact with the diagonal line of the area 590 in FIG. 47.
Data 592 for dots is newly added with a gap smaller than 1 dot. As a result, diagonal lines and curved portions are expressed as an extremely smooth pattern compared to the original bitmap data.

Although the dot pattern becomes smoother as the size of the sampling window is expanded, the practical limit is about 7 × 7 bits due to the spread of the laser beam, the photoconductor drum and the toner adsorption characteristics. It was confirmed that a sampling window of this size can be used for software processing, and that the printing quality is comparable to printing using printing.

[0138]

As described above, according to the present invention, a step of converting coded data output from an external device into bit map data and storing a plurality of lines in a memory, and the bit map data of the memory. To M column x 1
A step of digitally differentiating in the horizontal direction and the vertical direction while reading line by line to obtain contour data in the horizontal direction and contour data in the vertical direction; and dot data currently to be printed based on the contour data. A step of determining a positional relationship with surrounding dot data that is not a print target, and a step of outputting the dot data that is a print target as a print data dot of a predetermined size based on the result of the determination Since it is provided with, because only the data of the contour portion is used when determining the step formed by the dots to be printed and the surrounding dots,
Only a significantly smaller amount of data is targeted for processing compared to the bit map data that is directly targeted for determination, which enables high-speed operation and is realized by a simple hardware configuration or software such as a gate array. be able to.

[Brief description of drawings]

FIG. 1 is a configuration diagram showing an outline of a laser beam printer to which the present invention is applied.

FIG. 2 is a diagram showing an outline of an operation of a control device for modulating a laser beam of the device shown in FIG.

FIG. 3 is a configuration diagram showing an embodiment of a control circuit of a laser beam printer using the bit map data generating circuit of the present invention.

FIG. 4 is a diagram showing an example of a bitmap pattern output from a buffer using a character “$”.

FIG. 5 is a configuration diagram showing an embodiment of a bitmap data generation circuit.

FIG. 6 is a diagram for explaining digital differentiation in the horizontal direction to obtain contour data, and is a diagram showing data before differentiation.

FIG. 7 is a diagram showing data obtained by differentiating the data shown in FIG.

FIG. 8 is a diagram for explaining digital differentiation in the vertical direction to obtain contour data, showing the data before differentiation.

9 is a diagram showing data obtained by differentiating the data shown in FIG.

10 is a diagram showing rising edges seen from the left side in the horizontal direction obtained by differentiating the pattern of the character "$" shown in FIG.

FIG. 11 is a diagram showing a falling edge seen from the horizontal direction, which is obtained by differentiating the pattern of the character “$” shown in FIG. 4;

FIG. 12 is a diagram showing a rising edge viewed from above in a vertical direction by differentiating the pattern of the character “$” shown in FIG. 4;

FIG. 13 is a diagram showing a falling edge when the pattern of the character “$” shown in FIG. 4 is differentiated and seen from the upper side in the vertical direction.

FIG. 14 is a diagram showing a relationship between an original pattern and a signal from an edge detector classified into logic circuits.

FIG. 15 is a diagram showing the relationship between the signal from the edge detector and the original pattern by classifying the signals into logic circuits.

FIG. 16 is a diagram showing a relationship between an original pattern and a signal from an edge detector, which is classified into logic circuits.

FIG. 17 is a diagram showing a relationship between the signal from the edge detector and the original pattern, which is classified into logic circuits.

FIG. 18 is a diagram showing a relationship between an original pattern and a signal from an edge detector classified into logic circuits.

FIG. 19 is a diagram showing a relationship from an original pattern in which signals from an edge detector are classified into logic circuits.

FIG. 20 is a diagram schematically showing unit dot data output from a pulse width modulation means.

FIG. 21 is a diagram schematically showing unit dot data output from a pulse width modulation means.

FIG. 22 is a diagram schematically showing unit dot data output from the pulse width modulation means.

FIG. 23 is a diagram schematically showing unit dot data output from a pulse width modulation means.

FIG. 24 is an explanatory diagram showing an example of a sampling window.

FIG. 25 is an explanatory diagram showing a case where dots are added to the left side of the rising portion in the horizontal direction in the process of correcting the bitmap data of the character “$” shown in FIG. 4 by applying the present invention. Is.

FIG. 26 is an explanatory diagram showing a case where the left side of the dot at the rising edge in the horizontal direction is deleted and corrected in the process of correcting the bitmap data of the character “$” shown in FIG. 4 by applying the present invention. Is.

FIG. 27 is an explanatory diagram showing a case where dots in the rising portion in the vertical direction are deleted and corrected in the process of correcting the bitmap data of the character “$” shown in FIG. 4 by applying the present invention. .

28 is a diagram showing a case in which a dot is added to a blank space on the left side of a vertical rising portion in the process of correcting the bitmap data of the character "$" shown in FIG. 4 by applying the present invention. It is an explanatory view shown.

FIG. 29 is a diagram showing a result of correcting the bitmap data of the character “$” shown in FIG. 4 by applying the present invention.

FIG. 30 is a timing diagram illustrating the operation of the present invention.

FIG. 31 is a circuit diagram illustrating an embodiment of a memory device that stores video data output from a buffer.

FIG. 32 is a schematic diagram for explaining data storage and read by simulating the operation of the memory device shown in FIG. 31 as a print form.

FIG. 33 is a circuit diagram showing an embodiment of a shift register that constitutes a sampling window.

FIG. 34 is a circuit diagram showing an embodiment of a rising edge detection circuit which constitutes first edge detection means.

FIG. 35 is a circuit diagram showing an embodiment of a falling edge detection circuit which constitutes first edge detection means.

FIG. 36 is a circuit diagram showing an embodiment of a rising edge detection circuit which constitutes second edge detection means.

FIG. 37 is a circuit diagram showing an embodiment of a falling edge detection circuit which constitutes second edge detection means.

38 is a circuit diagram showing an embodiment of a classification circuit for classifying an original pattern based on a rising edge from the edge detector of FIG. 34.

39 is a circuit diagram showing an embodiment of a classification circuit for classifying an original pattern based on a falling edge from the edge detector of FIG. 35.

40 is a circuit diagram showing an embodiment of a classification circuit for classifying an original pattern in which dots are present at a target point among outputs from the edge detectors of FIGS. 36 and 37. FIG.

FIG. 41 is a circuit diagram showing an embodiment of a classification circuit for classifying the original pattern when the target point is a blank part among the outputs from the edge detectors of FIGS. 36 and 37.

42 is a circuit diagram showing an embodiment of a judging means for outputting correction data by the output from the classification circuit shown in FIGS. 38 to 41. FIG.

43 is a circuit diagram showing an embodiment of a pulse width modulation means for outputting print data based on the data from the judgment circuit shown in FIG. 42.

FIG. 44 is a diagram showing bitmap data when the sampling window is enlarged and the character “$” in FIG. 4 is corrected.

FIG. 45 is a block diagram showing an embodiment in which the present invention is executed by software.

FIG. 46 is a diagram showing an outline of a program to be executed by the device shown in FIG. 45.

FIG. 47 is a further enlargement of the window with the character “$” in FIG. 4.
FIG. 3 is a diagram showing bit map data showing a result of arithmetic processing performed by hardware or software.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 Photoconductor drum 5 Laser beam generating means 10 Monitor

Claims (2)

[Claims] 1. A step of converting coded data output from an external device into bit map data and storing a plurality of lines in a memory, and reading the bit map data of the memory for each M columns × 1 line. While digitally differentiating in the horizontal direction and the vertical direction to obtain horizontal contour data and vertical contour data, the dot data currently being printed based on the contour data and the non-printing target A step of determining a positional relationship with surrounding dot data, and a step of converting the dot data to be printed into dots of a predetermined size based on the result of the determination and outputting it as print data. A method for generating bit map image data for a laser beam printer, comprising: 2. An image memory for storing a plurality of lines of bit map data in the serial signal format output from the character generator, and one column of M columns from the image memory each time a 1-bit signal is output from the character generator. Memory control means for sequentially extracting the data of M columns, and the data read from the image memory for M columns × N.
Sampling means for storing while shifting lines, first edge detecting means for digitally differentiating data stored in the sampling means in a line direction, and data stored in the sampling means in a column direction Second edge detecting means for digitally differentiating the first edge detecting means, and first classifying means for classifying the connection relationship between the print target point and the vertical dot including the print target point based on the edge data from the first edge detecting means, A second method for classifying a print target point and a horizontal connection relation including the same based on the edge data from the second edge detecting means.
And a determining means for outputting the correction dot data in which the size of the dot to be printed and the position within the regular dot size are determined based on the data from the first and second classifying means. A bit map image data generator for a laser beam printer, which comprises pulse width modulation means for outputting printing dots based on a signal from a determination means.