JPH0617249U - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPH0617249U
JPH0617249U JP058633U JP5863392U JPH0617249U JP H0617249 U JPH0617249 U JP H0617249U JP 058633 U JP058633 U JP 058633U JP 5863392 U JP5863392 U JP 5863392U JP H0617249 U JPH0617249 U JP H0617249U
Authority
JP
Japan
Prior art keywords
heat sink
conductive member
chip
insulating layer
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP058633U
Other languages
Japanese (ja)
Inventor
和美 高畠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sanken Electric Co Ltd
Original Assignee
Sanken Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sanken Electric Co Ltd filed Critical Sanken Electric Co Ltd
Priority to JP058633U priority Critical patent/JPH0617249U/en
Publication of JPH0617249U publication Critical patent/JPH0617249U/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/536Shapes of wire connectors the connected ends being ball-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/531Shapes of wire connectors
    • H10W72/5363Shapes of wire connectors the connected ends being wedge-shaped
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

(57)【要約】 【目的】 半導体チップの熱の放熱板に対する伝導を、
半導体チップと放熱板との間を電気的絶縁性を低下させ
ることなしに良くする。 【構成】 放熱板1aと絶縁層1bとを備えたヒートシ
ンク部材1を用意する。半導体チップ3が固着されたチ
ップ接続用導電性部材2を用意する。チップ接続用導電
性部材2をヒートシンク部材1の絶縁層1bの上に固着
する。ヒートシンク部材1の周縁に対向するようにチッ
プ接続用導電性部材2に凹部8、9を設け、ここでの絶
縁性を高める。
(57) [Abstract] [Purpose] Conducting the conduction of heat from the semiconductor chip to the heat sink,
Improves the electrical insulation between the semiconductor chip and the heat sink without lowering the electrical insulation. [Structure] A heat sink member 1 including a heat sink 1a and an insulating layer 1b is prepared. A chip connecting conductive member 2 to which a semiconductor chip 3 is fixed is prepared. The chip connecting conductive member 2 is fixed onto the insulating layer 1b of the heat sink member 1. Recesses 8 and 9 are provided in the conductive member 2 for chip connection so as to face the peripheral edge of the heat sink member 1 to enhance the insulating property here.

Description

【考案の詳細な説明】[Detailed description of the device]

【0001】[0001]

【産業上の利用分野】[Industrial applications]

本考案は、放熱板を伴なったトランジスタ、集積回路装置等の半導体装置に関 する。 The present invention relates to a semiconductor device such as a transistor and an integrated circuit device with a heat sink.

【0002】[0002]

【従来の技術及び考案が解決しようとする課題】[Problems to be solved by conventional techniques and devices]

半導体チップ等が固着されたリードフレームと、これとは電気的に絶縁された ヒートシンクとを備え、リードフレームを被覆する樹脂封止体の一部がリードフ レームとヒートシンクの間に介在して両者の電気的絶縁が実現された絶縁型電力 用半導体装置がある。 上記構造の半導体装置は、樹脂成形金型(トランスファモールド金型)の成形 空所(キャビティ)の底部に絶縁層の形成されていないヒートシンクを密接させ て配置し、リードフレームをこのヒートシンクの上面から離間させて位置決めし た状態で封止用樹脂をキャビティ内に注入させて樹脂封止体を形成して得る。こ こで、ヒートシンクとリードフレームとの間隔は、封止用樹脂がこの間に良好に 充填されて両者の電気的絶縁が良好に保たれるように少なくとも0.5mm以上 に設定する必要がある。結果としてヒートシンクとリードフレーム間に介在する 樹脂層が比較的肉厚となり、放熱効果が十分に大きく得られなかった。 It is equipped with a lead frame to which a semiconductor chip is fixed, and a heat sink electrically insulated from the lead frame. A part of the resin encapsulant covering the lead frame is interposed between the lead frame and the heat sink, and both There is an insulated power semiconductor device that achieves electrical insulation. In the semiconductor device with the above structure, a heat sink without an insulating layer is placed in close contact with the bottom of the molding cavity (cavity) of the resin molding die (transfer molding die), and the lead frame is placed from the top of this heat sink. The resin for sealing is obtained by injecting the resin for sealing into the cavity in a state where the resin is spaced and positioned. Here, the distance between the heat sink and the lead frame must be set to at least 0.5 mm or more so that the sealing resin can be filled well between them and the electrical insulation between them can be kept good. As a result, the resin layer interposed between the heat sink and the lead frame was relatively thick, and the heat dissipation effect was not sufficiently large.

【0003】 そこで本考案は、ヒートシンク(放熱板)と半導体チップ接続用導電性部材と の間の電気的絶縁性を向上させ且つ導電性部材からヒートシンクへの熱伝導性を 向上させることができる半導体装置を提供することを目的とする。Therefore, the present invention is a semiconductor that can improve the electrical insulation between the heat sink (heat dissipation plate) and the conductive member for connecting the semiconductor chip and the thermal conductivity from the conductive member to the heat sink. The purpose is to provide a device.

【0004】[0004]

【課題を解決するための手段】[Means for Solving the Problems]

上記目的を達成するための本考案は、導電性を有する放熱板と、前記放熱板の 一方の主面上に形成された絶縁層と、前記絶縁層上に固着された半導体チップ接 続用導電性部材と、前記導電性部材上に固着された半導体チップと備えた半導体 装置において、前記導電性部材の前記放熱板の周縁に対向する領域に窪み部(凹 部)が設けられていることを特徴とする半導体装置に係わるものである。 The present invention for achieving the above object provides a conductive heat sink, an insulating layer formed on one main surface of the heat sink, and a semiconductor chip connecting conductive layer fixed on the insulating layer. In a semiconductor device including a conductive member and a semiconductor chip fixed on the conductive member, a dent (recess) may be provided in a region of the conductive member that faces a peripheral edge of the heat dissipation plate. It relates to a characteristic semiconductor device.

【0005】[0005]

【考案の作用及び効果】[Operation and effect of the device]

本考案における半導体チップ接続用導電性部材は例えば半導体チップの支持板 部とリード部とから成り、半導体チップの電気的接続に使用されている。チップ 接続用導電性部材に設けられた窪み部は放熱板の周縁とチップ接続用導電性部材 との間隔を大きくして電気的絶縁性を向上させる。従って、放熱板上の絶縁層を 薄く形成して放熱性を高めた場合であっても、チップ接続用導電性部材と放熱板 との間の電気的絶縁性を良好に保つことができる。 The conductive member for connecting a semiconductor chip according to the present invention comprises, for example, a support plate portion and a lead portion of the semiconductor chip, and is used for electrical connection of the semiconductor chip. The recess provided in the chip-connecting conductive member increases the distance between the peripheral edge of the heat dissipation plate and the chip-connecting conductive member to improve electrical insulation. Therefore, even when the heat dissipation is improved by forming the insulating layer on the heat dissipation plate thin, good electrical insulation between the conductive member for chip connection and the heat dissipation plate can be maintained.

【0006】[0006]

【実施例】【Example】

次に、図1〜図4を参照して本考案の実施例に係わる半導体装置を説明する。 図1は樹脂封止体を取り除き、且つリードの一部を切り欠いた電力用半導体装 置を示し、図2は図1のA−A線に相当する断面を示す。特に図2から明らかな ように、この電力用半導体装置は、ヒートシンク部材1と、リードフレームに基 づいて形成されたチップ接続用導電性部材2と、トランジスタチップとICチッ プとから成る複数の半導体チップ3と、樹脂封止体4とを備えている。 Next, a semiconductor device according to an embodiment of the present invention will be described with reference to FIGS. FIG. 1 shows a power semiconductor device in which the resin encapsulant is removed and some of the leads are notched, and FIG. 2 shows a cross section corresponding to line AA in FIG. As is particularly apparent from FIG. 2, this power semiconductor device includes a heat sink member 1, a chip connecting conductive member 2 formed on the basis of a lead frame, a plurality of transistor chips and IC chips. The semiconductor chip 3 and the resin sealing body 4 are provided.

【0007】 ヒートシンク部材1は図2に示すように厚さ約2.0mmの肉厚の金属放熱板 1aと、放熱板1aの上面全体に均一な厚みで形成された厚さ約100μmのエ ポキシ樹脂コーティングの絶縁層1bと、この絶縁層1b上に島状に形成された 厚さ約30μmの複数の導体層1cを有している。また、一方の辺の角部には放 熱板1a及び絶縁層1bを貫通する孔1dが設けられている。ヒートシンク部材 1は、絶縁層1b及び導体層1cが形成されている大面積のヒートシンク形成板 材を1個分の面積に打ち抜いて形成されたものである。打ち抜きの際、放熱板1 aの絶縁層1bが形成されていない側(下面)から刃を当てて上面方向に向って 打ち抜くのでヒートシンク部材1の上面の縁部にはバリ1eが生じている。図1 では、バリ1eの上面も絶縁層1bで被覆されたようになっているが、打ち抜き の際に縁部では絶縁層1bが剥離することもある。なお、ヒートシンク形成板材 を絶縁層1b側から打ち抜くと絶縁層1bにクラックが発生し易く望ましくない 。As shown in FIG. 2, the heat sink member 1 includes a metal heat sink 1a having a thickness of about 2.0 mm and an epoxy having a thickness of about 100 μm formed on the entire upper surface of the heat sink 1a with a uniform thickness. It has a resin-coated insulating layer 1b and a plurality of conductor layers 1c formed in an island shape on the insulating layer 1b and having a thickness of about 30 μm. Further, a hole 1d penetrating the heat dissipation plate 1a and the insulating layer 1b is provided at the corner of one side. The heat sink member 1 is formed by punching out a large-area heat sink forming plate material on which the insulating layer 1b and the conductor layer 1c are formed into an area for one piece. At the time of punching, since the heat radiating plate 1a is punched toward the upper surface by applying a blade from the side (lower surface) where the insulating layer 1b is not formed, a burr 1e is formed on the edge of the upper surface of the heat sink member 1. In FIG. 1, the upper surface of the burr 1e is also covered with the insulating layer 1b, but the insulating layer 1b may peel off at the edge portion during punching. If the heat sink forming plate material is punched from the insulating layer 1b side, cracks are likely to occur in the insulating layer 1b, which is not desirable.

【0008】 チップ接続用導電性部材2は、図3に示すように、チップ載置用の複数の支持 板2aと、支持板2aの配列方向に並置した多数の外部リード2bと、中央側の 2本の外部リード2bに連結された配線部2cとを有しておりその厚さは約0. 5mmである。図3には半導体装置1個分のチップ接続用導電性部材2がリード フレームから分離した状態に示されているが、この分離前においては多数のリー ド2bが破線で示す細条5、6で連結され、複数個の配線部2cもここから延び る2叉の連結部2dを介して破線で示す細条7で連結されたリードフレーム構成 になっている。As shown in FIG. 3, the chip-connecting conductive member 2 includes a plurality of support plates 2a for mounting chips, a number of external leads 2b juxtaposed in the arrangement direction of the support plates 2a, and a central side. It has a wiring portion 2c connected to two external leads 2b and its thickness is about 0. It is 5 mm. In FIG. 3, the conductive member 2 for chip connection for one semiconductor device is shown separated from the lead frame, but before this separation, a large number of leads 2b are shown in broken lines. And a plurality of wiring portions 2c are also connected to each other via a two-pronged connecting portion 2d extending from the wiring portion 2c by a strip 7 shown by a broken line.

【0009】 ヒートシンク部材1の周縁に対応するチップ接続用導電性部材2の下面側領域 に図1で点線で示し、図2及び図3で実線で示すように窪み部即ち凹部8、9が 形成されている。なお、凹部8、9はリードフレームの形成時にプレス加工で同 時に形成したものであり、約0.25mmの深さを有する。図3に示す配線部2 cの孔10はトランスファモールド時における樹脂の流れを助けるものである。In the lower surface side region of the chip connecting conductive member 2 corresponding to the peripheral edge of the heat sink member 1, recessed portions, that is, recessed portions 8 and 9 are formed as shown by dotted lines in FIG. 1 and solid lines in FIGS. 2 and 3. Has been done. The recesses 8 and 9 were formed at the same time by press working when forming the lead frame, and have a depth of about 0.25 mm. The holes 10 of the wiring portion 2c shown in FIG. 3 assist the flow of resin during transfer molding.

【0010】 チップ接続用導電性部材2は、図2に示すようにその凹部8及び9がそれぞれ 図4のヒートシンク部材1の一方の長辺と他方の長辺に対向するように位置決め されて、ヒートシンク部材1の導体層1cに支持板2a及び配線部2cが厚さ約 30μmの半田11を介して固着されている。また、支持板2aには半田11を 介して半導体チップ3が固着されており、半導体チップ3はリード細線13を介 して図1に示すようにリード2b等に電気的に接続されている。チップ3及びリ ード細線13の形成は、チップ接続用導電性部材2をヒートシンク1に固着する 前に行っても良いし、固着した後に行っても良い。As shown in FIG. 2, the chip connecting conductive member 2 is positioned so that the recesses 8 and 9 thereof face one long side and the other long side of the heat sink member 1 of FIG. 4, respectively, The support plate 2a and the wiring portion 2c are fixed to the conductor layer 1c of the heat sink member 1 via the solder 11 having a thickness of about 30 μm. Further, the semiconductor chip 3 is fixed to the support plate 2a via the solder 11, and the semiconductor chip 3 is electrically connected to the leads 2b and the like via the fine lead wires 13 as shown in FIG. The chips 3 and the lead thin wires 13 may be formed before or after the conductive member 2 for chip connection is fixed to the heat sink 1.

【0011】 樹脂封止体4は、図2に示すように、半導体チップ3及びリード細線13を含 むように、チップ接続用導電性部材2と、ヒートシンク1を被覆する。樹脂封止 体4は周知のトランスファモールド法によって形成される。即ち、レードフレー ムから成るチップ接続用導電性部材2に半導体チップ3を固着し、且つ、リード 細線13を設け、更に、ヒートシンク部材1を固着した図1の組立体を成形金型 に配し、樹脂封止体4に対応する成形空所(キャビティ)に流動化した樹脂を押 圧注入してこれを硬化することによって形成する。なお、細条5、6、7は樹脂 封止体4を形成した後に除去される。ここで、凹部8はリード2bの強度が十分 に大きく得られるように、樹脂封止体4の内側に配置させられるが、凹部9は細 条7を除去するときに、この凹部9で切断除去を施す為、図2に示すようにその 一部は樹脂封止体4から露出している。As shown in FIG. 2, the resin sealing body 4 covers the chip connecting conductive member 2 and the heat sink 1 so as to include the semiconductor chip 3 and the lead thin wires 13. The resin sealing body 4 is formed by a well-known transfer molding method. That is, the semiconductor chip 3 is fixed to the conductive member 2 for chip connection made of a blade frame, the fine lead wires 13 are provided, and the assembly of FIG. 1 to which the heat sink member 1 is fixed is placed in a molding die. It is formed by pressing and injecting fluidized resin into a molding cavity (cavity) corresponding to the resin sealing body 4 and curing it. The strips 5, 6 and 7 are removed after the resin sealing body 4 is formed. Here, the concave portion 8 is arranged inside the resin sealing body 4 so that the strength of the lead 2b can be obtained sufficiently, but the concave portion 9 is cut and removed by the concave portion 9 when the strip 7 is removed. Therefore, a part of it is exposed from the resin sealing body 4 as shown in FIG.

【0012】 上述のように構成すれば、絶縁層1bが薄くてもヒートシンク部材1の周縁の 耐圧を高めることができる。このため、チップ接続用導電性部材2から放熱板1 aへの熱伝導性を良くすることができる。また、放熱板1aのバリが生じる面を 上側にし、バリがない方を下にすることができるので、放熱板1aを別の放熱体 に取り付けたときに、両者の密着が良くなる。また、ヒートシンク部材1の縁部 に対向させて、チップ接続用導電性部材2に凹部8、9を形成したので、図2の ようにヒートシンク部材1にバリ1eが生じても放熱板1aとチップ接続用導電 性部材2との間の電気的絶縁性を良好に保つことができる。According to the above-mentioned structure, the withstand voltage of the peripheral edge of the heat sink member 1 can be increased even if the insulating layer 1b is thin. Therefore, the thermal conductivity from the chip-connecting conductive member 2 to the heat sink 1a can be improved. Further, since the surface of the heat dissipation plate 1a on which burrs are generated can be on the upper side and the side without burrs can be on the lower side, when the heat dissipation plate 1a is attached to another heat dissipating body, the close contact between them is improved. Further, since the recesses 8 and 9 are formed in the chip connecting conductive member 2 so as to face the edge of the heat sink member 1, even if the burrs 1e are generated in the heat sink member 1 as shown in FIG. The electrical insulation between the conductive member for connection 2 can be kept good.

【0013】[0013]

【変形例】[Modification]

本考案は上述の実施例に限定されるものでなく、例えば次の変形が可能なもの である。 (1) 導電層1cを設けないで絶縁層1bにチップ接続用導電性部材2を固 着することができる。 (2) トランジスタチップのみ又は集積回路チップのみを含む半導体装置に も本発明を適用することができる。 (3) 樹脂封止体4を設けることが望ましいが、これを設けないものにも本 考案を適用することができる。 The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible, for example. (1) The chip connecting conductive member 2 can be fixed to the insulating layer 1b without providing the conductive layer 1c. (2) The present invention can be applied to a semiconductor device including only a transistor chip or an integrated circuit chip. (3) It is desirable to provide the resin sealing body 4, but the present invention can be applied to those that do not have this.

【図面の簡単な説明】[Brief description of drawings]

【図1】本考案の実施例の半導体装置を樹脂封止体を除
去して示す平面図である。
FIG. 1 is a plan view showing a semiconductor device of an embodiment of the present invention with a resin sealing body removed.

【図2】実施例の半導体装置を図1のA−A線に対応す
る部分で示す断面図である。
FIG. 2 is a sectional view showing a semiconductor device of an example at a portion corresponding to line AA in FIG.

【図3】図1のチップ接続用導電性部材をリードフレー
ム状態で示す底面図である。
FIG. 3 is a bottom view showing the conductive member for chip connection of FIG. 1 in a lead frame state.

【図4】図2のヒートシンク部材の平面図である。FIG. 4 is a plan view of the heat sink member of FIG.

【符号の説明】[Explanation of symbols]

1 ヒートシンク部材 1a 放熱板 1b 絶縁層 1c 導電層 1e バリ 2 チップ接続用導電性部材 3 半導体チップ DESCRIPTION OF SYMBOLS 1 Heat sink member 1a Heat sink 1b Insulating layer 1c Conductive layer 1e Burr 2 Chip connecting conductive member 3 Semiconductor chip

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 【請求項1】 導電性を有する放熱板と、 前記放熱板の一方の主面上に形成された絶縁層と、 前記絶縁層上に固着された半導体チップ接続用導電性部
材と、 前記導電性部材上に固着された半導体チップとを備えた
半導体装置において、 前記導電性部材の前記放熱板の周縁に対向する領域に窪
み部が設けられていることを特徴とする半導体装置。
1. A conductive heat sink, an insulating layer formed on one main surface of the heat sink, a semiconductor chip connecting conductive member fixed on the insulating layer, and the conductive layer. A semiconductor device comprising a semiconductor chip fixed on a member, wherein a recess is provided in a region of the conductive member facing the periphery of the heat dissipation plate.
JP058633U 1992-07-29 1992-07-29 Semiconductor device Pending JPH0617249U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP058633U JPH0617249U (en) 1992-07-29 1992-07-29 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP058633U JPH0617249U (en) 1992-07-29 1992-07-29 Semiconductor device

Publications (1)

Publication Number Publication Date
JPH0617249U true JPH0617249U (en) 1994-03-04

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Family Applications (1)

Application Number Title Priority Date Filing Date
JP058633U Pending JPH0617249U (en) 1992-07-29 1992-07-29 Semiconductor device

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002314004A (en) * 2001-04-17 2002-10-25 Denki Kagaku Kogyo Kk Metal-based insulating substrate for resin-sealed semiconductor device and method of manufacturing resin-sealed semiconductor device using the same
JP2003347484A (en) * 2002-05-29 2003-12-05 Sanyo Electric Co Ltd Hybrid integrated circuit device
JP2013069899A (en) * 2011-09-22 2013-04-18 Shindengen Electric Mfg Co Ltd Semiconductor device and manufacturing method of the same
JP2013069910A (en) * 2011-09-22 2013-04-18 Shindengen Electric Mfg Co Ltd Semiconductor device
US9888613B2 (en) 2010-11-02 2018-02-06 Mitsubishi Electric Corporation Power module for electric power steering and electric power steering drive control apparatus using the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002314004A (en) * 2001-04-17 2002-10-25 Denki Kagaku Kogyo Kk Metal-based insulating substrate for resin-sealed semiconductor device and method of manufacturing resin-sealed semiconductor device using the same
JP2003347484A (en) * 2002-05-29 2003-12-05 Sanyo Electric Co Ltd Hybrid integrated circuit device
US9888613B2 (en) 2010-11-02 2018-02-06 Mitsubishi Electric Corporation Power module for electric power steering and electric power steering drive control apparatus using the same
JP2013069899A (en) * 2011-09-22 2013-04-18 Shindengen Electric Mfg Co Ltd Semiconductor device and manufacturing method of the same
JP2013069910A (en) * 2011-09-22 2013-04-18 Shindengen Electric Mfg Co Ltd Semiconductor device

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