JPH06202076A - Active matrix type liquid crystal display device and its driving method - Google Patents

Abstract

(57) [Abstract] [Purpose] To suppress the influence on the pixel due to the voltage change of the display signal line and improve the display characteristics. [Configuration] A reset signal line is connected to each display signal line via a transistor, a gate electrode of the transistor is connected to a dummy output line provided in a horizontal shift register, and a video signal is transferred to each display signal line. After that, the gate of the transistor is turned on by the sampling signal output from the dummy output line to reset the potential of the display signal line.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device in which a plurality of pixels are arranged vertically and horizontally and a switching element is arranged for each pixel to perform active matrix driving.

[0002]

2. Description of the Related Art In recent years, an active matrix driving method has been known as a means for driving a huge number of pixels at a high frequency for the purpose of displaying a high-definition image. This method
A switching element, for example, a transistor is arranged for each pixel, a drain electrode is connected to a pixel electrode of each pixel, a source electrode is connected for each column, and a gate electrode is commonly connected for each row.
The gate electrodes are sequentially turned on by selecting one scanning line at a time, the video signal is input to each display signal line at the same time, and the video signal is input to the pixel electrode via the transistor connected to the selected scanning line to display. It is a method to do.

FIG. 3 shows a circuit diagram of a conventional active matrix type liquid crystal display device. In the figure, 1 is a scanning signal line, 2 is a display signal line, 3 is a thin film transistor (hereinafter referred to as "TFT") for switching pixels, 4 is a liquid crystal, 5 is a vertical shift register, 6'is a horizontal shift register, and 7 is T
FT and 8 are video signal lines.

In the circuit of FIG. 3, the gate electrodes of the TFTs 7 connected to the display signal lines 2 are sequentially turned on by the horizontal shift register 6'and the video signals sent through the video signal lines 8 are sequentially passed through the respective display signal lines 2. Are transferred to each pixel.
On the other hand, the vertical shift register 5 selects one scanning signal line 1 in one scanning period, turns on the gate line of the TFT 3 connected to the scanning signal line 1, and inputs the transferred video signal to the pixel electrode. The liquid crystal capacitance C _LC is held in each liquid crystal cell until the signal of (1) is input. This one horizontal scan is sequentially performed for each scanning line to display one screen.

[0005]

There is a problem that the voltage held as the liquid crystal capacitance fluctuates due to the voltage change of the display signal line 2 which transfers the video signal V _LC (t) to each liquid crystal cell. When the parasitic capacitance between each pixel electrode and the display signal line 2 is _CDS and the voltage change (video signal voltage) of the display signal line 2 is ΔV _S , the fluctuation ΔV _{LC of the} liquid crystal voltage is expressed by the following equation.

[0006]

[Equation 1] Regarding the voltage change ΔV _LC , when attention is paid to a certain pixel, even if a signal voltage is applied to the pixel and even if a charge in the liquid crystal cell is charged, a video signal is connected to another scanning signal line by the same display signal line. Then, the signal charge of the pixel is changed according to the above-described equation (1). The transmission state is determined by the effective driving voltage of the TN type liquid crystal and the threshold voltage of the ferroelectric liquid crystal. Therefore, the fluctuation of the charge of the pixel as described above cannot obtain a desired liquid crystal transmission state.

The case of using the TN liquid crystal will be further described. For example, in the case of applying a signal by changing the polarity of the signal voltage for each frame, the liquid crystal itself (which prevents the DC component from being applied to the liquid crystal) operates according to the AC voltage component. Of. Therefore, the effective voltage V _rms
Where t _{F is} the time for two frames and V _LC (t) is the signal voltage transferred to the liquid crystal,

[0008]

[Equation 2] It is represented by.

However, the signal level of the pixel video signal of a certain line changes by ΔV _{LC2 according} to the above equation 1, and as a result, the effective voltage V _rms shown in the above equation 2 changes, and the black level is no longer _maintained. Can't be maintained. That is, the above equation 2 is

[0010]

[Equation 3] , And the effective voltage changes.

In any case, as a result, the display level of a certain line, which must display the original level, gradually changes to another signal level due to the voltage change according to the equation (1), and is no longer the original level. You will not be able to maintain your level.

Further, such a voltage change becomes more complicated when the signal level changes linearly like a general television image signal. Moreover, since the fluctuating direction approaches the signal level of the pixel to which the display signal is input, blurring occurs in the image between the pixels or between the scanning signal lines, and the image boundary becomes unclear. come. This bleeding appears as vertical stripe smear on the screen, resulting in a significant loss of image quality.

Further, as the pixel size becomes smaller and the display becomes finer, the voltage change cannot be ignored. This is because the pixel size decreases, because the parasitic capacitance C _DS between the display signal lines and the pixel electrodes is not reduced as the reduction of the liquid crystal capacitance C _LC, min of the liquid crystal capacitance C _LC is reduced, the parasitic capacitance C _This is because the influence of _DS becomes large.

[0014] To 0 such voltage change [Delta] V _LC of the above, it is first considered that the C _DS to 0, that the basic circuit configuration such as shown in FIG. 3 to 0 It is impossible. Next, it is conceivable to reduce the voltage change itself of the display signal line, but for that purpose, it is necessary to reduce the ratio of the parasitic capacitance C _S of the display signal line to the total capacitance. However, although the parasitic capacitance of the display signal line itself is reduced to some extent by reducing the width of the wiring, it is much larger than the capacitances C _DS and C _LC on the liquid crystal side. Further, since C _DS also configured and the size of the pixel portion is to some extent determined if Kimare, it is not possible to increase the capacity.

Therefore, it is possible to further increase the liquid crystal capacitance C _LC . For this reason, as seen in the existing TN type liquid crystal cell structure, it is conceivable to form an auxiliary capacitance having a larger capacitance than C _LC in parallel with the liquid crystal capacitance C _LC . However, as described above, since the difference between the liquid crystal capacitance C _LC and the parasitic capacitance C _S is too large, in order to eliminate the influence, it is necessary to add an auxiliary capacitance of the same level or more. Therefore, the load of display signal transfer is increased. When the number of pixels increases and the time required for one scanning signal line is shortened, it becomes impossible to unnecessarily form a large load capacitance.

That is, the voltage change ΔV _{LC is} applied to a high-definition display which is required to be driven with high precision and high speed, such as a high-definition display which is expected to spread rapidly in the future.
It is considered that the above problem becomes more prominent.

Furthermore, when the number of pixels in the display section is 450 vertical scanning lines × 600 horizontal scanning lines (display signal lines), when a display panel having this number of horizontal pixels is scanned with NTSC signals. The time required to charge one horizontal pixel (actually, the parasitic capacitance parasitic on each display signal line) is about 90 [nsec. ] Only It is necessary to accumulate the image input signal charge in the display signal line parasitic capacitance within this time. The signal charge to be accumulated depends on the display performance of the panel, and in particular, how many gradation levels are required. That is, if there is a transfer failure of a signal voltage equal to or higher than the signal voltage corresponding to one gradation of the number of gradations to be displayed, the gradation characteristics of the panel can no longer be maintained. In the field of liquid crystal display panels, it is expected that higher gradation will be required in the future. Since the drive voltage amplitude of the liquid crystal does not seem to change significantly, in that case, the signal voltage for identifying one gradation becomes smaller and smaller.
For example, when the drive voltage amplitude of the liquid crystal is ± 5 [V],
In consideration of the change in the voltage-transmittance curve of the liquid crystal, 20 to 30 is required in order to realize the display gradation number of about 64 gradations.
The difference in signal voltage around [mV] must be read.

Consider, for example, a case where all the switching transistors are composed of only P-type MOS. The amplitude of the input signal is 3 to 13 [V]. In this case, the potential of the counter electrode of the liquid crystal cell was set to about 8 [V]. The drive amplitude of the gate pulse that drives the switching transistor that transfers the signal was set to 0 to 15 [V].

Here, when the reset voltage of the display signal line parasitic capacitance is set to 3 [V] and 8 [V], FIG.
As shown in, the reset voltage causes a difference in the charging rate to the display signal line parasitic capacitance, especially when the input signal is small. As described above, it is considered that the display signal line parasitic capacitance side acts as the drain or the source of the transistor due to the difference in the reset voltage.

As a result of the above examination, the present inventors have obtained the present invention as a means for realizing a liquid crystal display panel with high image quality and high gradation. The purpose of the present invention is to
In view of the above-mentioned problems of the conventional art, it is an object of the present invention to provide a display device that prevents deterioration of display characteristics due to the influence of a change in voltage of a display signal line and realizes high-definition and high-speed driving, and a driving method thereof.

[0021]

A first aspect of the present invention is an active matrix type liquid crystal display device using a thin film transistor as a switching element for each pixel, wherein a display signal line is connected to a reset signal line through the transistor. The horizontal shift register for sampling the video signal has a dummy output line for outputting the sampling signal in addition to the display signal line, and the transistor connected to the reset signal line by the sampling signal output to the dummy output line. Is an active matrix type liquid crystal display device.

A second aspect of the present invention is a method for driving the above liquid crystal display device, wherein a horizontal shift register sequentially samples a video signal during a scanning period of one horizontal scanning period and transfers the video signal to a display signal line. Then, in the subsequent blanking period, a sampling signal is output to the dummy output line provided in the horizontal shift register to turn on the transistors connected to the reset signal line, and the reset signal is input to all display signal lines to keep the potential constant. A method for driving an active matrix type liquid crystal display device, which is characterized by holding the value.

[0023]

According to the structure of the present invention, the display signal line is held at a constant potential (reset) as much as possible by utilizing the blanking period, thereby suppressing the above-mentioned fluctuation due to the voltage change or making the degree of influence constant. You can make it inconspicuous by. In addition, in the configuration of the present invention, the reset potential of the display signal line is optimized, so that the transfer capability of the video input signal to the pixel capacitance is improved without special measures such as significantly increasing the size of a transistor or the like. It is possible to improve display gradation performance. Further, in the liquid crystal display device of the present invention, as a means for resetting the display signal line, an extra dummy output line is provided in the horizontal shift register, which has been sampling the conventional video signal, and the same output is performed to display. Instead of the transistor connected to the signal line, the transistor connected to the reset signal line is turned on and the reset signal is transferred to the display signal line. Therefore, in terms of the circuit configuration, it is only necessary to additionally configure the reset signal line wiring, the transistor, and the dummy output line in the horizontal shift register, and there is no fear of major design changes in manufacturing or reduction in yield. .

[0024]

1 is a circuit diagram of an embodiment of the liquid crystal display device of the present invention, and FIG. 2 is a timing chart thereof.

In the figure, 1 is a scanning signal line, 2 is a display signal line,
3 is a TFT, 4 is a liquid crystal, 5 is a vertical shift register, 6 is a horizontal shift register, 6a is a video signal shift register, 6b is a reset shift register, and 7 and 10 are T.
FT, 8 is a video signal line, 9 is a reset signal line, and 11 is a dummy output line.

A feature of the present invention is that each display signal line 2 is a TFT.
The TFT 10 is connected to the reset signal line 9 via the gate electrode 10, and the gate electrodes of the TFTs 10 are commonly connected to the dummy output line 11 provided in the reset shift register 6b of the horizontal shift register 6.

In this embodiment, the video signal sent through the video signal line 8 is sequentially sampled by the horizontal shift register 6 during the scanning period within one horizontal scanning period (T
It is the same as the conventional liquid crystal display device up to the point where the video signal is transferred to each display signal line 2 in a dot-sequential manner by sequentially turning on the FT7).

Next, in the present embodiment, the horizontal shift register 6 uses the remaining blanking period to sample the video signal, and the video shift register 6a.
In addition, it has a reset shift register which has the same configuration as the sampling signal of the video signal and turns on all the TFTs 10 interposed between the reset signal line 9 and each display signal line 2 through the dummy output line. , Reset signal V
_R is transferred to the display signal line 2 and the potential is kept constant.

As is clear from the timing chart shown in FIG. 2, the output from the horizontal shift register is uniform. Although three dummy output lines are shown in FIG. 2, resetting can be performed with at least one dummy output line. Also,
Although the horizontal shift register is divided into a video 6a and a reset 6b for the sake of convenience, the configuration and the operating state are exactly the same, and a plurality of samplings are synchronized because the sampling signals are sequentially output to the output line. That is, there is no fear of erroneous display due to simultaneous sampling of the video signal and sampling of the reset signal. In other words, the video shift register 6a and the reset shift register 6
There is no need to set the timing with b. (Embodiment 1) As one embodiment of the present invention, the number of pixels is 460 ×
Create a 600 (R + G + B) liquid crystal panel and use NTSC
The image was displayed using the image signal.

When the active matrix liquid crystal display device was actually driven with the reset voltage set to 8 [V], no smear of the image in the vertical direction was observed at all. By the way,
The driving conditions of the liquid crystal element at this time are as follows.
[V], the counter electrode potential of the liquid crystal cell was 8 [V], and a frame inversion driving method in which the polarity of the signal voltage was inverted every frame was adopted. Further, the video input signal was input after being corrected in advance based on the above formula. (Embodiment 2) As a second embodiment of the present invention, the number of pixels is 46
Create a 0x600 (R + G + B) liquid crystal panel and
The image was displayed using the SC image signal.

When the active matrix liquid crystal display device was actually driven with the reset voltage set to 8 [V], no smear of the image in the vertical direction was observed at all. By the way,
The driving condition of the liquid crystal element at this time is a driving voltage of ± 8 to 0.
[V], the counter electrode potential of the liquid crystal cell is 0 [V], and the frame & 1H inversion driving method is used in which the polarity of the signal voltage is inverted every one frame and one horizontal scanning period. Further, the image input signal was not particularly corrected based on the above formula 3, but no significant difference from Example 1 was observed except that the amplitude of the drive voltage was increased. (Embodiment 3) As a third embodiment of the present invention, the number of pixels is 46.
Create a 0x600 (R + G + B) liquid crystal panel and
The image was displayed using the SC image signal.

When the active matrix liquid crystal display device was actually driven with the reset voltage set to 6 [V], smear of the image in the vertical direction was not observed at all. By the way,
The driving condition of the liquid crystal element at this time is a driving voltage of ± 8 to 0.
[V], the counter electrode potential of the liquid crystal cell is 0 [V], and the frame & 1H inversion driving method is used in which the polarity of the signal voltage is inverted every one frame and one horizontal scanning period. Further, the image input signal was not particularly corrected based on the above formula 3, but no significant difference from Example 1 was observed except that the amplitude of the drive voltage was increased.

In particular, as a liquid crystal material, TN (Twi
When a steady nematic liquid crystal is used, the driving method is so-called AC driving in which a positive and negative signal is input with respect to the center voltage, but in that case, the display is continued with the positive and negative signals being unbalanced. And DC in the liquid crystal molecule
The components are applied, and the liquid crystal molecules are gradually burned in due to rearrangement of the impurity ions in the liquid crystal, and flicker begins to stand out, and finally a phenomenon occurs in which the liquid crystal molecules completely stop operating. In the above, the reason why the reset voltage is set to 6 [V] is that the DC component cannot be removed because the video input signal is not corrected based on the equation (3), so that the DC component is canceled. Then, the effective voltage actually applied to the liquid crystal cell was calculated and set as the voltage for minimizing the DC component. (Embodiment 4) The size of a transistor that transfers a video signal to each display signal line parasitic capacitance and pixel capacitance is W / L = 50 /
2 [μm] (W: gate width, L: gate length), channel type, P-type MOS.

In this embodiment, a single crystal silicon layer (SOI layer) on an insulating layer is used as an active layer forming a transistor.
Was used. Examples of the method for manufacturing such a substrate include those obtained by recrystallizing an amorphous silicon or polycrystalline silicon film deposited on a glass substrate by an energy beam, or a substrate obtained by bonding a single crystal silicon wafer on an insulating film. Can be used. In particular, the latter is effective as a means for obtaining a good-quality single crystal SOI layer, and the substrate prepared by this method was used also in this example.

The input video signal amplitude is 3 to 13
[V], the voltage of the counter electrode of the liquid crystal was 8 [V], and the drive voltage amplitude of the shift register for driving the switching transistor was 0 to 15 [V].

The reset voltage of the display signal line is 3
It was set to [V].

The liquid crystal display is normally white (white display in a standby state with no input signal).

In the liquid crystal display panel prepared in this example, vertical stripe smear was not observed at all.

Further, as a result, especially when the image input signal is low, that is, the gradation is improved in the display near black display, and a liquid crystal display panel of 60 gradations can be realized as the entire input video signal. It was

It is considered that this is because the display signal line parasitic capacitance was sufficiently charged when the input video signal was low.

In particular, as a liquid crystal material, TN (Twi
When a steady nematic liquid crystal is used, the driving method is so-called AC driving in which a positive and negative signal is input with respect to the center voltage, but in that case, the display is continued with the positive and negative signals being unbalanced. And DC in the liquid crystal molecule
As a result of the application of the component, a phenomenon in which liquid crystal molecules are gradually burned in due to rearrangement of impurity ions in the liquid crystal, flicker becomes conspicuous, and finally the liquid crystal molecule completely stops operating is produced. In the display panel, flicker significantly occurred, and a long-life panel without liquid crystal burn-in could be realized.

This is because the transfer capability of the video input signal on the negative side (low level of the input signal) with respect to the center voltage of the counter electrode is improved, and the positive and negative signals are more balanced. Is considered to be.

[0043]

As described above, according to the liquid crystal display device and the method of driving the same of the present invention, the voltage change of the display signal line is prevented and the influence thereof is suppressed. It is possible to provide a high-quality image that is solved by. Therefore, it is possible to meet the demand for a high-definition and high-speed drive display device such as a high-vision display.

[Brief description of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention.

FIG. 2 is a timing chart of the circuit diagram shown in FIG.

FIG. 3 is a circuit diagram of a conventional liquid crystal display device.

FIG. 4 is a diagram showing a relationship between a reset voltage and a charging rate of a display signal line parasitic capacitance according to the present invention.

[Explanation of symbols]

 1 scanning signal line 2 display signal line 3 TFT 4 liquid crystal 5 vertical shift register 6 horizontal shift register 6a video shift register 6b reset shift register 7 TFT 8 video signal line 9 reset signal line 10 TFT 11 dummy output line

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Office reference number FI technical display location H01L 29/784

Claims (2)

[Claims] 1. An active matrix type liquid crystal display device using a thin film transistor as a switching element for each pixel, wherein a display signal line is connected to a reset signal line through a transistor and a horizontal shift register for sampling a video signal. Has a dummy output line for outputting the sampling signal in addition to the display signal line, and the transistor connected to the reset signal line is turned on by the sampling signal output to the dummy output line. Type liquid crystal display device. 2. A method of driving an active matrix type liquid crystal display device using a thin film transistor as a switching element for each pixel, wherein a video signal is sequentially sampled by a horizontal shift register during a scanning period of one horizontal scanning period. The signal is transferred to the display signal line, and during the subsequent blanking period, a sampling signal is output to the dummy output line provided in the horizontal shift register to turn on the transistors connected to the reset signal line and reset signal to all display signal lines. Is input and the potential is held at a constant value. A method for driving an active matrix type liquid crystal display device.