JPH06204232A - Method of manufacturing semiconductor device and semiconductor device - Google Patents

Abstract

(57) [Summary] (Modified) [Purpose] After forming a surface treatment layer on the positive bevel-shaped mesa groove and the exposed PN junction, divide it into a large number of semiconductor pellets, and use a semiconductor wafer. Handling of
An object of the present invention is to provide a semiconductor device which has high breakdown voltage and high reliability, which can be easily stored and does not require surface contamination measures after division. [Structure] A first P-type impurity (for example,
Aluminum) and a second P-type impurity (for example, boron) are diffused to form a P-type semiconductor layer 9, and the mesa groove 4 is formed into a positive bevel shape, and the height H of the dividing surface is at least 30 μm. After the surface treatment layer 5 is applied to the groove 4 portion, it is divided into a plurality of semiconductor pellets.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of manufacturing a semiconductor device and a semiconductor device constituted by the manufacturing method.

[0002]

2. Description of the Related Art Conventionally, a semiconductor pellet used for a semiconductor device such as a rectifying diode is usually formed by forming a PN junction layer on a silicon semiconductor wafer having a large area, and dividing this into a plurality of (2) several pieces. It was obtained by dividing. However, the exposed PN junction due to division is liable to cause dielectric breakdown, and conventionally the junction surface is cleaned, inactivated, and surface protected.

For example, FIG. 1 is a sectional structural view showing a conventional method for manufacturing a semiconductor device, wherein 1 is an N-conductivity type semiconductor semiconductor substrate, 2 is a P conductivity type semiconductor layer, 3 is an N + conductivity type semiconductor layer, Reference numeral 4 is a mesa groove, 5 is a surface-treated layer of glass or the like, and 6 is a divided surface.

A P-conductivity type semiconductor layer 2 and an N + -conductivity type semiconductor layer 3 are formed on the upper and lower main surfaces of the N-conductivity type silicon semiconductor substrate 1.
Are formed by diffusion to form a semiconductor wafer. Then, in order to divide into a large number of semiconductor pellets, P
The mesa grooves 4 are formed in a lattice shape by etching from the conductive type semiconductor layer 2 side. A surface treatment layer 5 made of glass is formed on the exposed PN junction of the mesa groove 4 by a deposition method or the like. Further, the dividing surface 6 at the bottom of the mesa groove 4 is broken.

When the semiconductor pellets are formed as shown in FIG. 1, the problem of the surface condition is solved, but the problem of surface breakdown, which is important for determining the breakdown voltage, remains. That is, the junction surface shape becomes a generally known negative bevel, and in order to obtain a sufficiently small surface electric field for high withstand voltage characteristics, the inclination must be made large, and there are many problems such as a decrease in effective area.

FIG. 2 is a sectional structural view showing a method for manufacturing a positive bevel semiconductor device, and the same reference numerals as those in FIG. 1 denote the same parts. A positive bevel is a bonding surface shape suitable for obtaining high withstand voltage characteristics, and has a cross-sectional area of a region having a large specific resistance smaller than that of an opposite region.

As a general procedure, a P conductive type semiconductor layer 2 and an N + conductive type semiconductor layer 3 are formed on an N- silicon semiconductor substrate 1 by a diffusion method, and the PN-N + substrate is etched (3). It is fixed to a substrate 7 made of a metal or the like which is not corroded by a wax 8 and is etched from the side of the N + conductivity type semiconductor layer 3 to the portion of the wax 8 to form a positive bevel, and the wax 8 is removed to form a semiconductor pellet. After that, a semiconductor device is manufactured through steps such as brazing of metal terminals (not shown) to individual semiconductor pellets and deposition of a surface treatment layer such as resin or glass on the exposed PN junction.

The manufacturing method as shown in FIG. 2 and the semiconductor device using the same have various problems. That is, after the wax 8 is removed, it is divided into individual semiconductor pellets and cannot be handled as a semiconductor wafer, which complicates the process. Moreover, it is necessary to clean the contamination of the exposed PN junction portion with an adhesive such as wax 8 or the like when the metal terminal is brazed by a process such as after-etching, and it is likely to cause characteristic deterioration. Further, the P-conductivity-type semiconductor layer 2 is formed, for example, only by diffusion of boron, and limits the decrease of the impurity concentration gradient which is one of the reverse breakdown voltage determining factors.

[0009]

When a silicon semiconductor substrate on which a PN junction is formed is divided and a large number of positive bevel-shaped semiconductor pellets are manufactured, the semiconductor pellets are separated into individual semiconductor pellets after the positive bevels are formed. In the process of forming the surface treatment layer, forming the electrode, etc., handling is troublesome, the surface is contaminated, the number of processes is increased, etc.
There is a problem in improving the breakdown voltage by adjusting the impurity concentration gradient.

[0010]

The present invention provides a first conductivity type silicon semiconductor substrate having two main surfaces, at least (1) which has a low solid solubility on at least one main surface and a high diffusion rate. A step of diffusing a conductivity type impurity and a second conductivity type impurity having a high solid solubility and a slow diffusion rate to form a conductivity type semiconductor layer, (2) a high concentration one conductivity type semiconductor on the other main surface A step of forming a layer, (4) (3) forming a mesa groove deeper than the junction surface from the high-concentration one-conductivity type semiconductor layer side, and forming a reverse conductivity type semiconductor layer of at least 30 μm from the bottom of the mesa groove to one main surface. The process of
(4) A step of depositing a surface treatment layer on the mesa groove portion, (5)
In the method of manufacturing a semiconductor device, which is formed by dividing at the bottom of the mesa groove and forming a plurality of semiconductor pellets, and in the manufacturing method thereof, one conductivity type is N
Type, the opposite conductivity type is P type, the first opposite conductivity type impurity is aluminum, and the second opposite conductivity type impurity is boron. Further, it is a semiconductor device configured by any one of the above manufacturing methods. Thereby,
Realize positive bevel semiconductor devices with advantages such as surface stability, high breakdown voltage, high reliability, easy manufacturing, and easy storage.

[0011]

EXAMPLE FIG. 3 is a sectional structural view showing an embodiment of the present invention, and FIG. 4 is a sectional structural view of a semiconductor pellet after division (a).
FIG. 3B is an impurity concentration distribution diagram (b). 1 is a one conductivity type (for example, N−) silicon semiconductor substrate, 3 is a high-concentration one conductivity type (for example, N +) semiconductor layer, 4 is a mesa groove, 5 is glass,
A surface treatment layer of resin or the like, 6 is a dividing surface, 9 is a first reverse conductivity type (eg P) impurity and a second reverse conductivity type (eg P)
A is a reverse conductivity type semiconductor layer in which impurities are diffused, A is an anode electrode, C is a cathode electrode, and H is a height of a dividing surface from the bottom of the mesa groove 4 to the lower surface of the reverse conductivity type semiconductor layer 9. In addition, the conductivity types in the following description are N and P according to the illustration.
Represent.

An N + type semiconductor layer 3 is formed on one main surface of an N-type silicon semiconductor substrate 1 having two main surfaces, and a P type semiconductor layer 9 is formed on the other main surface. The P-type semiconductor layer 9 was formed by simultaneously diffusing a first P-type impurity such as aluminum and a second P-type impurity such as polon. The first P-type impurity has a low solid solubility and a high diffusion rate, and the second P-type impurity has a high solid solubility and a slow diffusion rate. It is necessary to select an impurity (5). . For example, aluminum has a solid solubility of about 1/25 and a diffusion coefficient of about 5 times that of boron.

In the P-type semiconductor layer 9 of the present invention, after the mesa groove 4 is formed deeper than the PN-junction surface for forming a positive bevel, the conventional P-type semiconductor layer 9 is formed so that the height H of the dividing surface 6 remains at least 30 μm. The diffusion layer needs to be deeper than the semiconductor layer (2 in FIG. 2). As a result, the semiconductor wafer can be handled in the subsequent steps and storage without being easily separated.

However, when the required P type semiconductor layer 9 formed of a deep diffusion layer is formed of a single P type impurity, problems occur in terms of characteristics and processing time. For example, when diffusing only aluminum, the impurity concentration gradient after diffusion is set to 1 × 1.
Can be as low as 0 ^17, it is possible to increase the reverse voltage. On the other hand, the surface concentration becomes low and the electrode metal A
A large contact resistance is generated between the contact point and the contact point and the forward voltage rises. Further, in the case of diffusion of only boron, which is generally used, it takes a processing time three times or more that of aluminum to obtain the same diffusion depth.

In the embodiment of the present invention, the first P-type impurity aluminum and the second P-type impurity boron were simultaneously diffused so as to obtain the impurity concentration distribution chart of FIG. 4B. Thereby, the PN junction side of the P-type semiconductor layer 9 is set as a low concentration gradient region to improve the reverse voltage characteristic, and 9
It is possible to form a low resistance ohmic contact with the electrode metal by using the anode electrode A side of the above as a high concentration region.

The PN-N + silicon semiconductor substrate thus formed was formed into a positive bevel type by forming a mesa groove 4 deeper than the PN- junction surface from the N + type semiconductor layer 3 side by an etching method. In this case, as described above, the height H of the dividing surface is set to 30 so that the semiconductor wafer can be handled in the state.
It was set to μm or more.

(6) Further, at least the PN-junction exposed portion of the mesa groove 4 is made of glass,
A surface treatment layer such as a resin is applied to perform surface stabilization treatment. Furthermore, the anode electrode A and the cathode are formed on the upper and lower main surfaces.
Each of the electrode C is formed by a plating method or the like.

Next, the dividing surface 6 at the bottom of the mesa groove 4 is blunted.
The semiconductor pellet shown in FIG. 4 (a) is obtained by dividing by the King method or the like. In the breaking, a precut groove is formed in the P-type semiconductor layer 9 from the anode electrode A side.

The positive bevel type semiconductor pellet according to the present invention has a mesa groove coated with a surface treatment layer before being divided into individual pieces, which facilitates the handling and storage in the subsequent steps, and fixes the metal terminals. There is no need for subsequent after-etching. As described above, the rectifying diode according to the present invention was manufactured as a result of the reverse voltage 1800V or more, reverse bias application reliability test (150 ° C, DC 1200V, 10V).
It was confirmed that the characteristics did not change at 00 hours).

In the embodiments of the present invention, the modification, addition, conversion, etc. of each part and the diversion to semiconductor devices other than the rectifying diode are included in the scope of the present invention within the scope of the present invention. Is.

[0021]

As described above, since a semiconductor device of high withstand voltage which is easy to handle and store and has a surface-stabilized surface can be realized in any state of the semiconductor wafer and the semiconductor pellet, the rectifying diode can be used. The industrial effect is extremely large when applied to various semiconductor devices and manufacturing methods.

[Brief description of drawings]

FIG. 1 is a cross-sectional structure diagram showing a conventional method for manufacturing a semiconductor device. (7)

FIG. 2 is a cross-sectional structure diagram showing a method of manufacturing a conventional positive bevel semiconductor device.

FIG. 3 is a sectional structural view showing an embodiment of the present invention.

FIG. 4 is a sectional structure view (a) and an impurity concentration distribution view (b) of a semiconductor pellet of the present invention.

[Explanation of symbols]

 1 One conductivity type (for example, N-) silicon semiconductor substrate 2 Conventional reverse conductivity type (for example, P) semiconductor layer 3 High concentration one conductivity type (for example, N +) semiconductor layer 4 Mesa groove 5 Surface treatment layer 6 Dividing surface 7 Substrate such as metal 8 Wax 9 Reverse conductivity type (for example, P) semiconductor layer of the present invention A Anode electrode C Cathode electrode H Divided surface height

Claims (3)

[Claims] 1. A single conductivity type silicon semiconductor substrate having two main surfaces, at least (1) a first reverse conductivity type impurity having a low solid solubility on one main surface and a high diffusion rate, and a solid solubility. Of the second conductivity type having a high diffusion rate and a low diffusion rate to form a semiconductor layer of the opposite conductivity type, (2) a step of forming a high concentration one conductivity type semiconductor layer on the other main surface, ) A step of forming a mesa groove deeper than the junction surface from the high-concentration one-conductivity type semiconductor layer side, and setting the reverse conductivity type semiconductor layer from the bottom of the mesa groove to one of the main surfaces to at least 30 μm, (4) mesa groove part A method of manufacturing a semiconductor device, comprising: forming a surface treatment layer on the substrate; and (5) forming a plurality of semiconductor pellets by dividing at the bottom of the mesa groove. 2. One conductivity type is N type, and opposite conductivity type is P type,
2. The method of manufacturing a semiconductor device according to claim 1, wherein the first opposite conductivity type impurity is aluminum and the second opposite conductivity type impurity is boron. 3. A semiconductor device according to claim 1 or 2.