JPH06224162A - Dry etching method for semiconductor substrate - Google Patents

Abstract

(57) [Abstract] [Purpose] To provide a dry etching method capable of improving step coverage. An etching stopper film 3 covering a non-etched portion U of the semiconductor substrate S on a (100) surface of the semiconductor substrate S.
Is formed in a taper shape so that the layer thickness at the end becomes thinner toward the tip, and the semiconductor substrate S is heated only by heating the etching plasma, and
Etch in a reactive gas atmosphere.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a dry etching method for semiconductor substrates.

[0002]

2. Description of the Related Art A reactive ion etching method has been conventionally known as a method for dry etching a semiconductor substrate. In this etching method, a reactive gas is discharged by applying high-frequency power, and the semiconductor substrate is etched using plasma generated by this discharge. When this method is used for etching, the shape of the region on the semiconductor substrate where the etching stop film is present in plan view properly corresponds to the region to be actually etched. The shape between the portion and the portion where etching is stopped by the etching stop film becomes a steep step.

[0003]

However, when a steep step is formed on the surface of the semiconductor substrate as in the above-mentioned prior art, when a thin layer electrode or the like is formed on the surface, the formed layer is not formed. Since there is a case that the so-called step coverage is deteriorated due to the break at the step portion, improvement has been desired. The present invention has been made in view of the above circumstances, and an object thereof is to provide a dry etching method capable of improving step coverage.

[0004]

A feature of the dry etching method of the present invention is that an etching stop film for covering a non-etched portion of the semiconductor substrate is formed on the (100) plane of the semiconductor substrate, and a layer thickness at the end portion is small. The point is that the semiconductor substrate is formed in a taper shape so that it becomes thinner toward the tip, and the semiconductor substrate is heated only by heating the etching plasma and is etched in a reactive gas atmosphere.

[0005]

According to the features of the present invention, (10
An etching stopper film is formed on the (0) plane, the semiconductor substrate is placed in a reactive gas atmosphere, and the reactive gas is discharged to be in a plasma state to etch the semiconductor substrate. The plasma etches a region of the semiconductor substrate where the etching stop film is not formed, but at the same time, the etching stop film itself is also etched little by little. Therefore, the etching stop film is
As the etching of the semiconductor substrate progresses, the end portion of the etching stopper film recedes while maintaining its tapered shape.

When the etching of both the semiconductor substrate and the etching stop film progresses in this way, the portion where the etch stop film is not formed is continuously etched from the beginning of the etching, and the end of the etching stop film recedes. As a result, the surface of the semiconductor substrate that is newly exposed is also sequentially etched. Therefore, the etching shape of the semiconductor substrate in cross section gradually becomes tapered near the end of the etching stop film, and as etching progresses, the (111) plane is exposed at this tapered portion. .

At this time, the semiconductor substrate is heated only by the plasma. In this state, (11
Since the etching rate of the (1) plane is sufficiently slower than the etching rate of the (100) plane, the etching does not proceed so much in the portion where the (111) plane is exposed. As a result, the etching shape in cross section of the semiconductor substrate at the end of etching can leave a tapered portion on the upper step side of the step portion between the etched portion and the non-etched portion.

[0008]

According to the above features, since a tapered portion can be left on the upper side of the step portion between the etched portion and the non-etched portion on the semiconductor substrate, a thin layer is laminated on the step portion. In this case, it has been possible to prevent the breakage of the layer at the end portion on the upper stage side, which is a particular problem in the case of carrying out, and to provide a dry etching method capable of improving step coverage.

[0009]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A semiconductor substrate S shown in FIG. 1 showing the embodiment of the present invention and FIG.
In addition, a case where a stripe-shaped etching groove is formed by using the reactive ion etching apparatus R whose schematic configuration is shown in FIG. 5 will be described as an example. The reactive ion etching apparatus R shown in FIG. 5 includes a container 21 forming an etching chamber 20.
And a high frequency power supply 22 for supplying high frequency power to the etching chamber 20. The etching chamber 20 is provided with a sample table 23 on which a semiconductor substrate S to be etched is mounted, and a ground shield 24 provided so as to surround a part of the sample table 23 excluding a sample mounting surface 23a. . The inner wall of the container 21 and the sample stage 23 also serve as an electrode for supplying high-frequency power from the high-frequency power source 22 into the etching chamber 20, and the inner wall of the container 21 serves as an anode and the sample stage 2 is used.
3 respectively act as a cathode. Further, a gas introduction port 2 for introducing a reactive gas for etching is provided on the peripheral wall of the container 21.
1a and an exhaust port 21b for exhausting the inside of the container 21 with a vacuum pump (not shown) are provided.

Hereinafter, a process of dry etching the semiconductor substrate S shown in FIGS. 1 and 2 will be described step by step. On the p-type GaAs layer 2 of the semiconductor substrate S including the n-type GaAs single crystal substrate 1 and the p-type GaAs layer 2 laminated on the n-type GaAs single crystal substrate 1, as shown in FIG. Is laminated in a state where the SiO ₂ film 3 is removed in a stripe shape. SiO ₂ on the p-type GaAs layer ₂
The portion where the film 3 is laminated becomes the non-etched portion U which is left without etching. surface obtained by laminating SiO ₂ film 3 of p-type GaAs layer 2 is a (100) plane, in the portion excluding the SiO ₂ film 3 in stripes of p-type GaAs layer 2 (10
0) surface is exposed.

As shown in the cross-sectional view of FIG. 2, the SiO ₂ film 3 has a tapered shape so as to sandwich the end portion thereof, that is, the portion excluding the striped portion, as shown in the sectional view of FIG. ing. This shape is formed by a photolithography technique and an isotropic etching method such as chemical etching. Next, the semiconductor substrate S having the SiO ₂ film 3 laminated thereon is placed on the sample stage 23 of the reactive ion etching apparatus R with the SiO ₂ film 3 side facing up. In this state, the reactive gas is introduced into the etching chamber 20 through the gas inlet 21a. As the reactive gas, Cl ₂ and CCl are used for etching the GaAs layer of this embodiment.
₄ , CCl ₂ F ₂ , CCl ₄ / H ₂ , or a mixed gas of these and a rare gas such as Ar may be used, but for etching other crystalline materials, a reactive gas corresponding to the material may be used. Just select it.

When the reactive gas is introduced into the etching chamber 20 up to a predetermined pressure, the high frequency power source 22 is introduced into the etching chamber 20.
Supply high frequency power from. As a result, the etching chamber 2
The reactive gas in 0 becomes a plasma state due to discharge. The semiconductor substrate S is etched by this plasma. At this time, the semiconductor substrate S is not heated by a heater or the like, but is heated only by heating the plasma. In the semiconductor substrate S, the portion exposed from the SiO ₂ film 3 is etched and the SiO ₂ film 3 is removed.
Is gradually etched. Since the SiO ₂ film 3 is tapered so that the layer thickness becomes thinner toward the tip as described above, the tip gradually recedes by being etched, and the exposed p The surface of the type GaAs layer 2 is also etched.

Therefore, as shown in FIG. 3, the shape shown by the dotted line B before the etching is changed to the p-type GaAs layer 2 as shown in FIG.
Of the p-type GaA film due to the simultaneous progress of the etching in the depth direction of the film and the receding of the tip portion of the SiO ₂ film 3.
The shape of the portion where the s layer 2 is etched is such that the shoulder portion 2a of the stripe-shaped etching groove T changes into a tapered shape.

When the (111) plane is exposed on the tapered shoulder portion 2a, the etching rate of the (111) plane becomes equal to that of the (100) plane when the semiconductor substrate S is heated only by heating the plasma. Since it is sufficiently slow, the exposed (111) plane is hardly etched, while the bottom surface of the etching groove T, which is the (100) plane, is etched. As a result, as shown in the cross-sectional view after the etching shown in FIG. 4, the shoulder portion 2a of the etching groove T has a tapered portion formed of the (111) plane. Incidentally, FIG. 4 shows a state after the SiO ₂ film 3 is removed.

[Other Embodiments] Other embodiments will be listed below. In the above embodiment, the reactive ion etching apparatus is used for dry etching the semiconductor substrate S, but another dry etching apparatus such as a RIBE apparatus may be used.

In the above embodiments, the semiconductor substrate S is described by exemplifying the GaAs material, but other materials such as InP may be used.

In the above embodiment, the SiO ₂ film 3 is used as the etching stopper film, but other materials such as photoresist may be used.

It should be noted that although reference numerals are given in the claims for convenience of comparison with the drawings, the present invention is not limited to the structures of the accompanying drawings by the entry.

[Brief description of drawings]

FIG. 1 is a plan view of a semiconductor substrate according to an embodiment of the present invention.

FIG. 2 is a sectional view of a semiconductor substrate according to an example of the present invention.

FIG. 3 is a sectional view showing a state during etching according to the embodiment of the present invention.

FIG. 4 is a sectional view showing a state after etching according to the embodiment of the present invention.

FIG. 5 is a schematic configuration diagram of a reactive ion etching apparatus according to an embodiment of the present invention.

[Explanation of symbols]

 3 Etching stop film S Semiconductor substrate U Non-etching part

Claims (1)

[Claims] 1. A semiconductor substrate (S) on a (100) plane,
The etching stopper film (3) covering the non-etched portion (U) of the semiconductor substrate (S) is formed in a tapered shape so that the layer thickness at the end portion becomes thinner toward the tip, and the semiconductor substrate (S) A method for dry-etching a semiconductor substrate, wherein the semiconductor substrate is heated in a reactive gas atmosphere while being heated only by etching plasma.