JPH06236332A - Program loading device - Google Patents

Abstract

PURPOSE:To provide the program loading device which switch all terminals to a new program at the time on the specified day and puts them in operation, and also copes with emergency abnormality occurring to a terminal side. CONSTITUTION:A terminal device is equipped with a 1st memory 4 which stores an in-use program, a 2nd memory 5 which stores the new program, a timer circuit 10 which outputs current date information, an interface circuit 6 for data sent and received to and from a center device, a DMA control circuit 2 and a memory control circuit 3 which perform 1st memory control for transferring the received new program to the 2nd memory 5 and 2nd memory control for transferring the new program from the 2nd memory 5 to the 1st memory 4 in response to program switching indication, a monitor input circuit 8, a control output circuit 9, and a CPU 1 which performs various control such as the program switching indication; and the center device is equipped with a program transmitting means, an indication information generating and sending means, a transmission interruption control means, and a transmission restart control means.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device for loading a program from a center device to a terminal device by transmitting and receiving information between the center device and the terminal device via a communication path.

[0002]

2. Description of the Related Art FIG. 4 is a diagram showing an example of connection between a center device and a plurality of terminal devices. In the example of FIG. 4, a single center device 101 and a plurality of n terminal devices 103 or 103
Each A is connected by a public communication circuit network 104 via its own modulation / demodulation device 102, and can send and receive information to and from each other. Conventionally, when a program is loaded from a center device to a plurality of terminal devices at remote locations, information is transmitted and received via a communication path connected as shown in FIG.

FIG. 5 is a block diagram showing the structure of a conventional terminal device. In FIG. 5, the terminal device 103A is a central processing unit (hereinafter referred to as CPU).
1, a direct access control circuit (hereinafter referred to as a DMA control circuit) 2, a memory control circuit 3A, a memory 4A and an interface circuit 6, and the CPU 1 and other devices are connected to each other via an address bus and a data bus 7. ing. The DMA control circuit 2 is a circuit for directly accessing the memory 4A without passing through the CPU 1 when a head address and byte length data are set.

The memory control circuit 3A shown in FIG. 5 is a circuit for controlling data writing and reading operations with respect to the memory 4A based on commands from the CPU 1 and the DMA control circuit 2. The interface circuit 6 uses the communication path of FIG. 4 via the modulation / demodulation device (generally called a modem) 102.
This is a circuit that is connected to the center device 101 and that transmits / receives data between the terminal device 103A and the center device 101. FIG. 6 is an explanatory diagram of a conventional program loading sequence.

The loading operation of the program in FIGS. 4 and 5 will be described with reference to FIG. The center device 101 in FIG. 4 and each of the plurality of terminal devices 103A are connected to each other via a public communication circuit network 104 via their own modulation / demodulation devices 102. Here, the loading of the program from the center device 101 to each terminal device 103A is performed for each of a plurality (N) of blocks as shown in FIG. First, the center device 101 transmits, as a program load instruction signal, the start address and byte length data to be stored in the memory 4A for each block of the program to the terminal device 103A which loads the program.

The terminal device 103A sets the data of the start address and byte length indicated by the program load instruction signal, which is received from the center device 101 through the interface circuit 6, in the DMA control circuit 2 and the memory 4
Prepare the direct access operation to A
A program transmission request signal is transmitted to 01. Upon receiving the program transmission request signal from the terminal device 103A, the center device 101 transfers the first block (block 0) of the program to the terminal device 103A.

DMA control circuit 2 in the terminal device 103A
Drives the memory control circuit 3A to sequentially write and store the data for each block received from the center device 101 via the interface circuit 6 in the memory 4A by the byte length from the designated start address. And 1
At the end of the transfer of the program for the block, the center device 101 transmits a termination instruction signal to the terminal device 103A, and the terminal device 103A transmits a termination completion signal.
When it is returned to 1, the transfer operation of the program for one block is completed.

Similarly, the center device 101 sequentially transmits the program load instruction signal, receives the program transmission request signal, and receives the program transmission request signal for a plurality of program blocks.
The sequence operation of transferring the program block, transmitting the termination instruction signal and receiving the termination completion signal is repeated for each block to complete the program loading for one terminal device 103A.

The center device 101 includes a plurality of terminal devices 1
For 03A, by repeating the program loading for each block unit, for example, first the terminal device 1
03A complete program loading, then # 2
All terminal devices 103A that need to be loaded in order, such as for all terminal devices 103A.
Program loading to. Then, the terminal device 103A, which has completed the loading of this program, will immediately start the operation based on the data of the new program when the loading is completed.

[0010]

However, in the program loading device having the above-described structure, while the center device is loading the program to the terminal device, the terminal device cannot operate until the loading operation is completed. Therefore, even if an emergency occurs on the terminal device side during the loading, it is not possible to transmit the emergency error signal to the center device until the loading operation is completed. Thus, there is a problem that it is not possible to immediately respond to an emergency. Further, the programs are sequentially loaded to a plurality of terminal devices, and the new programs are started in order from the terminal devices that have completed loading. Therefore, the terminal device operated by the new program and the terminal operated by the old program There will be a device and. Therefore, there is a problem in that the start date and time of the new program cannot be specified in advance, and all the terminal devices cannot be switched to the new program and operated at the specified date and time. This problem is further
This includes a drawback that the center device side cannot confirm whether the terminal device which has completed loading the new program is actually operated by the new program.

The present invention has been made to solve the above problems, and enables an emergency abnormal signal to be transmitted from the terminal device to the center device even while the program is being loaded from the center device to all the terminals. An object of the present invention is to obtain a program loading device capable of simultaneously switching to a new program at a designated date and time and enabling the center device to confirm that the terminal device has actually started operation with the new program. And

[0012]

A program loading device according to the invention of claim 1 transmits / receives information between a center device and a terminal device through a communication path, so that the center device transfers to the terminal device. In a device for loading a program, the center device includes a program transmitting means for transmitting a plurality of blocks of a new program to the terminal device for each block, a start date and time of the new program to be transmitted, and a storage area of each program block. A first information storage unit for generating instruction information to instruct and transmitting the instruction information to the terminal device, wherein the terminal device stores instruction information of a plurality of blocks currently operated and the instruction information of the new program; A memory means and a plurality of blocks of new programs to be operated after the instructed start date and time are stored. The second memory means and the instruction information of the new program received from the center device are stored in the first memory means, and the new programs of a plurality of blocks similarly received from the center device are stored in accordance with the instruction information of the storage area. A first memory control means for sequentially storing in the second memory means, a clock means for constantly counting time and outputting current date and time information, and a start date and time of a new program stored in the first memory means And the current date and time information output by the clock means, and when the two pieces of information match, the program switching control means for outputting a switching instruction to the new program and the switching instruction to the new program Based on this, the new programs of a plurality of blocks stored in the second memory means are sequentially transferred to the first memory means according to the instruction information of the storage area. It is obtained by a second memory control means for storing Te.

According to a second aspect of the present invention, there is provided a program loading device according to the first aspect of the present invention, wherein the terminal device of the program loading device according to the first aspect is the second memory control means. When the transfer and storage of the new program is completed and the operation of the new program is started, the operation start information transmitting means for transmitting the operation start information corresponding to the program to the center device is added.

A program loading device according to a third aspect of the present invention is the program loading device according to the first or second aspect of the invention, wherein the program transmission means has a plurality of blocks of a new program in the center device. During transmission, when an occurrence of an emergency abnormality at the installation location of the terminal device is detected or when the terminal device notifies, at the end of transmission of the program block that is currently being transmitted, the program transmitting means causes the subsequent program Transmission interruption control means for temporarily interrupting the transmission of the block,
The transmission of the program is temporarily suspended, and the center device
After transmitting the response signal to the notification of the occurrence of the emergency abnormality to the terminal device, or after transmitting the instruction information of the emergency control output based on the detection of the occurrence of the emergency abnormality to the terminal device and receiving the response signal, the program transmission Means for adding transmission restart control means for restarting the transmission of the program block after the temporary interruption, the terminal device, while receiving a new program of a plurality of blocks from the center device,
When a detection signal of the occurrence of an emergency abnormality at the terminal device installation location is input, an emergency abnormality reporting means for transmitting an emergency abnormality signal to the center device to report when the reception of the program block currently being received ends, and the center device When the transmitted instruction information of the emergency control output is received, the control signal output means for immediately outputting the emergency control signal according to the instruction information to the control device at the installation location of the terminal device is added.

[0015]

According to the first aspect of the invention, in the device for loading the program from the center device to the terminal device by transmitting and receiving information between the center device and the terminal device through the communication path, The device includes
The program transmission means and instruction information generation / transmission means are provided, the program transmission means transmits a plurality of blocks of the new program to the terminal device, and the instruction information generation / transmission means starts the new program to be transmitted. And generating instruction information for instructing the storage area of each program block and transmitting the instruction information to the terminal device. The terminal device includes first memory means, second memory means, first memory control means, clock means, program switching control means and second memory control means, and the first memory means It stores the program of a plurality of blocks currently operated and the instruction information of the new program. The second memory means stores a plurality of blocks of new programs to be operated after the instructed start date and time. The first memory control means stores the instruction information of the new program received from the center apparatus in the first memory means, and also stores the instruction information of the plurality of blocks similarly received from the center apparatus in the instruction information of the storage area. In accordance with this, the second memory means is sequentially stored. The clock means always counts time and outputs current date and time information. The program switching control means is the first
The instruction information of the start date and time of the new program stored in the memory means is compared with the current date and time information output by the clock means, and when both pieces of information match, a switching instruction to the new program is output. The second memory control means sequentially transfers the new programs of a plurality of blocks stored in the second memory means to the first memory means according to the instruction information of the storage area based on the switching instruction to the new program. And memorize.

In the invention according to claim 2, an operation start information transmitting means is added to the terminal device of the invention according to claim 1, and the operation start information transmitting means is constituted by the second memory control means. When the transfer and storage of the new program to the first memory means are completed and the operation of the new program is started, operation start information corresponding to the program is transmitted to the center device.

In the invention according to claim 3, in the invention according to claim 1 or 2, transmission interruption control means and transmission restart control means are added to the center device, and the transmission interruption control means is added. When the program transmitting means detects the occurrence of an urgent abnormality at the terminal device installation site while the program transmitting means is transmitting a new program of a plurality of blocks, or is notified by the terminal device, the program block currently being transmitted is transmitted. At the end point, the program transmission means temporarily suspends the transmission of the subsequent program blocks. The transmission restart control means instructs the emergency control output after the transmission of the program is suspended and the center device transmits a response signal to the notification of the occurrence of the emergency abnormality to the terminal device, or based on the detection of the occurrence of the emergency abnormality. After transmitting the information to the terminal device and receiving the response signal, the program transmission means restarts the transmission of the program block after the temporary interruption. An emergency abnormality reporting means and a control signal output means are added to the terminal device, and the emergency abnormality reporting means detects the occurrence of an emergency abnormality at a terminal device installation site while receiving a new program of a plurality of blocks from the center device. When a signal is input, an emergency abnormality signal is transmitted to the center device to notify it when the reception of the program block currently being received is completed. When the control signal output means receives the instruction information of the emergency control output transmitted by the center device, the control signal output means immediately outputs the emergency control signal based on the instruction information to the control device at the terminal device installation place.

[0018]

1 is a block diagram showing the configuration of a terminal device according to the present invention. In the figure, 1 is a CPU, 2 is a DM
A control circuit, 3 is a memory control circuit, 4 is a first memory, 5
Is a second memory, 6 is an interface circuit, 7 is an address bus and a data bus, 8 is a monitor input circuit, 9 is a control output circuit, and 10 is a clock circuit. Here, the CPU 1 and each of the above devices 2 to 6 and 8 to 10 are connected to each other via an address bus and a data bus 7, and the terminal device 103 according to the present invention is configured. CPU1 in the terminal device 103
Controls all of the devices connected via the address bus and the data bus 7. However, when the data for designating the memory area is set by the CPU 1, the DMA control circuit 2 will perform direct memory access thereafter. Invokes the action.

Further, the CPU 1 in the terminal device 103 has the first memory control, the second memory control, the switching control to the new program, and the operation according to the present invention, in addition to the control related to the program operation of the conventional operation. Various controls such as start information transmission control, emergency abnormality notification control, and control signal output control are performed, and a detailed description of these control operations will be given later. The terminal device 103 and the center device 101 configured as shown in FIG. 1 are connected by a public communication circuit network 104 via respective modulation / demodulation devices 102, as shown in FIG. Can send and receive.

The CPU 1, the DMA control circuit 2, the interface circuit 6 and the address bus and data bus 7 shown in FIG.
Is the same as in FIG. The first memory 4 and the second memory 5 are composed of, for example, an EEPROM (electrically erasable and rewritable program ROM) or a RAM backed up by a battery, and have substantially the same memory capacity. Therefore, even if the power of the terminal device 103 is turned off, the stored data is saved. The first memory 4 mainly stores a plurality of blocks of programs currently in operation and instruction information of a new program (information indicating the start date and time of the new program and the storage area of each program block). Further, the second memory 5 mainly stores a plurality of blocks of new programs to be operated after the instructed start date and time.

The memory control circuit 3 includes a CPU 1 and a DMA.
Based on commands from the control circuit 2, writing and reading of data to and from the first memory 4 and the second memory 5 are controlled. The DMA control circuit 2 is instructed by the CPU 1 to
Using the set start address and byte length data,
The first memory control operation for driving the memory control circuit 3 to store the instruction information of the new program received from the center device 101 in the first memory 4, and the new program in the second memory 5, respectively. The new program stored in the second memory 5 is first
A second memory control operation for sequentially transferring and storing the data in the memory 4 is executed.

The monitoring input circuit 8 constantly monitors the input of an emergency abnormality signal such as a fire occurrence or a gas leak detected by a monitoring device, for example, a fire detection device or a gas leak detection device in the installation place of the terminal device 103, and Immediately after the emergency abnormality signal is input, the CPU 1 is notified by an interrupt operation. When the control output circuit 9 is supplied with the emergency control signal instructed to be output from the CPU 1, the control output circuit 9 immediately outputs the emergency control signal to a control device, an alarm display device, or the like in the installation place of the terminal device 103.

As the emergency control signal, for example, when a large earthquake occurs in a certain area and there is a risk of fire, the center device 101 transmits the gas at each installation location via each terminal device in the area. Emergency control signal such as outputting an emergency control signal to close the main valve to the automatic opening / closing device of the main valve, or causing the alarm display to immediately close the gas main valve and open the shutter to display an alarm indicating ventilation. Is to output a signal. The clock circuit 10 always outputs the current date and time information (information including date and time), and C
PU1 uses this date and time information for collation with the start date and time of the new program specified in advance. Therefore, clock circuit 1
The power source of 0 is also backed up by the battery so that the correct date and time information can always be obtained.

FIG. 2 is an explanatory diagram of a first sequence of program loading according to the present invention, and FIG. 3 is an explanatory diagram of a second sequence of program loading according to the present invention. Figure 2
The loading operation of the new program in FIGS. 1 and 4 will be described first with reference to FIGS. First, the center device 101 stores block data in the first memory 4 or the second memory 5 for each block of the new program as a program load instruction signal for the terminal device 103 that wants to load the new program. Send the start address and byte length data.

Only in the first block of a plurality of blocks, that is, in (block 0) of FIGS. 2 and 3, the program load instruction signal includes, in addition to the start address and byte length data, the start of a new program. The date and time data is added and transmitted to the terminal device 103. The interface circuit 6 in the terminal device 103 notifies the program load instruction signal received from the center device 101 to the CPU 1, and the CPU 1 uses the start address when storing the block data in the first memory 4 or the second memory 5. Byte length data is added, and only in the case of (block 0), data of the start date and time is further added and stored at a predetermined address in the first memory 4, and the monitoring input circuit 8 from the monitoring device on the terminal device side is stored. The presence or absence of an input signal is read to determine whether the program cannot be loaded or not at that time.

When there is no input signal to the monitor input circuit 8 and the CPU 1 in the terminal device 103 determines that the program can be loaded at that time, a program transmission request is sent to the center device 101 via the interface circuit 6. Send a signal. The center device 101 is a terminal device 103.
When the program transmission request signal is received from, the program for one block is transferred to the corresponding terminal device 103. The DMA control circuit 2 in the terminal device 103 sequentially transfers the program for one block received via the interface circuit 6 to the second memory 5 by the designated byte length from the head address designated by the CPU 1. Remember.

When the transfer of the program for one block is completed, the center device 101 transmits a termination instruction signal to the terminal device 103, and when the termination signal is returned from the terminal device 103 to the center device 101, the one block is completed. The program transfer ends. Similarly, the center device 101
For a plurality of program blocks, the sequence operation of sequentially transmitting the program load instruction signal, receiving the program transmission request signal, transferring the program block, transmitting the termination instruction signal and receiving the termination completion signal is repeated for each block, The program loading for one terminal device 103 is completed.

In the first sequence explanatory diagram of FIG. 2,
The center apparatus 101 sequentially loads the program for each block unit on the designated terminal apparatus 103 in the order of (block 0), (block 1), ... Now loading the program of (block M). 8 shows an example of a sequence in the case where an abnormal signal requiring an emergency (for example, the fire occurrence signal) is input to the monitoring input circuit 8 in the terminal device 103.

The emergency abnormality signal input to the monitor input circuit 8 in the terminal device 103 is immediately notified to the CPU 1.
Then, the CPU 1 notified of the input of the emergency abnormality signal
When the transfer of the currently received (block M) program is completed and the termination instruction signal transmitted from the sensor device 101 is received, the storage of the program in the second memory 5 is temporarily interrupted, and Using the conventional program stored in the first memory 4, the emergency abnormality signal is transmitted to the center device 101, and this is notified. That is, if an emergency abnormality occurs at the time of receiving the termination instruction signal,
An urgent abnormal signal is transmitted instead of the termination completion signal in normal times.

When the center device 101 receives the emergency abnormality signal from the terminal device 103, the center device 101 confirms the content of the emergency abnormality signal,
The response signal is returned to the corresponding terminal device 103. Terminal device 1
When 03 receives the response signal to the transmission of the emergency abnormal signal, it transmits the termination completion signal of the above (block M) to the center device 101 to inform that the program loading may be restarted.

The center device 101 has the above-mentioned (block M).
When the closing completion signal for is received, the next (block M
The sequence for restarting the program loading from +1) is executed as shown on the right side of FIG. Then, when the termination completion signal for the program of the final block (block N) is received from the terminal device 103, all the program loading to the corresponding terminal device 103 is completed.

In the second sequence explanatory view of FIG. 3,
The center apparatus 101 sequentially loads the program for each block unit on the designated terminal apparatus 103 in the order of (block 0), (block 1), ... Now loading the program of (block M). In addition, a sequence example in the case where an emergency situation in which an emergency control signal (for example, an automatic control signal for closing the gas tap) is to be output from the center device 101 via the control output circuit 9 in the corresponding terminal device 103 Is shown.

If an emergency situation in which the emergency control signal should be output via the terminal device 103 while the program (block M) is being loaded into the terminal device 103 having the center device 101 is presently transmitted, When the transfer of (block M) in the middle is completed, the program loading from the center device 101 to the terminal device 103 is temporarily interrupted, and an emergency control output instruction signal is transmitted to the corresponding terminal device 103 instead of the termination instruction signal. .

When the CPU 1 in the terminal device 103 is notified by the interface circuit 6 that the emergency control output instruction signal from the center device 101 has been received, it immediately uses the conventional program stored in the first memory 4. Then, the emergency control signal instructed to output is output through the control output circuit 9 and a response signal is transmitted to the center device 101. Upon receiving the response signal to the transmitted emergency control output instruction signal, the center apparatus 101 transmits a termination instruction signal for the program of (block M) to the terminal apparatus 103, and when receiving the termination completion signal from the terminal apparatus 103, The sequence for restarting the program loading from (block M + 1) is executed as shown on the right side of FIG. And the final block (block N)
When the termination completion signal for the program is received from the terminal device 103, all the program loading for the corresponding terminal device 103 is completed.

Next, a description will be given of the operation in which all the terminal devices 103 simultaneously start the operation by the new program at the starting date and time of the new program designated by the program load instruction signal of (block 0) of the new program. The CPU 1 in each terminal device 103 constantly checks whether the data of the start date and time of the new program stored in the first memory 4 and the data of the date and time output by the clock circuit 10 match, and when both data match. Then, the switch command to the new program is output, and the start address and byte length data for each program block stored in the first memory 4 are sequentially set in the DMA control circuit 2 in block units.

The DMA control circuit 2 follows the start address and byte length data set for each block unit.
The memory control circuit 3 is driven, the data of the new program is read from the second memory 5 in block units, and sequentially written in the first memory 4. The direct access transfer operation is repeated until all the new programs of N blocks stored in the second memory 5 are transferred to and written in the first memory 4.
When the DMA control circuit 2 completes the transfer of N blocks of data from the second memory 5 to the first memory 4, C
An interrupt operation is performed on PU1 to notify the completion of the direct access transfer operation for the data of the new program.

The CPU 1 in each terminal device 103 uses the DMA
When the completion of the direct access transfer operation is notified from the control circuit 2, the start of the new program stored in the first memory 4 is started, and the following initial operation is first performed. As an initial operation of the new program, the CPU 1 transmits specific operation start information corresponding to each program to the center device 101 via the interface circuit 6.

When the program operated according to the lapse of the period is updated to A, B, C, D, if the corresponding operation start information is determined to be a, b, c, d, this operation start information The contents of the program that has actually started to be received will be understood. As an initial operation of the new program, each terminal device 103 immediately starts operation by the new program after transmitting operation start information corresponding to the new program.

The center device 101 comprises a plurality of terminal devices 1
For 03, loading of the new program and setting of its start date and time are set in advance. Then, when each terminal device 103 reaches the activation date and time, it switches to a new program all at once to start operation, and the operation start information is sent to the center device 1
01, the center device 101 can confirm the actual operation start of the new program and the contents of the operation program at the same time by receiving the operation start information for each terminal device 103. it can.

[0040]

As described above, according to the present invention, in a device for loading a program from a center device to a terminal device by transmitting and receiving information between the center device and the terminal device via a communication path, In the terminal device,
The currently operating program is stored in the first memory means,
The program to be operated after the start date and time designated by the center device is loaded into the second memory means, and when the date and time information output by the clock means matches the designated start date and time information, the second memory means Since the stored contents of (1) are transferred to the first memory means to operate the new program, the operation of the new program can be started by all the terminal devices at the date and time designated in advance by the center device.

Further, according to the present invention, each of the terminal devices comprises:
When the operation of the new program is started at the specified date and time, the operation start information corresponding to the program is transmitted to the center device, respectively.
It is possible to confirm that each terminal device has actually started operating with the new program.

Further, according to the present invention, the center device is provided with a transmission interruption control means and a transmission restart control means, and each of the terminal devices is provided with an emergency abnormality notification means and a control signal output means, and the center device is a terminal. The emergency abnormality signal detected by the terminal device while transmitting the program to the device can notify the center device of this when the reception of the program block currently being received is completed. Can be temporarily suspended, the process corresponding to the emergency abnormality can be performed, and then the transmission of the program can be resumed. When the center device detects an emergency while transmitting a program to the terminal device, it suspends the program transmission and instructs the terminal device to output an emergency control signal at the end of transmission of the program block currently being transmitted. , Then the program transmission can be resumed. In this way, the emergency response was immediately available.

[Brief description of drawings]

FIG. 1 is a block diagram showing a configuration of a terminal device according to the present invention.

FIG. 2 is an explanatory diagram of a first sequence of program loading according to the present invention.

FIG. 3 is a diagram illustrating a second sequence of program loading according to the present invention.

FIG. 4 is a diagram showing an example of connection between a center device and a plurality of terminal devices.

FIG. 5 is a block diagram showing a configuration of a conventional terminal device.

FIG. 6 is an explanatory diagram of a conventional program loading sequence.

[Explanation of symbols]

 1 CPU 2 DMA control circuit 3 Memory control circuit 4 First memory 5 Second memory 6 Interface circuit 7 Address bus and data bus 8 Monitoring input circuit 9 Control output circuit 10 Clock circuit 101 Center device 102 Modem device 103 Terminal device 104 Public communication Circuit network

Claims (3)

[Claims] 1. A device for loading a program from a center device to a terminal device by transmitting and receiving information between the center device and the terminal device via a communication path, wherein the center device has a plurality of new blocks. Program transmitting means for transmitting a program to the terminal device for each block, and instruction information generation for generating instruction information for instructing a start date and time of the new program to be transmitted and a storage area of each program block and transmitting the instruction information to the terminal device A first memory means for storing a program of a plurality of blocks currently operated and instruction information of the new program, and a plurality of blocks to be operated after the instructed start date and time Second memory means for storing the new program, and a finger for the new program received from the center device. First memory control in which information is stored in the first memory means and a plurality of blocks of new programs similarly received from the center device are sequentially stored in the second memory means according to the instruction information of the storage area. Means, clock means for constantly counting time and outputting current date and time information, instruction information for starting date and time of the new program stored in the first memory means, and current date and time information output by the clock means And a program switching control means for outputting a switching command to a new program when both information match, and a new program of a plurality of blocks stored in the second memory means based on the switching command to the new program. In accordance with the instruction information of the storage area, the second memory control means for sequentially transferring and storing the data in the first memory means. Program loading device. 2. The terminal device, when the second memory control means completes transfer and storage of a new program to the first memory means and starts operation of the new program, 2. The program loading device according to claim 1, further comprising operation start information transmitting means for transmitting operation start information corresponding to a program to the center device. 3. The center device detects, when the program transmission means is transmitting a new program of a plurality of blocks, occurrence of an urgent abnormality at the installation location of the terminal device or when the terminal device reports to the center device. , At the end of transmission of the program block currently being transmitted, the program transmission means, transmission interruption control means for temporarily interrupting the transmission of the subsequent program block, the transmission of the program is temporarily interrupted, the center device,
After transmitting the response signal to the notification of the occurrence of the emergency abnormality to the terminal device, or after transmitting the instruction information of the emergency control output based on the detection of the occurrence of the emergency abnormality to the terminal device and receiving the response signal, the program transmission Means for restarting transmission of the program block after the temporary interruption is added to the terminal device, and the terminal device is installed in the terminal device installation place while receiving a new program of a plurality of blocks from the center device. When a detection signal of occurrence of an emergency abnormality is input, an emergency abnormality notification means for transmitting an emergency abnormality signal to the center device to notify when the reception of the program block currently being received ends, and an emergency control output transmitted by the center device. When receiving the instruction information of, the emergency control signal according to the instruction information is immediately output to the control device at the terminal device installation place. Program loading apparatus according to claim 1 or claim 2, wherein the added and control signal output means.