JPH06237241A - Correlator synchronous control system and its device - Google Patents

Abstract

(57) [Summary] [Purpose] To enable stable synchronous control in a correlator used in a spectrum communication system without being affected by voltage fluctuations or operating environment. An M-sequence code generation unit 5 for generating at least three types of M-sequence codes of phase lead, phase middle and phase delay
, And the state of coincidence of each bit of the spread spectrum modulated received signal and these M sequence codes is respectively counted, and by comparing the count value from this with each set value, each M having a different phase from the received signal. A plurality of up / down counters 6, 7 and 8 for obtaining a correlation output signal by obtaining a correlation with a sequence code, and an M sequence generated by an M sequence code generator based on the correlation output signals from these up / down counters. The control unit 1 performs control so that the phase of the code is changed and synchronizes the received signal with the M-sequence code.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a correlator synchronization control system and its apparatus in spread spectrum communication.

[0002]

2. Description of the Related Art In a spread spectrum communication system, for example, the energy of a voice signal is dispersed in a frequency range (MHz order) which is much wider than the original frequency of the signal for transmission. The spectrum-spread signal can be heard only as noise, but the original voice signal can be demodulated on the receiving side by multiplying it by the same spreading code (M sequence code) as on the transmitting side.

As described above, since it is necessary to use the same M-sequence code on the transmitting side and the receiving side, it is possible to maintain the confidentiality of communication.

In such a spread spectrum communication, it is necessary to judge whether or not the spread spectrum signal received by the receiving station is addressed to itself, and to judge it by comparing with the M sequence code of the own station. Is performed using a correlator.

Further, in order to obtain the correlation between the received spread spectrum signal and the M-sequence code, it is necessary for both to be completely synchronized. At the receiving side, an output signal corresponding to the correlation state output from the correlator is used. Compare with the preset value,
The phase of the M-sequence code is controlled so that the correlation output is always greater than or equal to the set value, so that the received spread spectrum signal and the M-sequence code are synchronized.

As a method of such synchronization control, for example, the method described in Japanese Patent Publication No. 3-37334 has been conventionally known.

According to this synchronization control method, the phase of the received data, which has been spread spectrum modulated, is shifted back and forth.
One M-sequence code is prepared for correlation. First, the correlation state between the received data and the M-sequence code of the intermediate phase is checked, and if the correlation level is below a preset voltage level, the search mode is operated. The phase of the M-sequence code is moved. Then, it operates in the synchronization fine adjustment mode, compares the correlation output levels obtained by the received data and the three M-sequence codes, and changes the phase until the correlation level of the intermediate phase becomes higher than the other two correlation levels. Let When the correlation level of the intermediate phase becomes higher than the other correlation levels, the clock frequency for generating the M-sequence code is locked, assuming that the synchronization state is in full synchronization.

[0008]

However, in the above-mentioned conventional synchronous control method, since the correlation level of the intermediate phase is compared with the preset voltage level in the search mode, voltage fluctuation, temperature rise, etc. However, if the reference voltage level fluctuates, stable synchronization control cannot be performed.

The present invention has been proposed in order to solve the problems of the prior art as described above, and it is possible to perform stable synchronous control without being affected by voltage fluctuations and operating environments. An object of the present invention is to provide a device synchronization control system and its device.

[0010]

In order to achieve this object, a correlator synchronization control system according to the present invention generates at least three kinds of M-sequence codes of a phase lead, a phase middle and a phase lag, and performs spread spectrum modulation. Received signals and these M
The coincidence state of each bit with the sequence code is counted, and the count value and each set value are compared with each other to obtain the correlation between the received signal and each M sequence code having a different phase to obtain the correlation output signal. This is a method of synchronizing the received signal with the M-sequence code by extracting and controlling the phase of the M-sequence code based on these correlation output signals.

In the correlator synchronization control apparatus according to the present invention, at least three types of Ms of phase lead, phase middle and phase delay are provided.
An M-series code generator for generating a sequence code, a plurality of correlators for respectively counting the coincidence state of each bit of the spread spectrum modulation received signal and these M-series codes, and count values from these correlators and each setting By comparing each of the values with each other, a plurality of comparators that respectively obtain the correlation between the received signal and each M-sequence code having a different phase and output the correlation output signals, and based on the correlation output signals from these comparators, The control unit controls the phase of the M-sequence code generated by the M-sequence code generation unit to change, and has a control unit that synchronizes the received signal with the M-sequence code.

The comparator for comparing the correlation output signal in the middle of the phase with the set value is provided with two set values having different values in order to perform the comparison operation with hysteresis.

[0013]

Embodiments of the present invention will now be described in detail with reference to the drawings. FIG. 1 block diagram shows an embodiment of a synchronization control device for realizing the correlator synchronization control method according to the present invention.

In this figure, this synchronization control device is a clock oscillator 2 which supplies a reference clock CK0 to a frequency division control unit 3.
And the reference clock CK0 is divided to generate a clock CK
1 and CK2 are provided, the timing clock CK2 is supplied to the M-sequence code generation unit 4 and the spread spectrum modulation unit 5, and the frequency division control unit 3 for switching the advance / delay of the clocks CK1 and CK2 and the shift register are used. M
Up-down counters 6, 7, and M sequence code generator 4 for generating a sequence code and outputting it to spread spectrum modulator 5 and three types of M sequence codes MS1, MS2, MS3 shown in FIG. 8, the coincidence state between the spread spectrum modulation section 5 output to 8 and the spectrum modulation reception data and each M sequence code whose phase is before and after is respectively counted and compared with a set value, and a correlation output signal is sent to the control section 1. A control signal for discriminating the phase states of the received data and the M-sequence code from the three up-down counters 6, 7, and 8 and the three input correlation output signals and for advancing or delaying the phase of the M-sequence code. And a control unit 1 for outputting to the frequency division control unit 3. The clock CK1 serves as a reference clock for the spread spectrum modulator 5 and each up / down counter 6, 7, 8.

Next, the operation of the correlator synchronization control device thus constructed will be described. A spread spectrum modulation signal (hereinafter, referred to as a received signal) received from the transmission line once enters the coat roll unit 1 and is transmitted from the M sequence code generation unit 4 every 31 periods of M sequence code (every repetition period). 3 in synchronization with control timing clock CK3
It is supplied to each of the up / down counters 6, 7 and 8. In these up / down counters 6, 7 and 8 configured as correlators and comparators, the received signal and the M sequence codes MS1, MS2 and MS3 of the advanced, intermediate and delayed phases sent from the spread spectrum modulator 5 are received. The number of matched bits is counted by a positive number, the number of mismatched bits is counted by a negative number, and the absolute value of the count value is compared with the set value. Here, the phase advance up / down counter 6 compares the absolute value of the count value with the set value E, and outputs a lead correlation output signal to the control unit 1 when the set value E is exceeded. The phase delay up / down counter 8 compares the absolute value of the count value with the set value L, and outputs a delayed correlation output signal to the control unit 1 when the set value L is exceeded. On the other hand, the intermediate phase up / down counter 7 performs the comparison with the hysteresis by the two set values M1 and M2. That is, in the search state, if the degree of correlation between the received signal and the M-sequence code MS2 is not high, the correlation signal is not output. Set value M1, M so that it is output to 1
2 has been decided. The correlation output signal in each of the up / down counters 6, 7 and 8 is usually "L" (low,
The same applies hereinafter), and becomes "H" (high, the same applies below) when the count value exceeds the set value.

The control unit 1 determines a control signal to be sent to the frequency division control unit 3 based on the input correlation output signals based on the logic table of FIG. That is, when both the phase intermediate correlation output signal and the phase lag correlation output signal are "H" and it is determined that the phase of the M-sequence code is delayed, the phase intermediate correlation output signal is "L", and the phase advances. When it is determined that none of the three phases, that is, the intermediate phase and the delayed phase, is synchronized, the phase advance signal for advancing the phase of the M-sequence code is set to “H” and output to the frequency division control unit 3. On the other hand, when both the phase-leading correlation output signal and the phase-middle correlation output signal are "H" and it is determined that the phase of the M-sequence code is leading, the phase-lagging signal for delaying the phase of the M-sequence code is "H". , And output to the frequency division control unit 3.
Further, when the phase intermediate correlation output signal is “H” and the states of the phase lead correlation output signal and the phase delay correlation output signal are the same, in order to hold the phase of the M-sequence code, Divide control section 3 by setting send signal to "H"
Output to.

In the frequency division control unit 3, the frequency division of the clocks CK1 and CK2 is varied based on the input phase lead signal or phase delay signal based on the logic table of FIG. Control. That is, when the phase delay signal is "L", the frequency division is controlled to be shortened, and when the phase delay signal is "H", the frequency division is controlled to be extended. Further, when both the phase lead signal and the phase delay signal are "H" and the control timing clock CK3 is "L", the frequency division state does not change. In addition, in FIGS. 3 and 4, the mark “X” indicates that the signal state may be “H” or “L”. This allows
The phases of the received signal and the M-sequence code can be perfectly matched.

If a part of the received signal is missing due to noise, it is possible to achieve synchronization by varying the set value serving as a comparison reference according to the state of the transmission line. Further, the data can be demodulated even if the synchronization is slightly deviated.

Each up / down counter 6, 7, 8
Are reset by the control timing clock CK3 every 31 cycles of the M-sequence code, and are always counted from ± 0. The up command or the down command in the counting operation is generated from the received signal, the M-sequence code, and the ± flag signal.

The ± flag signal indicates whether the counted value is positive or negative, and this flag itself is the same as that demodulated by spread spectrum modulation. This is further controlled by the NRZI (No Retur
The original data can be reproduced by demodulating with n to Zero Inverted).

[0021] Here, the reason for transmitting and receiving in NRZI is as follows.
It can be mentioned that after the NRZI modulation, the property that the same waveform can be obtained after demodulation even if the signal is inverted or not.

When performing spread spectrum communication on a transmission line such as a power line, it is necessary to further bi-phase the transmission data.

[0023]

As described above, according to the present invention, the correlation state between the received signal and the M-sequence code is detected as a counter value, and this counter value is compared with a reference value set in advance to obtain a reception value. Since the phase relationship between the signal and the M-sequence code is determined, unlike the conventional case where the phase relationship between the received signal and the M-sequence code is determined by comparing the correlation output level and the reference voltage level, the voltage fluctuation It is possible to perform more stable synchronization control without being affected by the operating environment.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of a correlator synchronization control device according to the present invention.

FIG. 2 is a waveform diagram showing three M-sequence codes with a phase shift.

FIG. 3 is a logic table showing an operation in a control unit.

FIG. 4 is a logic table showing an operation in a frequency division control unit.

[Explanation of symbols]

 1 control section 2 clock oscillation section 3 frequency division control section 4 M sequence code generation section 5 spectrum expansion modulation section 6, 7, 8 up-down counter

Claims (3)

[Claims] 1. A M-sequence code of at least three types of a phase lead, a middle phase, and a phase lag is generated, and the coincidence state of each bit of the spread spectrum modulation received signal and these M sequence codes is counted, respectively. By comparing the count value with the set value, the correlation between the received signal and each M-sequence code having a different phase is obtained, the correlation output signals are extracted, and the phase of the M-sequence code is controlled based on these correlation output signals. By doing so, the received signal and the M-sequence code are synchronized with each other. 2. An M-series code generator for generating at least three types of M-series codes of a phase lead, a middle phase and a phase lag, a spread spectrum modulation received signal, and a matching state of each bit of these M-series codes. By correlating a plurality of correlators with each other and comparing the count values from these correlators with each set value, the correlation between the received signal and each M-sequence code having a different phase is obtained, and each correlation output signal is output. And a plurality of comparators that perform the control so that the phase of the M-series code generated by the M-series code generator is changed based on the correlation output signals from the comparators. And a correlator synchronization control device 3. A comparator for comparing a correlation output signal in the middle of a phase and a set value is provided with binary set values having different values in order to perform a comparison operation with hysteresis. Item 2. Correlator synchronization control device according to item 2