JPH06296034A - Semiconductor device - Google Patents

Abstract

PURPOSE:To provide a miniaturized semiconductor rectifier, which can be operated at high frequency, at low cost. CONSTITUTION:The third conductive type low impurity density first region 16 is formed on the first conductive type high impurity density substrate 15, a number of rows of the second regions 17 of the second conductive type high impurity density are formed on the position where the surface of the first region 16 is notched a little in such a manner that the depletion layers, spreading in the first region 16, are overlapped each other at intervals and in length and depth. Besides, the third regions 18 of the first conductive type high impurity ensity are formed in the length shorter than the second regions 17 and in the prescribed depth on the surface of the first region 16 between the second region 17, and a metal electrode 19, with which the second regions 17 and the third regions 18 are connected, and the backside metal electrode 20 are formed.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor rectifier, and more particularly to a semiconductor rectifier used for a switching power supply of a power supply unit such as OA equipment and AV equipment.

[0002]

2. Description of the Related Art Conventionally, in a high-frequency PWM inverter used in OA equipment, AV equipment, etc., a high-speed, low-loss, highly reliable semiconductor rectifier is used as a switching element, and a compact, lightweight, highly efficient switching power supply is supplied. Has been done. FIG. 10 is a vertical sectional view showing the structure of a diode having a PiN structure which has been conventionally used as a semiconductor rectifier. In this diode, N + (“+” of N + is attached to the right shoulder of N. The same applies hereinafter) An N + epitaxial layer 2 is formed on a substrate 1, and P + (P + of P +) is formed in a partial region on the N + epitaxial layer 2. "+" Is attached to the right shoulder of P. The same applies hereinafter.) A mold forming region 3 is formed, an electrode 4 is formed corresponding to the P + mold forming region 3, and an electrode 5 is formed on the back surface of the N + substrate 1. Is forming. Reference numeral 6 is an insulating film formed on the N + epitaxial layer 2 other than the P + type formation region 3.

A diode having a PiN structure as shown in FIG. 10 has a forward voltage-current characteristic having a rising characteristic of 0.6 to 0.7 V as shown in A of FIG. Forward voltage drop when flowing is 0.9
It is about 1.1V. In addition, conventionally, a vertical field effect transistor (hereinafter referred to as DMOS) has been used as a low on-resistance device.
(Referred to as FET) is used.

FIG. 11 is a vertical sectional view showing an example of the structure of the DMOSFET. In this DMOSFET, an N-type epitaxial layer 8 is formed on an N + substrate 7, and a source N + region 12 is formed in each P-type channel region 11 formed in the N-type epitaxial layer 8 at a predetermined horizontal interval. is doing. Then, a source electrode 13 electrically connected to both source N + regions 12 is formed, and both source N
The gate electrode 10 is formed on the N-type epitaxial layer 8 sandwiched between the + regions 12 with the gate oxide film 9 interposed therebetween. Reference numeral 14 indicates a drain electrode.

To turn on the DMOSFET, a positive potential is further applied to the gate electrode 10 with the positive potential applied to the drain electrode 14 of FIG. This allows
An inversion layer is formed on the lower surface of the gate oxide film 9 of the P-type channel region 11, and the electron flow is the source N + region 12, the inversion layer of the P-type channel region 11, the N-type epitaxial layer 8, and the N + substrate 7.
Flow, resulting in drain electrode 14 to source electrode 1
Current flows to 3. To turn off this DMOSFET, the potential of the gate electrode 10 may be removed. As a result, the inversion layer of the P-type channel region 11 disappears and the current is cut off. In addition, as a form of using the DMOSFET,
Since the PN diode including the N + substrate 7, the N epitaxial layer 8 and the P-type channel region 11 is built in, it may be used as a commutation diode. That is,
When a positive potential is applied to the source electrode 13 of the DMOSFET as compared with the drain electrode 14, a current flows in the forward direction using this built-in diode. At this time, holes of minority carriers are injected from the P-type channel region 11 into the N-type epitaxial layer 8. Next, at the moment when the source electrode 13 becomes more negative than the drain electrode 14, holes of minority carriers are absorbed by the source electrode 13.

The characteristics of the DMOSFET have the current-voltage characteristics shown in B of FIG. 12, and there is no rising characteristic, there is no effect of accumulating minority carriers, excellent frequency characteristics and switching characteristics, and current concentration is high. It has excellent characteristics such as high fracture resistance.

[0007]

Next, the problems of the above-mentioned prior art will be described. When the PiN structure diode shown in FIG. 10 is used as a rectifier for a low voltage class switching power supply, the diode has an on-state loss of 30% to 5%.
It has a problem of 0% and high efficiency,
Since the minority carriers are injected at the time of turning on, there is a problem that the reverse recovery time becomes long and the switching speed cannot be increased.

Further, the Schottky barrier diode has a forward voltage drop of 0.4 to 0.7 V, and has features such as less loss during ON than a diode of PiN structure and a fast reverse recovery time. However, when it is used as a rectifier for a low-voltage class switching power supply, the on-state loss of the diode becomes several tens of percent, and there is a problem that high efficiency cannot be achieved. Further, when the DMOSFET shown in FIG. 11 is used as a rectifying element of a switching power supply, a gate drive control circuit is required because it is a three-terminal device, which increases the number of circuit components and the difficulty of the gate control circuit, resulting in an increase in cost. Was causing problems.

Further, the above-mentioned DMOSFET has a problem that it is difficult to reliably prevent the operation of the above-mentioned parasitic transistor when it changes from the ON state to the OFF state at a high speed, and it is easily destroyed. That is, the internal resistance of the P-type channel region 11 and the hole current of the injected minority carriers,
The PN junction is forward biased by the discharge current of the PN junction,
The parasitic transistor composed of the + substrate 7, the N-type epitaxial layer 8, the P-type channel region 11, and the source N + region may operate, which may cause an inconvenience that the device is destroyed due to latch-up. Was a problem.

In order to solve such a problem, as disclosed in Japanese Patent Laid-Open No. 63-16447, there has been proposed a method for controlling the lifetime of minority carriers in a parasitic diode region by diffusion of heavy metal or the like. However, such lifetime control of minority carriers by diffusion of heavy metals has had to sacrifice the basic performance of the semiconductor device originally possessed to some extent, and the number of manufacturing processes has increased, and its control has been difficult. As another solution, there is a method of connecting another diode to the outside without using the built-in diode of the DMOSFET, but there arises a problem that the cost increases due to an increase in the number of parts.

The present invention has been made in view of the above problems, and an object of the present invention is to provide a semiconductor rectifier as a switching device element having a simple structure and adapted to high frequencies. Further, it is an object of the present invention to provide a semiconductor rectifying device which can reduce the number of circuit components, can be manufactured at low cost, and can be downsized.

[0012]

According to a first aspect of the invention for achieving the above object, a first region of a first conductivity type and a low impurity density is formed on a substrate of a first conductivity type and a high impurity density. A plurality of second regions of the second conductivity type having a high impurity density are formed on the surface of the first region at a predetermined length and depth such that depletion layers extending in the first region overlap each other. A plurality of third regions of the first conductivity type having a high impurity density are formed on the surface of the first region between the second regions with a length shorter than the second region and a predetermined depth, and the height of the third region is increased. A metal electrode is formed on the back surface of the impurity density substrate, and the second electrode is formed.
A metal electrode was formed so as to connect the region and the third region.

According to a second aspect of the present invention, a first region of the first conductivity type and a low impurity density is formed on a substrate of the first conductivity type and a high impurity density, and an insulating film and polysilicon are formed on the surface of the first region. A plurality of second regions formed by stacking electrodes of the film are formed in the first region in a plurality of rows with a predetermined length and at intervals such that depletion layers that extend below the second region overlap each other, and further, between the second regions. A large number of rows of third regions of the first conductivity type having a high impurity density are formed on the surface of the first region at a predetermined depth and shorter than the second region, and metal electrodes are formed on the back surface of the high impurity density substrate. At the same time, a metal electrode was formed so as to connect the second region and the third region.

A third aspect of the present invention is the semiconductor rectifying device according to the first or second aspect, wherein the first region has a low impurity concentration with a relatively low impurity density on the high impurity density substrate side. It has a structure of at least two layers having a density region and having a low impurity density region relatively higher than the relatively low low impurity density region on the surface side of the first region.

A configuration example of the invention described in each claim will be described below in detail with reference to the drawings. FIG. 1 is a schematic vertical sectional view of a semiconductor rectifier according to claim 1. In this semiconductor rectifying device, first, the first region 16 of the first conductivity type and the low impurity density is formed on the first conductivity type high impurity substrate 15 by the epitaxial growth method. Next, by a process such as oxide film formation, photolithography etching, ion implantation, and activation annealing, the second region 17 of the second conductivity type and the high impurity density is formed at a position slightly cut in the surface of the first region 16 to form the first region 16. A large number of rows of depletion layers extending in the region 16 are formed at intervals, lengths, and depths that overlap each other. Then, by a process such as oxide film formation, photolithography etching, ion implantation, and activation annealing, the third region 18 of the first conductivity type and the high impurity density is formed on the surface of the first region 16 between the second regions 17.
It is formed with a length shorter than the second region 17 and a predetermined depth.
Next, the oxide film on the surface of the second region 17 and the third region 18 is removed, and a metal electrode that connects the second region 17 and the third region 18 is formed by a process such as sputtering, photolithography etching, and sintering. To do. Next, the high impurity density substrate 1
Polishing the back side of 5 and sputtering or plating,
The back surface metal electrode 20 is formed by annealing or the like.

FIG. 2 is a schematic vertical sectional view of a semiconductor rectifier according to a second aspect of the present invention. In this semiconductor rectifier,
First, the first conductivity type low impurity density first region 16 is formed on the first conductivity type high impurity substrate 15 by an epitaxial growth method. Next, on the surface of the first region 16, a second region 23 in which an insulating film 21 is formed by forming an oxide film and an electrode 22 of a doped polysilicon film having a low resistance by the lPCVD method is laminated at a position slightly cut in the surface of the first region 16. In addition, by a process such as photolithography etching, a plurality of depletion layers extending under the second region 23 in the first region 16 are arranged in multiple columns at intervals, lengths and depths that overlap each other. Next, on the surface of the first region 16 between the second regions 23, the third region 18 of the first conductivity type and the high impurity density is made shorter than the second region 23 by a process such as ion implantation and activation annealing. And multiple rows are formed at a predetermined depth. Next, the insulating film on the surface of the electrode 22 of the doped polysilicon film and the surface of the third region 18 is removed, and the electrode 22 of the doped polysilicon film is formed by processes such as sputtering, photolithography etching, and sintering.
A metal electrode 24 connecting the third region 18 with the metal electrode 24 is formed. Next, the back surface of the first conductivity type high impurity density substrate 15 is polished,
The back surface metal electrode 20 is formed by sputtering, plating, annealing, or the like.

FIG. 3 is a schematic vertical sectional view of another structure of the semiconductor rectifier according to the first aspect. In this semiconductor rectifying device, first, the first region 16 of the first conductivity type and the low impurity density is formed on the first conductivity type high impurity substrate 15 by the epitaxial growth method. Next, the second region 17 of the second conductivity type having a high impurity density is formed by processes such as oxide film formation, photolithography etching, ion implantation, and activation annealing.
A plurality of depletion layers extending in the first region 16 are formed in a plurality of rows with a distance, a predetermined length and a depth overlapping each other. Next, by a process such as oxide film formation, photolithography etching, ion implantation, and activation annealing, the third region 18 of the first conductivity type with high impurity density is formed inside the first region 16 between the second regions 17, and Multiple rows are formed with a length shorter than the second region 17 and a predetermined depth. Next, the oxide film on the surface of the second region 17 and the third region 18 is removed, and the second region 17 and the third region 18 are removed by a process such as sputtering, photolithography etching, and sintering.
A metal electrode 19 connecting the regions 18 is formed. Next, the back surface of the high impurity density substrate 15 is polished, and the back surface metal electrode 20 is formed by sputtering, plating, annealing, or the like.
Is formed. In the semiconductor rectifier having this configuration, since the third region 18 is formed inward from the surface of the first region, the depth direction surfaces of the second region 17 and the third region 18 are substantially flat. There is.

FIG. 4 is a schematic vertical sectional view of another semiconductor rectifying device according to a second aspect of the present invention. In this semiconductor rectifier, first, the first region 16 is similarly formed on the high-impurity substrate 15, and the insulating film 21 is formed on the surface of the first region 16 by forming an oxide film and the doped polysilicon having a low resistance by the LPCVD method. The second region 23 in which the electrodes of the film 22 are laminated is subjected to a process such as photolithography etching on the surface of the first region 16 by a process such as ion implantation and activation annealing to obtain a third impurity of the first conductivity type having a high impurity concentration. A large number of rows of regions 18 are formed with a length shorter than that of the second regions 17 and a predetermined depth. Next, the insulating film on the surface of the electrode 22 of the doped polysilicon film and the surface of the third region 18 is removed, and sputtering,
A metal electrode 24 connecting the electrode 22 of the doped polysilicon film and the third region 18 is formed by a process such as photolithography etching and sintering. Next, the high impurity density substrate 1
5. The back surface is polished, and the back surface metal electrode 20 is formed by sputtering, plating, annealing, or the like.

FIG. 5 is a schematic vertical sectional view of a semiconductor rectifier according to claim 3 including the features of claim 1. In this semiconductor rectifier, first, a first-conductivity-type high-impurity substrate 15 is formed on a first-conductivity-type high-impurity substrate 15 by an epitaxial growth method, and then a first-conductivity-type low-impurity-density region 25 is formed. The first region 27 of the first conductivity type having the low impurity density is formed by forming the two layers of the low impurity density region 26 having the impurity concentration relatively higher than that of the substrate 15 side. Next, oxide film formation,
By the processes such as photolithography etching, ion implantation, and activation annealing, the depletion layers that spread the second region 17 of the second conductivity type and the high impurity density in the first region 16 are overlapped with each other at a predetermined length and depth. A large number of rows are formed. Next, the third region 18 of the first conductivity type and the high impurity density is formed into the first region 1 between the second regions 17 by processes such as oxide film formation, photolithography etching, ion implantation, and activation annealing.
A large number of rows are formed on the surface 6 with a length shorter than the second region 17 and a predetermined depth. Similarly, the metal electrode 19 and the back surface metal electrode 20 are formed next.

FIG. 6 is a schematic vertical sectional view of a semiconductor rectifier according to claim 3 including the features of claim 2. In this semiconductor rectifying device, first, a region 25 having a relatively low impurity density of the first conductivity type is formed on the high impurity density substrate 15 of the first conductivity type by an epitaxial growth method, and then the high impurity density substrate 15 side. A first conductivity type low impurity density first region 27 having two layers of a relatively high impurity density low impurity density region 26 is formed. Next, on the surface of the first region 27, the second region 23 in which the insulating film 21 by forming an oxide film and the electrode of the low-resistance doped polysilicon film 22 by the LPCVD method are stacked is formed by a first process such as photolithography etching. In the region 27, a plurality of depletion layers extending under the second region 23 are formed in a plurality of rows with a predetermined length and an interval at which they overlap each other. Next, on the upper surface of the first region 27 between the second regions 23,
By the process such as ion implantation and activation annealing, the third region 18 of the first conductivity type and the high impurity density is formed into the second region 17
Multiple rows are formed with a shorter length and a predetermined depth. Similarly, the metal electrode 24 and the back surface metal electrode 20 are formed thereafter.

[0021]

According to the inventions of claims 1 to 3, when the first conductivity type high-density substrate electrode side is positive potential and the electrode connecting the second region and the third region is negative potential, Since the depletion layer extending from the second region to the low-impurity region of the first region is in an over-pinch-off state and the barrier is high, carrier injection from the third region of the high-density third region of the first conductivity type is blocked. Is turned off. When the first conductivity type high-density substrate electrode side has a negative potential and the electrode connecting the second region and the third region has a positive potential, the depletion layer extending from the second region to the low impurity region of the first region. And the low impurity density region of the first region immediately below the high density third region of the first conductivity type is in a state where there is no depletion layer, so that the low impurity density region of the first region becomes a resistance region, Carriers are injected from the first-conductivity-type high-density substrate to be turned on. Therefore, the positive and negative polarities between the electrodes result in an on / off state, so that rectification can be performed.

According to the invention described in claims 1 to 3, unlike the diode having the conventional PiN structure, the forward voltage-current characteristic has a characteristic in which a current flows from 0 V, so that it is a low voltage class. When it is used as a rectifier for a switching power supply, the forward voltage drop of the diode having the conventional PiN structure is eliminated, so that the on-state loss can be extremely reduced.

According to the first to third aspects of the invention, the single carrier device operation is performed by using the element voltage at the time of ON at 0.2 to 0.6V. Unlike a diode having a PiN structure, there is no accumulation drop of the minority carriers at the time of turning off, which is advantageous in that a very high frequency operation is possible. Further, according to the first to third aspects of the invention, since it is a two-terminal semiconductor device, a gate drive control circuit for use as a rectifying device like a conventional DMOSFET is unnecessary,
By reducing the number of circuit components, there are advantages of low cost and downsizing.

[0024]

EXAMPLES Examples of the present invention will be described below. The method of manufacturing the semiconductor rectifier shown in FIG. 1 of the present invention will be described in detail. The first conductivity type high impurity density substrate 15 is 0.01 Ωcm in which antimony is doped as an impurity, and the substrate thickness is 52.
A 5 μm N + type high impurity density substrate 15 is used. An epitaxial growth layer of 9.0 Ωcm and an impurity density of 5 × 10 ¹⁴ / cm ³ was formed on the first-conductivity-type high-impurity substrate 15 by doping phosphorus with the first-conductivity-type low-impurity-density first region 16 as an impurity. The N type low impurity density region 16 is formed by growing 3.0 μm.

Next, a thermal oxide film and a nitride film are laminated in a thickness of 1000 angstrom and 2000 angstrom on the N-type low impurity density region 16 by the usual thermal oxidation process and LPCVD film forming process. Next, an opening is formed in the thermal oxide film and the nitride film in order to form the second region 17 of the second conductivity type and the high impurity density by an ordinary honing process. The second regions 17 of the second conductivity type and the high impurity density have openings of 2.0 μm at intervals of 4.9 μm pitch, and the surface of the N-type low impurity density region 16 is etched by about 0.5 μm. The second conductivity type second region 17 having a high impurity density has a length of 3.13 mm, and a total of 639 pieces are formed on the N-type low impurity density region 16 to have a total length of 200 cm.

Next, boron is ion-implanted into the second region 17 of the second conductivity type and the high impurity density, and then the third region 18 of the first conductivity type and the high impurity density is formed by a normal photolithography process. Therefore, the thermal oxide film and the nitride film on the N-type low impurity density region 16 are removed by etching, leaving only between the second regions 17 of the second conductivity type and high impurity density. Third area 18
Is 20 μm shorter than the length of the second region 17 and is 3.11 m.
A total of 638 pieces were formed on the N-type low impurity density region 16 as m, and the total length was 198.4 cm.

Next, a second step is performed by a thermal diffusion step and a thermal oxidation step.
A P + type high impurity density region 17 is formed as the conductive type second impurity density region 17. The impurity density of the P + type high impurity density region 17 was 5 × 10 ¹⁹ / cm ³ , the diffusion depth was 1.0 μm, and the thermal oxide film thickness on the surface was 4000 Å.

Next, the thermal oxide film and the nitride film on the N type low impurity density region 16 for forming the first conductivity type high impurity density third region 18 are removed by etching, and arsenic is ionized as an impurity. After the implantation, an N + type high impurity density region 18 is formed by a thermal diffusion process. The impurity density of the N + type high impurity density region 18 was 5 × 10 ²⁰ / cm ³ , and the diffusion depth was 0.3 μm. The diffusion depth was controlled so that the P + type high impurity density region 17 and the N + type high impurity density region 18 overlap each other in the high density impurity regions.

Next, a normal full surface light etching process,
A metal electrode 19 connecting the P + type high impurity density region 17 and the N + type high impurity density region 18 is formed by an Al sputtering film forming process, a photolithography process, a dry etching process, and an annealing sintering process. The metal electrode 19 had a film thickness of 1.5 μm and an area of 3.13 mm × 3.13 mm so as not to contact the N-type low impurity density region 16.

Next, in order to reduce the resistance of the N + type high impurity density substrate 15, the back surface of the N + type high impurity density substrate 15 is polished and removed, and the thickness of the N + type high impurity density substrate 15 is set to 250 μm. A back surface metal electrode 20 was formed by performing a Ni plating and sintering process. Next, a normal dicing process, a die bonding process, a wire bonding process, and a molding process are performed to obtain a chip size of 3.2.
A semiconductor rectifier having a size of 3 mm × 3.23 mm square was produced.

The characteristics of the semiconductor rectifier of Example 1 are as follows:
When the conductivity type high-density substrate electrode 20 side is negative and the electrode 19 side connecting the second region 17 and the third region 18 is positive, an on-resistance of about 0.047 to 0.075Ω is obtained, and the first conductivity type When the high-density substrate electrode 20 side of the mold is positive and the electrode 19 side connecting the second region 18 and the third region 18 is negative, a blocking voltage of about 20 V was obtained. The forward current-voltage characteristic of the semiconductor rectifier of Example 1 is shown in FIG. The current started to flow from the applied voltage of 0 V, the current became 10 A at the applied voltage of 0.6 V, and the on-resistance at the applied voltage of 0.6 V was 0.06 Ω. Furthermore, since it is a majority carrier device, good results were obtained for high frequency driving.

[0032]

[Embodiment 2] In the above-mentioned Embodiment 1, 40.0 Ωcm of the first conductivity type low impurity density first region 16 is doped with phosphorus as an impurity, and an epitaxial growth layer having an impurity density of 1 × 10 ¹⁴ / cm ³ is formed. 0.0 μm to form the N-type low impurity density region 16, and the second regions 17 of the second conductivity type and high impurity density have the opening portions of 2.0 μm with the pitch of 8.4 μm and the second conductivity type. Second with a high impurity density 17 in the mold
The regions had a length of 6.33 mm, and a total of 752 regions were formed on the N-type low impurity density region to have a total length of 474.5 cm.

The third region 18 of the first conductivity type and the high impurity density
Is 20 μm shorter than the length of the second region 17 of the second conductivity type and the high impurity density, and is set to 6.31 mm, and a total of 725 pieces are formed on the N-type low impurity density region 16, and the total length is 474.
It was 5 μm. Next, the impurity density of the P + type high impurity density region 17 is 5 × 10 ¹⁹ / cm ³ , and the diffusion depth is 1.0 μm.
m.

Next, the N + type high impurity density region 18 has an impurity density of 5 × 10 ²⁰ / cm ³ and a diffusion depth of 0.3 μm.
And The metal electrode 19 has a thickness of 1.5 μm and an area of 6.33 mm so as not to contact the N-type low impurity density region 16.
6.33 mm, chip size 6.43 mm ×
A 6.43 mm square semiconductor rectifier was produced.

The characteristics of the semiconductor rectifier of the second embodiment are as follows:
When the conductivity type high-density substrate electrode 20 side is negative and the electrode 19 side connecting the second region 17 and the third region 18 is positive, an on-resistance of about 0.044 to 0.079Ω is obtained, and the first conductivity type When the high-density substrate electrode 20 side of the mold is positive and the electrode 19 side connecting the second region 17 and the third region 18 is negative, a blocking voltage of about 20 V was obtained.

The forward current-voltage characteristics of the semiconductor rectifier of the second embodiment are almost as shown in FIG. The current starts to flow from the applied voltage of 0V and the applied voltage is 0.6V and the current is 10A
And the on-resistance at an applied voltage of 0.6V was 0.06Ω. Furthermore, since it is a majority carrier device, good results were obtained for high frequency driving.

[0037]

Third Embodiment In the first embodiment, phosphorus is doped as the first conductivity type low impurity density first region 16 by 1
An epitaxial growth layer of 00.0 Ωcm and an impurity density of 5 × 10 ¹³ / cm ³ was grown to 3.0 μm to form an N-type low impurity density region 16, and a second conductivity type high impurity density second region 17 was formed. The openings are 2.0 μm at intervals of 11.0 μm, the second region 17 of the second conductivity type and the high impurity density has a length of 9.9 mm, and the N-type low impurity density region 1 is formed.
A total of 901 pieces were formed on 6 and the total length was 892 cm.

The third region 18 of the first conductivity type and the high impurity density
Is 20 μm shorter than the length of the second region 17 of the second conductivity type and high impurity density, and is set to 9.88 mm, and a total of 891 pieces are formed on the N-type low impurity density region 16 and the total length is 78.
It was set to 1.5 cm. Next, a P + type high impurity density region 1
7 has an impurity density of 5 × 10 ¹⁹ / cm ³ and a diffusion depth of 1.
It was set to 0 μm.

Next, the N + type high impurity density region 18 has an impurity density of 5 × 10 ²⁰ / cm ³ and a diffusion depth of 0.3 μm.
And The metal electrode 19 has a film thickness of 1.5 μm and an area of 9.9 mm × so as not to contact the N-type low impurity density region 16.
9.9 mm, chip size 10.0 mm x 1
A 0.03 mm square semiconductor rectifier was manufactured.

The characteristics of the semiconductor rectifier of Example 3 are as follows:
When the conductivity type high-density substrate electrode 20 side is negative and the electrode 19 side connecting the second region 17 and the third region 18 is positive, an on-resistance of about 0.044 to 0.077 Ω is obtained, and the first conductivity When the high-density substrate electrode 20 side of the mold is positive and the electrode 19 side connecting the second region 17 and the third region 18 is negative, a blocking voltage of about 20 V was obtained.

The forward current-voltage characteristics of the semiconductor rectifier of Example 3 are almost as shown in FIG. The current starts to flow from the applied voltage of 0V and the applied voltage is 0.6V and the current is 10A.
And the on-resistance at an applied voltage of 0.6V was 0.06Ω. Furthermore, since it is a majority carrier device, good results were obtained for high frequency driving.

FIG. 8 and FIG. 8 show the relationship between the impurity density of the first region 16 of the first conductivity type and the low impurity density and the interval between the second region 17 of the second conductivity type and the high impurity density in Examples 1 to 3. It shows in FIG. In FIG. 8, Wg represents the second region 17 of the second conductivity type and the high impurity density, and Wc represents the interval between the second regions 17 of the second conductivity type and the high impurity density. FIG. 9 shows the second area 1
7 shows the relationship between the distance Wc of 7 and the impurity density of the first region 16, and the impurity density is 1 × 10 ¹² / cm ³ and Wc is 36.0 μm.
Wc is 0.3 at point m and impurity density 1 × 10 ¹⁶ / cm ^3.
The value shown by the solid line connecting the 1 μm points is the distance W between the second regions 17.
It suffices to determine c and the impurity density of the first region 16.

[0043]

Fourth Embodiment Next, details of the semiconductor rectifier shown in FIG. 5 of the present invention will be described. An epitaxial growth layer of 100.0 Ωcm and an impurity density of 5 × 10 ¹³ / cm ³ doped with phosphorus as the first region 25 of the first conductivity type and having a relatively low impurity density is grown to 2.2 μm. The first region 26 having a low impurity density of the mold is doped with phosphorus as an impurity to have a resistance of 9.0 Ωcm, and the impurity density is 5 × 10 5.
An epitaxial growth layer of ¹⁴ / cm ³ is grown to 0.8 μm to form an N type low impurity density region.

Thereafter, as in the third embodiment, the second regions 17 of the second conductivity type and the high impurity density have the openings of 2.0 μm at the intervals of the pitch of 11.0 μm, and the second conductivity type of the high impurity density is increased. The second region 17 has a length of 9.9 mm, and a total of 901 are formed on the N-type low impurity density region 16 to have a total length of 89.
It was 2 cm.

Third region 18 of the first conductivity type and high impurity density
Is 20 μm shorter than the length of the second region 17 of the second conductivity type and high impurity density, and is set to 9.88 mm, and a total of 891 pieces are formed on the N-type low impurity density region 16 and the total length is 78.
It was set to 1.5 cm. Next, a P + type high impurity density region 1
7 has an impurity density of 5 × 10 ¹⁹ / cm ³ and a diffusion depth of 1.
It was set to 0 μm.

Next, the N + type high impurity density region 18 has an impurity density of 5 × 10 ²⁰ / cm ³ and a diffusion depth of 0.3 μm.
And The metal electrode 19 has a film thickness of 1.5 μm and an area of 9.9 mm × so as not to contact the N-type low impurity density region 16.
9.9 mm, chip size 10.0 mm x 1
A 0.03 mm square semiconductor rectifier was manufactured.

The characteristics of the semiconductor rectifier of the fourth embodiment are as follows:
When the conductivity type high-density substrate electrode 20 side is negative and the electrode 19 side connecting the second region 17 and the third region 18 is positive, an ON resistance of about 0.044 to 0.078 Ω is obtained, and at the time of zero bias. Since the depletion layer extending from the second region 17 extends to the region 25 of the first conductivity type having a relatively low impurity density, the blocking performance at low voltage is improved. When the first conductivity type high-density substrate electrode 20 side was positive and the electrode 19 side connecting the second region 17 and the third region 18 was negative, a blocking voltage of about 20 V was obtained.

[0048]

Fifth Embodiment A method of manufacturing the semiconductor rectifier shown in FIG. 2 of the present invention will be described in detail. The first conductivity type high impurity density substrate 15 is doped with antimony as an impurity of 0.01.
An N + type high impurity density substrate 15 having an Ωcm and a substrate thickness of 525 μm is used. On the first-conductivity-type high-impurity substrate 15, 5.0 Ωcm in which phosphorus is doped with the first-conductivity-type low-impurity-density first region 16 as an impurity, the impurity density is 1
× 10 ¹⁵ / cm ³ epitaxial growth layer 3.5 μm
The N-type low impurity density region 16 is grown.

Next, in order to form the second region 23 in which the insulating film 21 and the electrode 22 of the polysilicon film are laminated, the surface of the N-type low impurity density region 16 is removed by etching by about 0.5 μm by a normal lithographic process. To do. The second area 23 is 5μ
A total of 800 etching grooves were formed on the N-type low impurity density region 16 with an etching portion of 3 μm at an interval of m pitch, a length of 4.0 mm, and a total length of 320 cm.
And

Next, the insulating film 21 and the polysilicon film electrode 22 are subjected to a normal thermal oxidation process and LPCVD film forming process.
Was laminated on the N type low impurity density region 16. Insulation film 2
The thermal oxide film is 800 angstrom as 1, and the P + type polysilicon film is 300 as the electrode 22 of the polysilicon film.
Layered to 0 angstrom.

Next, since the third region 18 of the first conductivity type and the high impurity density is formed by the normal lithographic process, the insulating film 21 and the P + type polysilicon film 22 on the N type low impurity density region 16 are formed. Is etched away between the second region 23 and the second region 23. First conductivity type high impurity density third
The region 18 has a width of 2 μm and is 10 times larger than the length of the second region 23.
μm is shortened to 3.99 mm, and a total of 799 projections are formed on the N-type low impurity density region 16 so that the total length is 31.
It was set to 8.8 cm.

Next, arsenic is ion-implanted as an impurity to form the third region 18 of the first conductivity type and the high impurity density, and then the N + type high impurity density region 1 is formed by a thermal diffusion process.
8 is formed. The impurity density of the N + type high impurity region 18 is 5 × 10 ²⁰ / cm ³ , and the diffusion depth is 0.3 to 0.4 μm.
And

Next, a normal whole surface light etching step,
A metal electrode 24 connecting the P + type polysilicon film 22 and the N + type high impurity density region 18 is formed by an Al film sputter film forming process, a photolithography process, a dry etching process, and an annealing sintering process. The metal electrode 24 had a film thickness of 1.5 μm and an area of 0.3998 mm × 0.3998 mm so as not to contact the N-type low impurity density region 16.

Next, in order to reduce the resistance of the N + type high impurity density substrate 15, the back surface of the N + type high impurity density substrate 15 is polished and removed, and the thickness of the N + type high impurity density substrate 15 is set to 250 μm. , Ni plating, and sintering were performed to form the back surface metal electrode 20. Next, a normal dicing process, a die bonding process, a wire bonding process, and a molding process are performed to obtain a chip size of 4.1.
A semiconductor rectifier having a size of mm × 4.1 mm square was manufactured.

The characteristics of the semiconductor rectifier of Example 5 are as follows:
When the conductivity type high-density substrate electrode 20 side is negative and the electrode side 24 connecting the second region 23 and the third region 18 is positive, an on-resistance of about 0.030 to 0.035Ω is obtained, and the first When the conductive high-density substrate electrode 20 side is positive and the electrode 24 side connecting the second region 23 and the third region 18 is negative, a blocking voltage of about 25 V was obtained. Furthermore, since it is a majority carrier device, good results were obtained for high frequency driving.

In the fifth embodiment, the first conductivity type is N type and the electrode of the polysilicon film is P type. However, the first conductivity type is P type.
Type, and the electrode of the polysilicon film may be N type.

Further, in Examples 1 to 5, the Si-based material was used as the semiconductor material, but by using the compound semiconductor material such as GaAs or InP, it is possible to use it in a higher high frequency band.

Further, in the semiconductor rectifier of the present invention, when the electrode side connecting the second region and the third region is positive, the product of the operating current at ON and the internal resistance at ON is 0.2 to 0.6.
It may be designed so as to fall within the range of V.

Further, in the semiconductor rectifying device of the present invention, the impurity density in the low impurity density region and the interval between the second regions may be designed so that the depletion layers extending in the low impurity density region overlap each other. The intervals between the regions are not limited to those described in Examples 1 to 5. The impurity density of the low impurity density region is 1 × 10 ¹² / cm ³ to 1 × 10 ¹⁶ / c.
m ³ range, the interval between the second regions is 0.31 μm to 36.0
It can be appropriately designed in the range of μm. The thickness of the low impurity density region may be designed according to the blocking voltage.

[0060]

As described above, according to the first, second and third aspects of the present invention, the positive and negative polarities between the electrodes cause an on / off state, so that a rectifying action can be performed and at the same time, an on-state can be obtained. It has the advantage that the loss can be very small. In addition, unlike the diode having the conventional PiN structure, the accumulation drop of the minority carriers at the time of off does not occur, so that there is an advantage that a very high frequency operation becomes possible. Further, since it is a two-terminal semiconductor device, a gate drive control circuit for use as a rectifying device unlike the conventional DMOSFET is not necessary, so that it is possible to reduce cost and size by reducing the number of circuit components. Have the effect of.

[Brief description of drawings]

FIG. 1 is a vertical sectional view showing an embodiment of a semiconductor rectifier according to claim 1 of the present invention.

FIG. 2 is a vertical sectional view showing an embodiment of a semiconductor rectifier according to claim 2 of the present invention.

FIG. 3 is a vertical sectional view showing an embodiment of a semiconductor rectifier according to claim 1 of the present invention.

FIG. 4 is a vertical sectional view showing an embodiment of a semiconductor rectifier according to claim 2 of the present invention.

FIG. 5 is a vertical sectional view showing an embodiment of the semiconductor rectifier according to claim 1 of the present invention.

FIG. 6 is a vertical sectional view showing an embodiment of a semiconductor rectifier according to claim 2 of the present invention.

FIG. 7 is a first example, a second example and a third example of the invention.
3 is a current-voltage characteristic diagram of FIG.

FIG. 8 is a diagram showing a distance between an impurity density of a first region of a first conductivity type and a low impurity density and a second region of a second conductivity type of a high impurity density according to the present invention.

FIG. 9 is a diagram showing the relationship between the impurity density of the first region of the first conductivity type and the low impurity density and the distance between the second regions of the second conductivity type and the high impurity density of the present invention.

FIG. 10 is a vertical cross-sectional view of a conventional PiN structure diode.

FIG. 11 is a vertical sectional view of a conventional DMOSFET.

FIG. 12: Conventional PiN structure diode and DMOS
It is a current voltage characteristic view of FET.

[Explanation of symbols]

15 1st conductivity type high impurity density substrate 16 1st conductivity type low impurity density first region 17 2nd conductivity type high impurity density second region 18 1st conductivity type high impurity density 3rd region 19 Metal electrode for connecting the second and third regions 20 Substrate backside metal electrode 21 Insulating film 22 Polysilicon film electrode 23 Second insulating film and polysilicon film electrode are laminated
Region 24 Metal electrode connecting electrode of polysilicon film to third region 25 First conductivity type relatively low impurity concentration region 26 First conductivity type relatively high impurity concentration region 27 Relatively low impurity concentration region relatively First region formed by stacking high impurity density regions

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification number Reference number within the agency FI Technical indication location H02M 3/135 8726-5H (72) Inventor Ikuo Shioda Takatate Kumanodou, Natori City, Miyagi Prefecture No. 5 at 10. Ricoh Applied Electronics Research Laboratory Co., Ltd.

Claims (3)

[Claims] 1. A first conductivity type low impurity density first region is formed on a first conductivity type high impurity density substrate, and a second conductivity type high impurity density second region is formed on the surface of the first region. A plurality of regions are formed with a predetermined length and depth such that depletion layers extending in the first region overlap each other, and further, a high impurity of the first conductivity type is formed on the surface of the first region between the second regions. Third of density
A plurality of regions are formed with a length shorter than the second region and a predetermined depth, and a metal electrode is formed on the back surface of the high impurity density substrate, and the second region and the third region are formed. A semiconductor rectifier characterized in that a metal electrode is formed so as to be connected. 2. A first conductivity type low impurity density first region is formed on a first conductivity type high impurity density substrate, and an insulating film and a polysilicon film electrode are laminated on the surface of the first region. A plurality of second regions are formed in the first region with a predetermined length and a plurality of rows of depletion layers that extend below the second region and overlap each other, and are further formed on the surface of the first region between the second regions. A large number of third regions of the first conductivity type having a high impurity density are formed in a row shorter than the second region and at a predetermined depth, and a metal electrode is formed on the back surface of the high impurity density substrate, and the second regions are formed. A semiconductor rectifying device, characterized in that a metal electrode is formed so as to connect the electrode and the third region. 3. The first region has a low impurity density region having a relatively low impurity density on the high impurity density substrate side, and the relatively low low impurity density region on the surface side of the first region. 3. The semiconductor rectifying device according to claim 1, wherein the semiconductor rectifying device has a structure of at least two layers having a low impurity density region which is relatively higher than that of.