JPH06309799A - Magnetic recording and reproducing device - Google Patents

Abstract

(57) [Abstract] [Purpose] In a magnetic recording / reproducing device using multi-level amplitude phase modulation, the initial phase adjustment of the carrier wave and clock is unnecessary,
Provided is a magnetic recording / reproducing apparatus capable of correcting the phase shift of a carrier wave and a clock based on a signal recorded on a tape to reduce an error rate. A carrier wave clock reproducing circuit 12 for reproducing a carrier wave 112 and a clock 113 from a reproduced signal 111 from a magnetic recording / reproducing unit, and a carrier variable delay unit 13 based on two systems of demodulated signals 116, 117 output from a demodulator 14. Carrier delay control signal 118 and clock variable delay device 18
And a clock delay control signal 119 to control the delay amount of the carrier and the clock so that the error rate of the decoded digital signal is minimized.
And 7.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a magnetic recording / reproducing apparatus for digital recording such as a digital video tape recorder.

[0002]

2. Description of the Related Art In a conventional digital magnetic recording / reproducing apparatus using multi-level amplitude / phase modulation (for example, C-59 of the Spring National Convention of the Institute of Electronics, Information and Communication Engineers in 1988), a pilot signal outside the frequency occupied band of the modulated signal is used. The frequency of the carrier and the clock is recorded by frequency-multiplexing the modulated signal with the modulated signal, or by time-multiplexing the burst signal of the same frequency and the same phase as the carrier used for quadrature modulation with the modulated signal on the magnetic recording medium. Holds information at the same time.

In the reproducing system, the carrier wave used in the demodulator and the clock used in the decoder are reproduced from the reproduced pilot signal or burst signal.

[0004]

However, in the magnetic recording / reproducing apparatus using the multi-valued amplitude / phase modulation, the reproduced carrier wave and clock are used in the recording system circuit and the phase information of the carrier wave and the clock is used as a pilot signal or burst. It is possible to faithfully reproduce based on the phase information given to the signal, but the phase of the carrier wave and the clock is deviated due to the characteristics of the magnetic recording / reproducing system or the individual characteristics of the circuit. In order to solve this problem, a manually variable delay circuit is provided for each carrier wave and clock, and adjustment is required in advance.

Even if the above-mentioned adjustment is made in one magnetic recording / reproducing apparatus, the magnetic recording / reproducing characteristics are different between the magnetic recording / reproducing apparatuses due to the individual difference between the magnetic recording medium and the magnetic recording head, and the orthogonal planes are formed. Deviations of the detection points detected with respect to the code points given above occur individually. That is, when the data recorded by a certain magnetic recording / reproducing apparatus is reproduced by another magnetic recording / reproducing apparatus, the error rate of the decoded data varies and cannot be said to be optimized. Further, even in the same magnetic recording / reproducing apparatus, the magnetic recording / reproducing characteristics may be different due to head wear or the like, and the above result is obtained.

In view of the above problems, the present invention eliminates the need to adjust the initial phase of the carrier wave and the clock, and shifts the phase of the carrier wave and the clock with respect to changes in magnetic recording / reproducing characteristics due to individual differences in tape heads and head wear. It is an object of the present invention to provide a magnetic recording / reproducing apparatus capable of correcting the error rate based on the signal recorded on the tape in real time to reduce the error rate.

[0007]

In order to achieve the above object, a magnetic recording / reproducing apparatus of the present invention comprises an encoder for encoding an input digital signal for every n bits and outputting a 2 ^n- value code. A mapping circuit for assigning a 2 ^n- value code to a corresponding code point among predetermined 2 ⁿ points on an orthogonal plane and outputting two systems of signals corresponding to the code points, and for each recording track or a plurality of tracks on a magnetic recording medium Every time a correction signal for correcting the phase of the carrier wave and the clock is written in a predetermined portion of the track, two signals corresponding to the correction signal are added to the two signals output from the mapping circuit, and a new signal is added. A correction signal adding circuit that outputs two systems of signals, and a quadrature modulation circuit that quadrature modulates the two systems of signals from the correction signal adding circuit using a carrier from a carrier generation circuit and outputs a modulated signal, A bias applying unit that superimposes a bias signal on the recording signal output from the intermodulation circuit, and a magnetic recording and reproducing unit that records and reproduces the biased recording signal on a magnetic recording medium for each track via a magnetic head. And a carrier wave clock reproducing circuit for reproducing a carrier wave and a clock from a reproduced signal reproduced through the magnetic head in the magnetic recording / reproducing unit, and a phase adjustment carrier wave is output by performing a phase adjustment of the reproduced carrier wave reproduced from the carrier wave clock reproducing circuit. The variable carrier delay device that performs the phase adjustment, the clock variable delay device that adjusts the phase of the recovered clock reproduced from the carrier clock recovery circuit, and outputs the phase adjusted clock, and the recovered signal is demodulated by the phase adjusted carrier to generate two demodulated signals. A demodulator for outputting and a demodulated signal of two systems are decoded by inputting the phase adjustment clock to the decoded digital signal. And a decoder for outputting the carrier delay control signal to the carrier variable delay unit and the clock delay control signal to the clock variable delay unit based on the demodulated signals of two systems to output the carrier and clock delay amounts of the decoded digital signal. And a carrier clock delay control circuit for controlling the error rate to be the lowest.

[0008]

According to the present invention, the phase shift of the carrier wave and the clock is corrected based on the signal recorded on the tape in real time in the magnetic recording / reproducing apparatus using the multi-level amplitude phase modulation by the above-mentioned structure, and the decoded data It is to reduce the error rate.

[0009]

EXAMPLE A magnetic recording / reproducing apparatus of the present invention will be described below.

First, in the first embodiment shown in FIG.
The digital signal 101 is input from the input terminal 1, the digital signal 101 is encoded by the encoder 2 for every n bits, and the 2 ⁿ value code 102 is output. The 2 ⁿ value code input by the mapping circuit 3 is orthogonal plane. It is assigned to the corresponding code point of the above predetermined 2 ⁿ points and outputs the two systems of signals I ₁ signal 103 and Q ₁ signal 104 corresponding to the code point.

Here, the mapping circuit 3 used in the present invention.
And the signal point arrangement in the mapping circuit 3 will be described.

First, the mapping circuit 3 is a ROM (Rea
d Only Memory) etc., and the position data on the orthogonal plane of 2 ⁿ signal points represented by an n-bit digital signal is written in advance in the memory in the ROM, which is the encoder output 2 ^{When the n-} ary code 102 is input, the position data of the reference signal point on the orthogonal plane represented by the 2 ^n- ary code 102 is read from the memory, and the corresponding two systems of I ₁ signal 103 and Q ₁ signal are read. 104 is output.

Next, an example of signal point arrangement in the mapping circuit 3 is shown in FIG. The arrangement of the signal points shown in FIG.
In the case where n = 3 in the 2 ^n- value code 102 input from, the signal point arrangement usually called 8-phase phase modulation (8PSK) is used so that the amplitude level of each signal point becomes constant. Eight signal points are arranged on the same circle (for example, Masayoshi Murotani, Heiichi Yamamoto: “Digital Radio Communication”, Industrial Book, 1985).

Further, in FIG. 1, the correction signal adding circuit 4 corrects the two systems of outputs I ₁ signal and Q ₁ signal input from the mapping circuit 3 in order to adjust the phase of the carrier wave and the clock during reproduction. However, as shown in FIG. 3, signals of two systems corresponding to the correction signals are added so that the signals are written at the head of each track, and new two systems of I ₂ signal 105 and Q ₂ signal 106 are output.

Here, as the correction signal, for example, as shown in FIG. 4, predetermined 8 code points represented by circles 1 to 8 on the orthogonal plane are represented by circles and the amplitude level is further represented. Some are installed in a large area with respect to a predetermined code point.

The above-mentioned correction signal can be written in a predetermined portion of each recording track or every plural tracks on the magnetic recording medium, and the correction signal point is predetermined on the orthogonal plane. It is possible to set a plurality of areas in the area that can be distinguished from the code points.

Next, in FIG. 1, the two systems of signals output from the correction signal adding circuit 4 are amplified by the quadrature modulation circuit 6 by the carrier wave 107 from the carrier wave generating circuit 5 and the carrier wave 107 having a 90 ° phase difference. The modulated signal 108 is modulated and added to output the modulated signal 108.
The bias signal 109 from the bias signal generating circuit 7 is superposed on the adder 8 and the biased signal 110 is recorded on the magnetic recording medium 10 via the magnetic head 9 for each track.

At the time of reproduction, a carrier wave and a clock are reproduced in a carrier clock reproducing circuit 12 from a reproduced signal 111 reproduced from the magnetic recording medium 10 through a magnetic head 11, and a reproduced carrier wave 112 and a reproduced clock 113 are respectively delayed by carrier waves. Is output to the delay unit 13 and the clock variable delay unit 18, and the carrier wave variable delay unit 13 outputs the reproduced carrier wave 11 accordingly.
2 phase adjustment is performed and phase adjusted carrier wave 114 is output,
The clock variable delay unit 18 adjusts the phase of the reproduction clock 113 and outputs the phase adjustment clock 115.

Then, the above-mentioned reproduced signal 111 is demodulated by the demodulator 14 by using the phase adjusted carrier 114.
Demodulated signals I ₃ signal 116 and Q ₃ signal 117 of 4 to 2 systems
Is output, and the demodulated signal of these two systems and the phase adjustment clock 115 are input, and decoding is performed by the decoder 15, and the decoded digital signal 120 is output to the output terminal 16.

Further, the carrier clock delay control circuit 17
Then, the correction signal addition area and the correction signal non-addition area on the magnetic recording medium are determined from the two systems of demodulation signals input from the demodulator 14, and the correction signal addition area corresponds to the added correction signal. The phase adjustment amounts of the carrier wave and the clock are calculated from the demodulated signals of the two systems, and in the correction signal non-addition area, the phase adjustment amounts of the carrier wave and the clock are calculated from the demodulated signals of the two systems corresponding to the data other than the correction signal, The carrier delay control signal 1 to the carrier variable delay unit 13 with respect to the calculation result of
18 and the clock delay control signal 119 to the clock variable delay unit 18, the phase of the reproduced carrier wave 112 is changed by the carrier variable delay unit, and the phase of the reproduced clock 113 is changed by the clock variable delay unit 18. The error rate of the decoded digital signal 120 output from is controlled to be the lowest.

Here, as a control method used in the carrier clock delay control circuit 17 described above, when the clocks are out of phase, each signal point is dispersed with respect to a predetermined code point on the orthogonal plane. Therefore, the dispersion value σ becomes a large value to some extent, so the delay amount of the clock is controlled so that this dispersion value becomes as small as possible. On the other hand, since the signal point corresponding to each detection signal rotates around the origin of the orthogonal axis, the rotation angle α and the rotation direction are obtained from the correction signal or data other than the correction signal area, and the phase shift is based on that. It is conceivable to correct the quantity.

Next, FIG. 5 shows an embodiment of the carrier clock delay control circuit 17. In the carrier wave clock delay control circuit shown in FIG. 5, the I ₃ signal and the Q ₃ signal which are demodulator outputs are input to the input terminal 51 and the input terminal 52, and the correction signal is as shown in FIG. 4 described above. In addition, since the correction signal point comes to the mark ●, it is possible to determine the correction signal addition area and the non-addition area based on the amplitude level value shown by the dashed line in the figure.

Further, based on the above judgment result, in the correction signal addition area, the two input demodulated signals 501 and 502 are inputted.
Is input to the signal selection switch 55, and in the correction signal non-added area, when the phase of the carrier wave and the clock is adjusted by using the reference code points indicated by ● on the orthogonal plane as shown in FIG. Two demodulated signals 501 and 502
Of the detection data of the area indicated by the broken line with respect to the reference code point and represented within the angle of θ (in the orthogonal plane, in FIG.
Only the two systems of demodulated signals 503 and 504 corresponding to the shaded circle area within the mark 1 ')
3 is input to the signal selection switch 55, the above-described area determination is performed by the area determination unit 54, the output of the signal selection switch 55 is switched based on the area determination result, and the selected two systems of signals 505 and 506 are output. , Memory 56 for a certain period
Accumulated in.

In the actual circuit, the region shown by the broken line and angle θ in FIG. 6 has a step shape because each orthogonal axis coordinate on the orthogonal plane is divided by the quantization level. Further, in the above-described embodiment, the code determiner 53 outputs only the demodulated signals of two systems corresponding to the specific detection data corresponding to only one code point, but the detection points of a plurality of areas or all areas are detected. Two demodulated signals corresponding to data may be output.

Next, in FIG. 5, the demodulated signal group 508 of two systems stored in the memory 56 for a certain period is input, and the dispersion value calculation circuit 57 in the correction signal addition region defines a predetermined 1 on the orthogonal plane. With respect to one or a plurality of correction reference points, the dispersion value 510 of one or a plurality of reproduced correction signal points corresponding thereto is calculated and output, and in the correction signal non-added area, 1 on the orthogonal plane is calculated. A variance value 510 of one or a plurality of detection signal points corresponding to one or a plurality of reference code points is calculated and output, and based on these calculation results 510, the clock delay amount control circuit 58 causes the clock variable delay The clock delay amount output from the device 18 is controlled according to the method described as the control method used in the carrier clock delay control circuit 17 described above. Output terminals click delay control signal 511 6
Output to 1.

In addition, the data stored in the memory 56 for a certain period of time
The demodulated signal group 509 of the system is input, and the average value calculation circuit 59
Then, in the correction signal addition area, an average signal point of one or a plurality of reproduced correction signal points corresponding to the one or a plurality of correction reference points defined in advance on the orthogonal plane is obtained, and the average signal point is obtained. The demodulated signals of two systems are output, and in the correction signal non-added region, the average signal point of one or a plurality of detection signal points corresponding to one or a plurality of reference code points on the orthogonal plane (described above) Signal angle rotated from the reference point by the rotation angle α of α and the angle represented by α in FIG. 6, and outputs the demodulated signals of the two systems corresponding thereto, and the demodulated signals of the two systems representing these average signal point positions. In the carrier delay control circuit 60, the delay amount of the carrier output from the carrier variable delay unit 13 is described as the control method used in the carrier clock delay control circuit 17 described above. The carrier delay control signal 512 controlled in accordance with the above is output to the output terminal 62.

In the embodiment of the carrier clock delay control circuit 17 shown in FIG. 5, the information corresponding to the control signals from the clock delay amount control circuit 58 and the carrier delay amount control circuit 60 is erased even when the power is turned off. It is possible to store the phase information of the carrier wave and the clock corrected by using the correction signal or the data other than the correction signal by storing it in the memory that is not stored and read it again when the power is turned on. By using the phase information, it is possible to adjust the phase of the carrier wave and the clock based on the information that is adjusted once with respect to head wear and changes in circuit characteristics.

As described above, according to the present embodiment, in the magnetic recording / reproducing apparatus using the multi-level amplitude / phase modulation, the initial phase adjustment of the carrier wave and the clock is unnecessary, which is caused by the individual difference of the tape head and the head wear. With respect to the change in the magnetic recording / reproducing characteristics, the phase shift between the carrier wave and the clock is corrected based on the signal recorded on the tape in real time to adaptively delay the carrier wave and the clock in response to the change in the magnetic recording / reproducing characteristics. It is possible to control the quantity and obtain a good decoded data error rate.

Here, in the carrier wave clock delay control circuit 17 shown in FIG. 1, the correction signal addition area and the correction signal non-addition area on the magnetic recording medium are determined from the two systems of demodulation signals input from the demodulator 14. Although the embodiment for judging is described, the information for area judgment is output from the correction signal adding circuit 4, and the information is recorded on the control track by using the control head as shown in FIG. It is also possible to determine the correction signal addition area and the correction signal non-addition area on the magnetic recording medium based on the reproduced area determination information.

As for the correction signal used at that time, as shown in FIG. 8, at one point among the predetermined eight code points in 8PSK represented by circles 1 to 8 on the orthogonal plane. It is also possible to quadrature-modulate the signals of the two systems corresponding to the signal point represented by a black circle 1. By this, the correction signal and the signal other than the correction signal are the same as those shown in FIG. As described above, it is possible to identify without setting the determination level.

Further, by setting the signal point corresponding to the correction signal at a position where the amplitude level is large on the orthogonal plane, it is possible to improve the responsiveness of the carrier wave and clock control system.

[0032]

As described above, according to the present invention, in the magnetic recording / reproducing apparatus using the multi-level amplitude phase modulation, the initial phase adjustment of the carrier wave and the clock is unnecessary, the individual difference of the tape head and the head. For changes in magnetic recording / reproducing characteristics due to wear, by correcting the phase shift between the carrier wave and the clock based on the signal recorded on the tape in real time, the carrier wave is adaptively adapted to the above magnetic recording / reproducing characteristics change. It is possible to obtain a good error rate of decoded data by controlling the delay amount of the clock.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a magnetic recording / reproducing apparatus according to an embodiment of the present invention.

FIG. 2 is an eight-valued signal point arrangement (8PSK) used in the present invention.
Schematic of

FIG. 3 is a diagram showing a recording tape format according to an embodiment of the present invention.

FIG. 4 is a schematic diagram of code point arrangement and correction signal point arrangement in one embodiment of the present invention.

FIG. 5 is a configuration diagram of an embodiment of a carrier clock delay control circuit used in the present invention.

FIG. 6 is a schematic diagram of code point arrangement and detection signal point distribution in the present invention.

FIG. 7 is a diagram showing a recording tape format according to another embodiment of the present invention.

FIG. 8 is a schematic diagram of code point arrangement and correction signal point arrangement in the embodiment of the present invention.

[Explanation of symbols]

 2 Encoder 3 Mapping circuit 4 Correction signal addition circuit 5 Carrier wave generation circuit 6 Quadrature modulation circuit 7 Bias signal generation circuit 8 Adder 9 Magnetic head 10 Magnetic recording medium 11 Magnetic head 12 Carrier wave clock reproduction circuit 13 Carrier wave variable delay device 14 Demodulation 15 Decoder 17 Carrier wave clock delay control circuit

Claims (2)

[Claims] 1. An encoder that encodes an input digital signal for each n (n is an integer of 1 or more) bits and outputs a 2 ⁿ -value code, and the 2 ⁿ -value code is a predetermined 2 on an orthogonal plane. 2 assigned to the corresponding code point of the ⁿ points
Corresponding to the correction signal so that the mapping circuit that outputs the system signal and the correction signal that corrects the phase of the carrier wave and the clock are written in a predetermined part of each recording track or multiple tracks on the magnetic recording medium The correction signal adding circuit for adding the two systems of signals to the two signals of the mapping circuit output and outputting the new two systems of signals, and the two systems of signals from the correction signal adding circuit from the carrier wave generating circuit. A quadrature modulation circuit that performs quadrature modulation using the carrier wave and outputs a modulated signal; a bias applying unit that superimposes a bias signal on the recording signal that is the output of the quadrature modulation circuit; and a magnetic head that applies the biased recording signal. A magnetic recording / reproducing section for recording and reproducing on a magnetic recording medium via a reproduction signal reproduced through a magnetic head in the magnetic recording / reproducing section. A carrier clock regenerating circuit that regenerates a transmission wave and a clock, a carrier variable delay device that performs phase adjustment of the regenerated carrier regenerated from the carrier clock regenerating circuit and outputs a phase adjusted carrier, and a carrier regenerator that regenerates from the carrier clock regenerating circuit. A clock variable delay device that performs phase adjustment of the reproduction clock and outputs a phase adjustment clock, a demodulator that demodulates the reproduction signal with the phase adjustment carrier and outputs two systems of demodulation signals, and the two systems of demodulation signals A decoder which receives the phase adjustment clock as an input and performs decoding to output a decoded digital signal, a carrier delay control signal to the carrier variable delay unit and a clock delay control to the clock variable delay unit based on the demodulated signals of the two systems The signal and the carrier and clock delay amounts are set so that the error rate of the decoded digital signal becomes the lowest. A magnetic recording / reproducing apparatus comprising a carrier clock delay control circuit for controlling, wherein the carrier clock delay control circuit determines a correction signal addition area from two input demodulation signals, and adds a correction signal addition area in the correction signal addition area. The phase adjustment amount of the carrier wave and the clock is calculated from the demodulated signals of two systems corresponding to the corrected signal,
In the correction signal non-addition area, the phase adjustment amount of the carrier wave and the clock is calculated from the demodulation signals of two systems corresponding to the data other than the correction signal, and the delay amount is controlled by the carrier wave variable delay unit and the clock variable delay unit according to the calculation result. A magnetic recording / reproducing apparatus characterized by outputting a signal. 2. A correction area information is output from the correction signal adding circuit for detecting an addition area of the correction signal on the magnetic recording medium, and the information is sent to a control track on the magnetic recording medium via a control head. The carrier wave clock delay control circuit determines the correction signal addition area from the correction area information reproduced via the control head, and in the correction signal addition area, two systems corresponding to the added correction signal are recorded. The phase adjustment amount of the carrier wave and the clock is calculated from the demodulation signal of, and the phase adjustment amount of the carrier wave and the clock is calculated from the demodulation signals of two systems corresponding to the data other than the correction signal in the correction signal non-addition area, and the calculation result is obtained. 2. The magnetic recording / reproducing apparatus according to claim 1, wherein a delay amount control signal is output to the carrier variable delay unit and the clock variable delay unit.