JPH06314236A - Memory allocating method for memory cartridge - Google Patents

Abstract

PURPOSE:To refer to a program and identification information without switching a bank by allocating a memory area storing the program and identification information to an address space except for a memory bank area to which CPU can directly access. CONSTITUTION:A ROM card 9 is connected to a main body-side by a connector 10. The prescribed memory area of dictionary ROM 11 in the ROM card 9 is allocated to the prescribed address space except for the memory bank area to which CPU 1 can directly access. Thus, the prescribed area of dictionary ROM 11 can be accessed when CPU 1 accesses to the prescribed address in spite of the content of a bank register 14. When the program and identification information are stored in the area of the ROM card 9, the program and identification information can be read without setting them in the bank register 14, and control becomes easy.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for allocating memory in a cartridge in a system having a removable memory cartridge and arranging the memory of the memory cartridge as a memory bank.

[0002]

2. Description of the Related Art As disclosed in Japanese Utility Model Publication No. 59-37888, memory cartridges have been conventionally used in electronic devices such as electronic dictionaries, and each memory cartridge stores dictionary contents in different languages. In addition, by replacing the memory cartridge, it is possible to deal with a plurality of languages.

Further, in a system having a large memory capacity and the memory cannot be accommodated in an address space which can be directly accessed by the CPU, by disposing the memory as a bank as disclosed in Japanese Patent Laid-Open No. 60-33644. , I was trying to expand the memory area.

[0004]

For example, when the dictionary memory has a large capacity in an electronic dictionary, the conventional bank switching method is used, and the memory of the memory cartridge is arranged as a memory bank in the same address space as the internal dictionary memory. It is possible to do it.

However, a part of the memory of the memory cartridge stores identification information indicating the characteristics of each memory cartridge such as a program and dictionary type, and data processing is performed by this program and the program in the electronic dictionary body. In the case of a system in which the identification information is read to determine a data processing execution routine, the bank is simply switched by the bank register as in the conventional system, and the bank and the identification information are stored in the memory cartridge each time the reference is made. This was very troublesome because the selection information had to be set in the register to switch the memory bank.

[0006]

According to the present invention, in a system in which a removable memory cartridge is mounted in an electronic device, identification information or a program indicating the nature of the memory cartridge is stored in a first memory area of the memory cartridge. Then, the data portion is stored in the second memory area, the second memory area is allocated as a memory bank to a memory bank area provided in a part of the address space of the electronic device, and the first memory area is stored in the memory. The above problem is solved by allocating to a predetermined address space other than the bank area.

[0007]

According to the present invention, a part of the memory of the memory cartridge is allocated to a predetermined address space other than the memory bank area which can be directly accessed by the CPU. Therefore, the program and the identification information stored in this area are allocated. It is possible to refer to these programs and identification information without performing bank switching.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 is a block diagram showing the configuration of an electronic dictionary including an embodiment of the present invention, (1) is a CPU, and (2)
Is a 20-bit address bus of A _{0 to} A ₁₉ , and (3) is D ₀
~ D ₇ data bus, (4) stored program 1
28KB system ROM, (5) 256KB font ROM, (6) RAM, (7) and (8) are 512KB dictionary ROM1 and dictionary ROM2, (9) constituting an internal dictionary such as an English-Japanese dictionary. Connector (10)
Is a removable ROM card in which the address bus, data bus, and control line are connected to the main body side by, for example,
512KB dictionary ROM3 (11) that constitutes the Japanese-English dictionary
And a dictionary ROM 4 (12). And dictionary ROM
(7), (8), (11), and (12) are memory banks 0 to
3 is allocated in the same address space.

Further, (13) is a memory bank selection circuit, and bank selection information BK0 is provided via the data bus (3).
And BK1 are set, and the outputs Q ₀ and Q ₁ of the bank register (14) are input to the input terminals A and B, respectively, and the selection signal Y corresponding to the bank selection information is input.
And ₀ to Y ₃ bank decoder that outputs (15), address decoder enter the address A _17, A _18, A ₁₉ each input terminal A, B, C, and generates an output signal Y ₀ to Y ₇ (1
6), an AND gate (17) for inputting the output signal Y ₀ of the address decoder (16) and the address A ₁₆ , and an AND
The output signal P of the gate (17) and the decoder for bank (1
OR gate (18) for inputting the selection signal Y _{2 of} 5)
And the output signals Y _{1 to} Y ₄ of the address decoder (16), and the output of the OR gate (19) connected to the G terminal of the bank decoder (15). The selection signals Y ₀ , Y ₁ , and Y ₃ of the bank decoder (15) are connected to the chip enable terminals CE of the dictionary ROMs (7), (8), and (12), respectively, with AND gates (20), (). 21),
Dictionary ROM (11) connected via (23)
The OR gate (18) is connected to the chip enable terminal CE of
Output signal R is connected via an AND gate (22).

The AND gates (20) (21) (2
2) (23) are gates for allowing the dictionary ROM to be selected only when the read signal RD is output from the CPU (1).

By the way, the decoders (15) and (16)
Have the same configuration, the signal Y ₀ is “1” when the input signals to the input terminals A, B, and C are “000”, and the signal Y ₁ is “1” when the signal is “100”. , The signal Y ₇ is "1", one of Y ₀ to Y ₇ is sequentially set to "1" according to the input signal, and the signal "1" is applied to the G terminal. Generates output only while is input.

Therefore, in this embodiment, the addresses A ₁₉ , A
_The bank decoder (15) outputs a selection signal only when ₁₈ and A ₁₇ are in the range of "001" to "100". At this time, if the bank information BK1 and BK0 are "00", the dictionary ROM
(7) is selected and if it is "01", dictionary ROM
(8) If "10", dictionary ROM (11), "1"
If it is "1", the dictionary ROM (12) is selected. That is, as shown in the memory map of FIG. 2, the dictionary ROMs (7) to (12) are arranged in the same address space 20000H to 9FFFFH of the CPU (1) as bank 0, bank 1, bank 2 and bank 2, respectively. Allocated as 3. Then, the addresses in each bank are designated by the addresses A _{0 to} A ₁₈ . System ROM (4), font ROM
(5) and RAM (6) are the memory bank area 20000
Allocated to an address space other than H to 9FFFFH.

By the way, in this embodiment, the addresses A _{16 to} A ₁₉ are provided by the address decoder (16) and the AND gate (17).
An address decoder for decoding the upper 4 bits of the address is configured, and the addresses A ₁₉ , A ₁₈ , A ₁₇ , and A ₁₆ are "00".
01 ”, the output signal P of the AND gate (17) is“ 1 ”
Accordingly, the output signal R of the OR gate (18) also becomes "1", and the dictionary ROM (11) of the bank 2 in the ROM card (9) is selected. Here, in the address space of the CPU (1), the addresses A ₁₉ , A ₁₈ , A ₁₇ , and A ₁₆ become “0001” in the second area other than the memory bank area.
In the dictionary ROM (11) of the memory bank 2, which is the address space of 10000H to 1FFFFH indicated by the diagonal lines in FIG. 2, the memory area in which the addresses A ₁₈ , A ₁₇ , and A ₁₆ are designated by “001” is shown in FIG. 90000H to 9 shown with diagonal lines
FFFFH.

That is, the dictionary ROM of the ROM card (9)
The memory area of 90000H to 9FFFFH in (11) is a predetermined address space 10000H to 1FFFF other than the memory bank area directly accessible by the CPU (1).
It is assigned to H. Therefore, the bank register
Regardless of the contents of (14), if the CPU (1) accesses a predetermined address 10000H to 1FFFFH, the ROM
90000H to 9 in the dictionary ROM (11) of the card (9)
FFFFH can be accessed. Therefore, RO
If programs and identification information are stored in this area of the M card (9), these programs and identification information can be read out without setting in the bank register (14), and control becomes simple.

For example, as an external program, a subroutine for initializing and a main processing program are stored, and as identification information, information A indicating whether or not the dictionary ROM is correct, information B indicating presence / absence of a subroutine for initializing, a main processing program. When the processing shown in the flowchart of FIG. 3 is to be executed in the system program of the system ROM (4) on the main body side by storing the information C indicating the presence or absence of , 7,
Set "10" in the bank register (14) in front of 9, and in front of STEP-2, 4, 6, 8
Although "00" had to be set in (14), these settings are completely unnecessary in this embodiment.

[0016]

According to the present invention, in the memory cartridge, the memory area storing the program and various identification information is allocated to a predetermined address space other than the memory bank area directly accessible by the CPU. Reading can be performed without switching, high-speed processing can be realized, and the system program can be simplified.

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention.

FIG. 2 is a memory map in this embodiment.

FIG. 3 is a flowchart showing a specific example of a system program.

[Explanation of symbols]

 (1) CPU (4) System ROM (7) (8) (11) (12) Dictionary ROM (9) ROM card (13) Memory bank selection circuit (14) Bank register (15) Decoder (16) Address decoder ( 17) AND gate (18) OR gate

Claims (1)

[Claims] 1. In a system in which a removable memory cartridge is mounted in an electronic device, identification information or a program representing the property of the memory cartridge is stored in a first memory area of the memory cartridge, and data is stored in a second memory area. Storing the portion and allocating the second memory area as a memory bank in a memory bank area provided in a part of the address space of the electronic device,
A memory allocation method for a memory cartridge, wherein the first memory area is allocated to a predetermined address space other than the memory bank area.