JPH06329497A - Method for molding crystalline thin film - Google Patents

Abstract

PURPOSE:To produce a crystalline thin film capable of forming a film of single phase having excellent film qualities on a substrate even if the thin film has poor conformity to the substrate because of strong anisotropy and different crystal structure. CONSTITUTION:In a method for forming a crystalline thin film on a substrate, a buffer layer comprising component elements of the crystalline thin film, being followed by a structural phase transition, is formed, further temperature is changed, the crystalline thin film is formed and the buffer layer is subjected to phase transition to give a thin film of single phase.

Description

Detailed Description of the Invention

The present invention relates to a method for forming a thin film such as a metal oxide thin film. More specifically, the present invention relates to a method for forming a crystalline thin film used in a semiconductor memory device, a piezoelectric element, an electro-optical element, etc., which uses a ferroelectric film.

[0002]

2. Description of the Related Art In recent years, much research has been conducted on the application of ferroelectrics to memories and capacitors of integrated circuits. Among them, the memory using the ferroelectric material can reduce the cell area to the same as or smaller than that of the DRAM, and
Non-volatile DRA by adding non-volatile like
It can be used as M.

As a structure of a nonvolatile semiconductor memory device using such a ferroelectric film, for example, FIG.
As shown in (c), metal film-ferroelectric film-FET having a semiconductor layer structure (hereinafter referred to as MFS-FET), metal film-
FET having a ferroelectric film-insulating film-semiconductor layer structure (hereinafter referred to as M
FIS-FET), metal film-ferroelectric film-metal film-insulating film-semiconductor layer structure FET (hereinafter referred to as MFMIS-).
FET) is being considered.

First, FIG. 6A shows an example of the MFS-FET structure. For example, a ferroelectric film is formed on the surface of a p-type semiconductor substrate 21.
27 and a gate electrode 28 are formed, and an n ⁺ type impurity region is formed on both sides of the channel region 26 on the surface of the semiconductor substrate 21 below the ferroelectric film 27 to form a source region 22 and a drain region 23. Formed, and an MFS-FET is formed. Here, the ferroelectric film 27 is made of PZT (Pb (Zr _1-x Ti _x ) O ₃ ) or P having an oxide perovskite structure.
LZT (Pb _1-x La _x (Zr _1-y Ti _y ))
_{1-x / 4 O 3)} , are considered in terms of polarization characteristics of PbTiO _3, it is used as the BaTiO ₃ ferroelectric.
Further, it is considered that platinum is used for the gate electrode 28 from the viewpoint of compatibility with the ferroelectric film 27.

FIG. 6 (b) shows an example of the MFIS-FET structure in which, for example, Ca is provided between the ferroelectric film 27 and the semiconductor substrate 21.
By interposing the insulating film 25 such as F ₂ or SiO ₂ , Pb, Ti, etc. of PZT, which is the ferroelectric film 27, is prevented from melting into the semiconductor substrate 21.

Further, FIG. 6C shows an example of the MFMIS-FET structure in which an electrode film 24 of platinum or the like is further interposed between the ferroelectric film 27 and the insulating film 25 of (b). The electrode film 24 improves the orientation of the ferroelectric film 27. That is, the insulating film 25 such as SiO ₂ is amorphous, the ferroelectric film 27 such as PZT is crystalline, and when the ferroelectric film 27 is formed on the amorphous film, the film has no orientation. However, the platinum film is obtained as a film having a (111) orientation, and PZT formed thereon is also a crystalline film having an orientation.

When a voltage is applied between the gate electrode 28 of the MFS-FET and the semiconductor substrate 21 so that the gate electrode 28 is polarized to a positive voltage, the voltage shown in FIG.
As shown in (d), the polarization is caused and electrons are induced in the channel region 26 of the semiconductor substrate 21 to form a depletion layer. Therefore, by dividing the memory state into two types, that is, when a voltage above the coercive electric field is applied to the gate electrode and when it is not applied to the gate electrode, when the voltage above the coercive electric field is applied, the gate state is Even if the electrode is 0V, it becomes conductive when a voltage is applied to the source region 22 and the drain region 23 of the n ⁺ type region, and it becomes strong through a sense amplifier (not shown) connected to the source region 22. The storage state of the dielectric film 27 can be read.

[0008]

When an oxide ferroelectric film is directly formed on a semiconductor layer such as silicon as in the MFS structure described above, SiO ₂ or the like is formed at the interface between the ferroelectric film and the semiconductor layer. Unnecessary film is generated. When such a film is formed, not only the operating voltage is increased, but also electrons are trapped in the film due to generation of a trap level, and there is a problem that charges due to remanent polarization are canceled.

Further, in the MFIS structure provided with a buffer layer, a substance which can be mentioned as a buffer layer, for example, Ca
F ₂ , ZrO ₂ , SiO _{2 and the} like all have a small relative permittivity of about 3 to 7 as compared with a ferroelectric substance, and when a laminated capacitor structure with a ferroelectric film is formed, most of the electric field is taken up by the buffer layer. Therefore, it is necessary to apply a large voltage in order to apply a sufficient electric field to the ferroelectric film. As a countermeasure against this, it is conceivable to thin the buffer layer, but thinning techniques such as CaF ₂ and ZrO ₂ have not been advanced, and the thinning causes a contradictory phenomenon that the dielectric breakdown becomes small. Further, the ferroelectric thin film cannot be formed on SiO ₂ with good adhesion, resulting in a decrease in reliability, and the structure for providing the buffer layer has not been put to practical use.

Further, even in the MFMIS structure, most of the applied voltage is applied to the above-mentioned low dielectric constant dielectric film, and a high voltage is applied in order to apply an electric field sufficient for polarization reversal of the ferroelectric film. There is a problem that it must be applied.

Further, when forming a crystalline thin film having a particularly strong anisotropy such as a ferroelectric thin film, the lattice constant and the adhesiveness with the substrate surface are matched depending on the material of the underlying substrate. There is a problem that the crystal orientation is deteriorated due to the lack of properties, and the film quality becomes extremely poor.

As a ferroelectric film used in the above-mentioned semiconductor memory device, use of a lead-based oxide ferroelectric substance such as PZT has been studied as described above. Since the relative permittivity of the body is considerably large, around 300 to 1000, and the coercive electric field is large, the operating voltage becomes high, making it difficult to adapt to the recent miniaturization of integrated circuits and the reduction of operating voltage.
However, there is a problem in that a material having a large relative dielectric constant and a small coercive electric field cannot be formed on a substrate such as a semiconductor with good crystallinity.

It is an object of the present invention to solve such problems and provide a method for forming a crystalline thin film as a good quality film regardless of compatibility with a substrate.

[0014]

The method for forming a crystalline thin film of the present invention is a method for forming a crystalline thin film on a substrate,
A single-phase thin film is formed by forming a buffer layer consisting of the constituent elements of the crystalline thin film with a structural phase transition, and further changing the temperature to form the crystalline thin film and the phase transition of the buffer layer. It is characterized by

The crystalline thin film may be a ferroelectric film.

It is preferable that the buffer layer is Bi ₂ Ti ₂ O ₇ and the crystalline thin film is Bi ₄ Ti ₃ O ₁₂ because the coercive electric field is small and the ferroelectric film is used in a semiconductor memory device or the like.

According to the method of manufacturing a semiconductor memory device of the present invention, a channel region and sources / sources provided on both sides of the channel region are provided.
A method of manufacturing a semiconductor memory device comprising a drain region and a ferroelectric film provided on the channel region, wherein the ferroelectric film is formed by the method according to claim 1. It is a thing.

Here, the buffer layer with structural phase transition means
For example, a material such as Bi ₂ Ti ₂ O ₇ that is transformed from a crystal structure of a paraelectric material to Bi ₄ Ti ₃ O ₁₂ which is a ferroelectric material having a different crystal structure with the same component element depending on temperature, The desired crystalline thin film (eg Bi ₄ Ti ₃ O
₁₂ ) An intermediate layer made of a material that is compatible with both.

[0019]

According to the present invention, in forming a crystalline thin film having a crystal orientation that is poorly compatible with the substrate, a buffer layer having good compatibility with both the substrate and the desired crystalline thin film is interposed. Therefore, a dense and high-quality crystalline thin film can be formed. Moreover, since the buffer layer undergoes a phase transition by the subsequent heat treatment and becomes in the same phase as the crystalline thin film, a film having a small dielectric constant does not exist, and the coercive electric field characteristics are not adversely affected.

[0020]

EXAMPLES Next, a method for forming a crystalline thin film of the present invention will be described.

From the viewpoint of lowering the operating voltage of the semiconductor memory device using the above-mentioned ferroelectric film, the present inventor has proposed a ferroelectric film having a low coercive electric field, a large relative permittivity, and a certain degree of residual polarization. Focusing on the bismuth layered structure ferroelectric substance of Bi ₄ Ti ₃ O ₁₂ , the inventors made extensive studies on the film formation thereof.

Bi ₄ Ti ₃ O ₁₂ is a kind of deformed perovskite structure, has a very strong anisotropy, and has spontaneous polarization Ps.
Is in a direction inclined by about 5 ° from the a-axis in the ac plane. Therefore, the spontaneous polarization of the c-axis is less than 1/10 of that of the a-axis, but the coercive electric field Ec is also similarly small. Can be said to be more advantageous. The coercive electric field in the c-axis direction is 4 kV / cm, the remanent polarization is 4 μC / cm ² , and the relative dielectric constant is 130.

This Bi ₄ Ti ₃ O ₁₂ c-axis oriented film has a very small polarization reversal voltage and can be applied to low voltage LSIs and the like. However, Bi ₄ Ti ₃ O ₁₂ has a very complicated crystal structure and has a very strong anisotropy.
No good c-axis alignment film has been obtained. Therefore the present inventors have studied intensively, very dense (111) direction is strongly oriented Bi ₂ Ti ₂ O ₇ thin film is example when formed at a low temperature below 500 ℃ the bismuth layer structure, the Bi ₂ Ti ₂
The O ₇ thin film undergoes a phase transition to Bi ₄ Ti ₃ O ₁₂ when the substrate temperature is raised to about 630 ° C. or higher in an O ₂ atmosphere, and a single phase is formed together with Bi ₄ Ti ₃ O ₁₂ formed on Bi ₂ Ti ₂ O _7. Bi ₄ Ti
It has been found that a good quality film of ₃ O ₁₂ can be obtained.

Bi ₂ Ti ₂ O oriented in the (111) direction
₇ can be formed with good compatibility with Pt on the surface of Pt / SiO ₂ / Si (100) substrate such as lattice constant and adhesion, and also with Bi ₄ Ti ₃ O ₁₂ with good compatibility. That is, Bi ₂ Ti ₂ O ₇ is a cubic crystal having a lattice constant of a = 20.68Å, and the oxygen-oxygen distance is 5.17Å. Therefore, the oxygen-oxygen distance on the (111) plane is 5.17 × 2.
^1/2 = 7.311 Å.

Bi ₄ Ti ₃ O ₁₂ has a lattice constant of a = 5.51Å
Since (b = 1.007a), the Bi ₄ Ti ₃ O ₁₂ (00
1) The lattice constant mismatch between the (111) face of Bi ₂ Ti ₂ O ₇ and Bi ₂ Ti ₂ O ₇ is about 6% when grown at a shift of 45 °, and the O − O _{4 number} of Bi ₄ Ti ₃ O ₁₂ and Bi when Ti is grown without shift. ₂ Ti
₂ O ₇ O-O 3 (In the unit cell, Bi ₄ Ti ₃ O ₁₂ 4
Bi ₂ Ti ₂ O ₇ 3/4) for each piece, mismatch 0.
It will be less than 7%, and the mismatch will be very small anyway. Further, Bi ₂ Ti ₂ O ₇ has a relative dielectric constant of about 10
It is as small as ~ 20, but when the temperature is raised to around 630 ℃, Bi ₄
Since it is transformed into Ti ₃ O ₁₂ , no Bi ₂ Ti ₂ O ₇ remains and the electric field is not consumed in this portion.

As described above, the present invention is characterized in that the substrate and the desired ferroelectric film Bi ₄ Ti ₃ O ₁₂ are formed by interposing a buffer layer having a good compatibility therewith.
The i-based layered structure has a dense B layer as a buffer layer at 480 ° C.
An i ₂ Ti ₂ O ₇ thin film is formed, and the temperature profile during film formation is shown in FIG. 1 by utilizing the fact that Bi ₂ Ti ₂ O ₇ in the buffer layer is transformed into Bi ₄ Ti ₃ O ₁₂ at around 630 ° C. As shown in the figure, after the buffer layer is formed at a low temperature, the temperature is increased while forming the original crystalline film, and the buffer layer is originally formed by raising the temperature above the phase transition. To form a dense, high-quality single-phase film.

It should be noted that the MOCV which is usually used for forming the film is used.
It can also be produced by the D method, the CVD method, the sputtering method, the laser ablation method, or the like.

Also, the compatibility of Bi ₂ Ti ₂ O _{7 with} the substrate does not pose a problem so much and is not limited to the Pt / SiO ₂ / Si (100) substrate, but Pt / Ti / SiO ₂ / Si (100), Si
It is also possible to form a dense film on an O ₂ / Si (100) or Si (100) substrate.

In the above description, the example of the Bi-based layered structure ferroelectric material was described as the ferroelectric film, but the ferroelectric film is not limited to this example, and a thin film formed at such a low temperature is used for the dielectric film of the perovskite structure. It has the property of undergoing a phase transition at high temperatures. For example, PZT forms a Pb ₂ Ti ₂ O ₇ film at about 400 ° C., and at about 600 ° C. or higher, it transforms to PbTiO ₃ to form a dense film. A high quality ferroelectric film can be formed.

In examining the film formation of Bi ₄ Ti ₃ O ₁₂ , as a result of various film formations, Pt / SiO ₂ / Si (1
00) Substrate Bi ₄ Ti ₃ O ₁₂ at 530 to 650 ℃
, A thin film of Bi ₄ Ti ₃ O ₁₂ oriented in the c-axis was obtained at 550 to 630 ° C., but the film quality was poor and the surface was very rough. At temperatures lower than 530 ° C, the (111) oriented pyrochlore phase (Bi ₂ Ti ₂ O
_7), pyrochlore phase of the non-alignment has been painting at a temperature higher than 650 ℃.

Further, when sapphire is used for the substrate, a single phase of Bi ₄ Ti ₃ O ₁₂ is obtained at around 650 to 700 ° C., and on the Pt / Ti / SiO ₂ / Si (100) substrate or Si substrate. Bi ₄ Ti ₃ O ₁₂ single phase at 750 ℃ or less,
Bi ₂ Ti ₂ O ₇ single phase or Bi ₂ Ti ₂ O ₇ and Bi ₄
Although it became a mixed phase of Ti ₃ O ₁₂ , a smooth film having good film quality was obtained.

Bi is used as the above-mentioned buffer layer.
_If a thin film of ₂ O ₃ or TiO ₂ is used, Bi ₄ Ti
_Although the c-axis orientation of ₃ O ₁₂ was slightly improved, the large film quality was not improved.

Next, a more detailed description will be given with reference to the drawings with reference to specific embodiments.

Example 1 FIG. 1 is a diagram showing a temperature profile of an example of a method for forming a crystalline thin film of the present invention, and FIG. 2 is an MOC for forming the thin film.
FIG. 3 is a schematic view of a VD apparatus, FIG. 3 is an X-ray diffraction chart of the thin film, FIG. 4 is a rocking curve of Bi ₄ Ti ₃ O ₁₂ (006) plane, and FIG. 5 is a D-E hysteresis loop of the thin film of this example.

First, the reaction furnace 1 of the MOCVD apparatus shown in FIG.
Pt / SiO ₂ with a silicon oxide film and platinum provided on the surface of a silicon substrate having a crystal orientation of (100) on the susceptor _{2 of}
/ Si (100) substrate 3 is placed, Ti material source 5 and Bi
Ti (i-OC ₃₎ set at about 35 ° C. as the material source 6
H ₇ ) ₄ gas and BiPh set to 120-170 ° C
Each of the _three gases was used and introduced into the reaction furnace 1 together with Ar gas from the carrier gas source 7 through the pipes 10 and 11 covered with the ribbon heater 9. The Ti (i-OC ₃ H ₇ ) ₄ gas pipe 10 is kept at about 50 ° C. by the ribbon heater 9 and
The piping 11 of the iPh ₃ gas is 170 to 20 by the ribbon heater 9.
It was kept at 0 ° C. The flow rate of Ar gas as a carrier gas is about 20 sccm as a carrier gas of Ti (i-OC ₃ H ₇ ) ₄ gas, about 80 sccm as a carrier gas of BiPh ₃ gas, and the flow rate of oxygen gas is about 200 sccm. The pressure in the reaction furnace was 5 Torr. In FIG. 2, 4 is an exhaust pump, and MFC is a flow rate controller (mass flow controller).

In this example, as shown in the temperature profile in FIG. 1, the substrate temperature was first set to 480 ° C. and the aforementioned gas was introduced into the reaction furnace 1 to grow a thin film for 10 to 30 minutes. At that time, the thin film was Bi ₂ Ti ₂ O ₇ and the film thickness was about 10 to 30 nm. After that, the substrate temperature was raised to 640 ° C over about 10 minutes. At this time, at about 530 to 630 ° C, Bi ₂ Ti ₂ O ₇
This means that the Bi ₄ Ti ₃ O ₁₂ thin film is grown on the thin film. And since becomes a 630 ° C. or higher Bi ₂ Ti ₂ O ₇ is a phase transition to the _{Bi 4 Ti 3 O 12, Bi} 4 Ti 3 O 12
It was possible to form a single-phase film of That is, Bi
Each growth in the initial stage of growth of ₄ Ti ₃ O ₁₂ is Bi ₂
Since it is carried out on the Ti ₂ O ₇ (111) surface, it can grow with good crystallinity, and after that, the film is formed at about 640 ° C. for about 5 hours.
A single film of i ₄ Ti ₃ O ₁₂ was obtained with a thickness of about 250 nm.
In FIG. 1, A indicates the type of film grown by temperature,
B indicates the temperature at which the phase transition occurs.

An X-ray diffraction chart of the Bi ₄ Ti ₃ O ₁₂ thin film thus grown on the Pt / SiO ₂ / Si (100) substrate with the Bi ₂ Ti ₂ O ₇ buffer layer provided,
The rocking curves of the i ₄ Ti ₃ O ₁₂ (006) plane are shown in FIGS. 3 (a) and 4 (a), respectively. In addition, an X-ray diffraction chart when Bi ₄ Ti ₃ O ₁₂ was directly grown on a Pt / SiO ₂ / Si (100) substrate without providing a buffer layer and a Bi ₄ Ti ₃ O ₁₂ (006) plane The rocking curves are shown in FIG. 3 (b) and FIG. 4 (b), respectively. Figure 3
As is clearer, the thin film of Bi ₄ Ti ₃ O ₁₂ formed after forming the buffer layer according to this example has a large X-ray diffraction intensity, and the sum of the intensity of (00k) and the intensity of the other directions are It can be seen that the c-axis orientation, which is the sum ratio, is improved. Further, in FIG. 4, it is shown that the smaller the full width at half maximum is, the better the crystallinity is. However, as is clear from FIG. 4, it is far better to provide the buffer layer according to the present embodiment. ing. Regarding the surface morphology, the surface provided with the buffer layer according to this example had a very smooth surface.

Further, Bi ₄ Ti obtained by this embodiment is used.
FIG. 5 shows the DE hysteresis loop, which is the polarization (μC / cm ² ) characteristic of the ₃ O ₁₂ thin film with respect to the applied electric field. At this time, the film thickness is 230 nm, the area is 2.3 × 10 ⁻⁴ μm ² ,
The frequency was 10 kHz. The relative permittivity of this thin film was about 180.

Example 2 As shown in FIG. 6 described above, for example, a gate insulating film and a Pt film are formed on a p-type semiconductor substrate by a CVD method and a sputtering method, respectively, and then Bi _{2 is formed by the} above method.
Ti ₂ O ₇ and Bi ₄ Ti ₃ O ₁₂ are sequentially formed while changing the temperature, and finally a single phase film of Bi ₄ Ti ₃ O ₁₂ is formed.
Formed in the range of 1500 to 3000Å. After that, a Pt film is formed again, patterned, and further ion-implanted to form the source / source.
A drain region was formed to form a semiconductor memory device.

As for the structure of the semiconductor memory device, not only the MFMIS structure but also the MFIS structure and the MFS structure were carried out, and a semiconductor memory device with high characteristics was obtained similarly.

[0041]

According to the present invention, it is possible to obtain a crystalline thin film having a high quality, such as a ferroelectric film having a herovskite structure, which has good compatibility with the substrate regardless of the properties of the substrate.

Moreover, Bi ₄ Ti ₃ O is used as the ferroelectric film.
₁₂ can be formed and the coercive electric field can be reduced, which greatly contributes to downsizing and reduction in operating voltage of the semiconductor memory device.

[Brief description of drawings]

FIG. 1 is a diagram showing changes over time in temperature conditions and changes in the crystal structure of a thin film in one embodiment of the thin film forming method of the present invention.

FIG. 2 is an MOC used in the thin film forming method of the present invention.
It is a schematic explanatory drawing of a VD apparatus.

FIG. 3 is a view showing an X-ray diffraction pattern of a thin film obtained by an example of the thin film forming method of the present invention.

FIG. 4 is a diagram showing a rocking curve of a (006) plane of a thin film obtained by an example of the thin film forming method of the present invention.

FIG. 5 is a diagram showing a DE hysteresis loop of a thin film obtained by an example of the thin film forming method of the present invention.

FIG. 6 is an explanatory diagram of a semiconductor memory device using a ferroelectric substance.

[Explanation of symbols]

 3 substrates

─────────────────────────────────────────────────── ─── Continuation of the front page (51) Int.Cl. ⁵ Identification code Internal reference number FI technical display location H01L 21/02 B 27/108

Claims (4)

[Claims] 1. A method for forming a crystalline thin film on a substrate, comprising forming a buffer layer comprising a constituent element of the crystalline thin film with a structural phase transition, and further changing the temperature to form the crystalline thin film. A method for forming a crystalline thin film, characterized in that a thin film of a single phase is formed by forming a film and forming a phase transition in the buffer layer. 2. The method for forming a crystalline thin film according to claim 1, wherein the crystalline thin film is a ferroelectric film. 3. The method for forming a crystalline thin film according to claim 1, wherein the buffer layer is Bi ₂ Ti ₂ O ₇ and the crystalline thin film is Bi ₄ Ti ₃ O ₁₂ . 4. A method of manufacturing a semiconductor memory device comprising a channel region, source / drain regions provided on both sides of the channel region, and a ferroelectric film provided on the channel region. A method of manufacturing a semiconductor memory device, wherein the dielectric film is formed by the method according to claim 1.