JPH06334178A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To reduce parasitic resistance and increase heat radiation by forming a channel region into SIO structure and a source and a drain region into bulk structure. CONSTITUTION:An Si thin film 16 is formed as a semiconductor film in a channel region on a thermal oxidation film 14. Further, a gate oxide film 18 is formed on the Si thin film 16 to form a gate electrode 20 thereon. And then on the Si thin film 16 formed are an N-type source and an N-type drain region 22, 22b into bulk structure so as to overlap a part of a field oxide layer 12. Thereby, an Si thin film is formed in a channel region to make SOI structure. On the other hand, the source and the drain region make bulk structure to be thicker as compared to the channel region. Therefore, a parasitic resistance produced in the source and drain regions can be reduced. Further, with bulk structure, the source and drain regions are formed directly on a semiconductor substrate, so that heat generated in those regions may be efficiently radiated to the semiconductor substrate.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention is applied to SOI (silico)
The present invention relates to a semiconductor device having a non-insulator structure.

[0002]

2. Description of the Related Art There is known a semiconductor device having an SOI structure by an SOI technique in which a Si single crystal thin film is formed on an insulating layer and an LSI (integrated circuit) is formed on the thin film.

FIG. 3 is a sectional view of a conventional semiconductor device having an SOI structure. A Si thin film 3 is formed on an insulating film 2 formed on a semiconductor substrate 1 which is a Si wafer,
The gate electrode 6 is formed on the Si thin film 3 with the gate insulating film 5 interposed therebetween. The Si thin film immediately below the gate insulating film 5 is a channel forming region, and the source and drain regions 4a and 4b are formed in the Si thin film adjacent to the channel forming region.
The Si thin film is formed in a film thinner than the depletion layer extending when the three channels are formed.

In the semiconductor device having the SOI structure, since the complete element isolation structure can be realized, the parasitic capacitance can be reduced and the semiconductor device having high carrier mobility can be realized.

[0005]

In the conventional semiconductor device, however, the source and drain regions are formed in the same Si thin film, so that the resistance of the source and drain regions decreases as the thickness of the Si thin film decreases. Has a problem that the carrier mobility becomes low because the value becomes large and acts as a parasitic resistance.

Further, since the heat conductivity of the insulating film 2 is poor, the heat generated in the source and drain regions is trapped and the temperature rises, which also causes a problem that carrier mobility becomes low.

As a result, there has been a problem that a high current driving ability cannot be obtained.

As a method of reducing the parasitic resistance, a method of attaching metal or metal silicide to the source and drain regions has been used, but the problem of heat accumulation still remains.

Therefore, an object of the present invention is to solve both problems of reducing parasitic resistance and improving heat dissipation, and to realize a semiconductor device having high carrier mobility and current driving capability.

[0010]

The semiconductor device of the present invention comprises:
An insulating film formed on a predetermined portion of an element formation region on a semiconductor substrate, a semiconductor film serving as a channel region formed on the insulating film, a gate electrode formed on the semiconductor film, and facing each other with the semiconductor film interposed therebetween. As described above, the impurity diffusion regions serving as the source and drain regions are formed on the semiconductor substrate, and at least one of the source and drain regions is directly formed on the semiconductor substrate.

Furthermore, the method of manufacturing a semiconductor device of the present invention is
A step of selectively forming an insulating film on a predetermined portion of an element forming region on a semiconductor substrate; a step of forming a semiconductor film on the surface of the semiconductor substrate around the insulating film and on the insulating film; A step of depositing a gate electrode material on the entire surface and selectively patterning the gate electrode material corresponding to the selectively formed insulating film to form a gate electrode, and ion implantation into the semiconductor film around the gate electrode. And a step of forming source and drain regions.

In a preferred embodiment, an insulating film is formed below the channel region of the transistor on the Si substrate, and a semiconductor thin film is formed as an SOI structure in the channel region above it. Further, a gate region is formed on the semiconductor thin film. Source and drain regions are formed on the portion other than the gate region on the semiconductor thin film, and have a bulk structure so as to directly contact the Si substrate.

[0013]

According to the above structure, since the channel region has the SOI structure, the high carrier mobility characteristic of the SOI device can be achieved. On the other hand, since the source and drain regions have a bulk structure, they are thicker than the channel region, and are directly formed on the semiconductor substrate, so that the effect of parasitic resistance due to the thickness of these regions can be reduced, and Since the heat generated in those regions can be dissipated in the semiconductor substrate, the heat dissipation effect is also enhanced. Therefore, the problem of parasitic resistance and heat accumulation can be solved while realizing a thin film with the SOI structure.

[0014]

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a semiconductor device according to the present invention will be described with reference to FIG.

A field oxide film 12 for element isolation is formed on a semiconductor substrate 10 which is a P type Si substrate. Under the channel region of the transistor, a thermal oxide film 14 having a thickness of 1000 angstrom is formed as an insulating film. In the channel region on the thermal oxide film 14, a Si thin film 16 having a thickness of 100 angstrom is formed as a semiconductor film. Further, a gate oxide film 18 is formed on the Si thin film 16, and a gate electrode 20 is formed thereon. Then, on the Si thin film 16, N-type source / drain regions 22a and 22b having a bulk structure are formed so as to cover a part of the field oxide film 12.
An interlayer insulating film 24 is formed on them. A contact hole 26 is formed in the interlayer insulating film 24, and a wiring pattern 28 is formed on the contact hole 26.

As is clear from the above description, in the semiconductor device of the present invention, a Si thin film is formed in the channel region so that the SO
It has an I structure. On the other hand, the source and drain regions have a bulk structure and are thicker than the channel region. Therefore, the parasitic resistance generated in the source and drain regions can be reduced. Furthermore, since the source / drain regions are directly formed on the semiconductor substrate by the bulk structure, the heat generated in these regions efficiently escapes to the semiconductor substrate.

An embodiment of the method of manufacturing a semiconductor device according to the present invention described above will be described with reference to FIGS. 3 (a) to 3 (d) and FIG.

As shown in FIG. 3A, a field oxide film 12 for element isolation is formed on a semiconductor substrate 10 which is a P type Si substrate by a selective oxidation method. Although not shown, this is a LOCOS method (local oxide).
cation of silicon), an oxide film is first formed on the semiconductor substrate 10, and a non-oxidizing S is formed on the oxide film.
An i-nitride film is formed. Next, these films are removed only in the element isolation region, the element isolation region is doped with impurities by ion implantation, and only the element isolation region is selectively oxidized to form the field oxide film 12.

Next, the Si substrate 10 is thermally oxidized by heat treatment to form a thermal oxide film having a thickness of 1000 Å, and the thermal oxide film 14 is left only in the channel region by etching as shown in FIG. 3B. .

Then, the thermal oxide film is removed by etching and the Si single crystal is selectively epitaxially grown on the exposed portion of the Si substrate 10. After that, this Si single crystal is heated and melted with a laser beam, an electron beam, etc.,
The melted region is laterally grown on the Si substrate 10 and on the thermal oxide film 14 and the field oxide film 12 as shown in FIG.
A Si thin film 16 of 0 angstrom is formed.

As a method of forming the Si thin film 16, instead of selective epitaxial growth, amorphous Si having a thickness of 100 A is deposited in the state of FIG.
After being annealed at a low temperature of about 100 degrees Celsius for a long time, the exposed portion of the Si substrate 10 and its vicinity are single-crystallized.
You may pattern it in the shape shown in (c).

After the single crystal Si thin film 16 is formed as described above, as shown in FIG. 3D, first, low pressure CVD is performed.
By the method, silicon dioxide having a thickness of 100 A is deposited on the Si thin film 16 as a gate oxide film 18. Thereafter, similarly, by a low pressure CVD method, polysilicon having a thickness of 4000 A is used as the gate electrode 20 and is deposited on the gate oxide film 18, doped by phosphorus diffusion, and then patterned. Then, with an acceleration voltage of 50 KV, a dose amount of 3 × 10
8 cm of arsenic ions are implanted from the surface of the Si thin film 16,
Annealing is performed in nitrogen gas at 50 ° C. for 30 minutes to activate arsenic ions to form source / drain regions 22a and 22b reaching the semiconductor substrate. Finally, as shown in FIG. 2, a silicon dioxide film having a thickness of 3000 A is deposited as an interlayer insulating film 24 by a CVD method, and a contact hole 26 is formed.
After forming the holes, the wiring pattern 28 is formed of aluminum.

As described above in detail, in the semiconductor device according to the present invention, the channel region is formed on the thermal oxide film which is the insulating film, while the source and drain regions are not on the insulating film and are inside the semiconductor substrate. It is formed to reach and has both an SOI structure and a bulk structure.

In the above embodiment, both the source and drain regions 22a and 22b have a bulk structure. However, in some cases, the parasitic resistance is more likely to be exerted on the source region side than the drain region. Only the region 22a may have a bulk structure and the drain region 22b may have an SOI structure.

[0025]

As described in detail above, according to the semiconductor device of the present invention, since the channel portion is formed into a thin film as the SOI structure, the high carrier mobility characteristic of the SOI element can be achieved. On the other hand, since the source and drain regions have a bulk structure and are thicker than the channel part, the influence of parasitic resistance can be reduced, and since the source and drain regions reach the inside of the semiconductor substrate, the heat generated in the source and drain regions can be transferred to the semiconductor. Since it can be released to the substrate, the heat dissipation effect is also enhanced.

Further, according to the semiconductor device of the present invention,
Since a part of the structure has a bulk structure, it is possible to reduce the influence of the parasitic resistance that accompanies the progress of thinning as described above, so that further thinning becomes possible.

[Brief description of drawings]

FIG. 1 is a sectional view of an element showing an embodiment of a semiconductor device of the present invention.

FIG. 2 is a sectional view of an element by process showing one embodiment of a method for manufacturing a semiconductor device of the present invention.

FIG. 3 is an element cross-sectional view showing a conventional semiconductor device.

[Explanation of symbols]

 1 semiconductor substrate 2 insulating film 3 Si thin film 4a source 4b drain 5 gate oxide film 6 gate electrode 10 semiconductor substrate 12 field oxide film 14 thermal oxide film 16 Si thin film 18 gate oxide film 20 gate electrode 22a source 22b drain 24 interlayer insulating film 26 Contact hole 28 Wiring pattern

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[Procedure amendment]

[Submission date] June 16, 1993

[Procedure Amendment 1]

[Document name to be amended] Statement

[Name of item to be corrected] 0005

[Correction method] Change

[Correction content]

[0005]

In the conventional semiconductor device, however, the source and drain regions are formed in the same Si thin film, so that the resistance of the source and drain regions decreases as the thickness of the Si thin film decreases. Becomes larger and acts as a parasitic resistance, so that there is a problem that the current driving capability becomes low.

[Procedure Amendment 2]

[Document name to be amended] Statement

[Correction target item name] 0006

[Correction method] Change

[Correction content]

Furthermore, since the heat conductivity of the insulating film 2 is poor, the heat generated in the source and drain regions is trapped and the temperature rises, which causes a problem that carrier mobility becomes low.

[Procedure 3]

[Document name to be amended] Statement

[Name of item to be corrected] 0015

[Correction method] Change

[Correction content]

A field oxide film 12 for element isolation is formed on a semiconductor substrate 10 which is a P type Si substrate. Under the channel region of the transistor, a thermal oxide film 14 having a thickness of 1000 angstrom is formed as an insulating film. In the channel region on the thermal oxide film 14, a Si thin film 16 having a thickness of 500 angstrom is formed as a semiconductor film. Further, a gate oxide film 18 is formed on the Si thin film 16, and a gate electrode 20 is formed thereon. Then, on the Si thin film 16, N-type source / drain regions 22a and 22b having a bulk structure are formed so as to cover a part of the field oxide film 12.
An interlayer insulating film 24 is formed on them. A contact hole 26 is formed in the interlayer insulating film 24, and a wiring pattern 28 is formed on the contact hole 26.

[Procedure amendment 4]

[Document name to be amended] Statement

[Correction target item name] 0021

[Correction method] Change

[Correction content]

As a method of forming the Si thin film 16, instead of selective epitaxial growth, amorphous Si having a thickness of 500 A is deposited in the state of FIG.
After being annealed at a low temperature of about 100 degrees Celsius for a long time, the exposed portion of the Si substrate 10 and its vicinity are single-crystallized.
You may pattern it in the shape shown in (c).

[Procedure Amendment 5]

[Document name to be amended] Statement

[Name of item to be corrected] 0022

[Correction method] Change

[Correction content]

After the single crystal Si thin film 16 is formed as described above, as shown in FIG. 3D, first, low pressure CVD is performed.
By the method, silicon dioxide having a thickness of 100 A is deposited on the Si thin film 16 as a gate oxide film 18. Thereafter, similarly, by a low pressure CVD method, polysilicon having a thickness of 4000 A is used as the gate electrode 20 and is deposited on the gate oxide film 18, doped by phosphorus diffusion, and then patterned. Then, with an acceleration voltage of 50 KV, a dose amount of 3 × 10
^A source in which ¹⁵ cm ⁻² arsenic ions are implanted from the surface of the Si thin film 16 and annealed in nitrogen gas at 850 ° C. for 30 minutes to activate the arsenic ions and reach the semiconductor substrate.
Drain regions 22a and 22b are formed. Finally, Figure 2
As shown in FIG. 3, a silicon dioxide film having a thickness of 3000 A is deposited as an interlayer insulating film 24 by a CVD method, a contact hole 26 is opened, and then the wiring pattern 2 is made of aluminum.
8 is formed.

Claims (4)

[Claims] 1. An insulating film formed on a predetermined portion of an element formation region on a semiconductor substrate, a semiconductor film serving as a channel region formed on the insulating film, and a gate electrode formed on the semiconductor film. An impurity diffusion region serving as a source region and a drain region formed on the semiconductor substrate so as to face each other with the semiconductor film interposed therebetween, and at least one of the source region and the drain region is directly formed on the semiconductor substrate. A semiconductor device made up of: 2. A step of selectively forming an insulating film on a predetermined portion of an element formation region on a semiconductor substrate, and a step of forming a semiconductor film on the surface of the semiconductor substrate around the insulating film and on the insulating film. A step of depositing a gate electrode material on the entire surface of the element forming region and selectively patterning the gate electrode material corresponding to the selectively formed insulating film to form a gate electrode; A method of manufacturing a semiconductor device, comprising the steps of implanting ions into a semiconductor film to form source and drain regions. 3. The step of forming the semiconductor film comprises epitaxially growing a semiconductor substrate surface around the insulating film,
3. The method of manufacturing a semiconductor device according to claim 2, wherein the epitaxial layer thus obtained is grown laterally on the insulating film. 4. The step of forming the semiconductor film comprises depositing an amorphous semiconductor material on the entire surface of the semiconductor substrate to form an amorphous semiconductor film, and annealing the amorphous semiconductor film. The method for manufacturing a semiconductor device according to claim 2, wherein the method is performed by crystallizing.