JPH0636568B2 - Autofocus circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION (a) Field of Industrial Application The present invention relates to an improvement of an autofocus circuit used in a video camera.

(B) Conventional technology Conventionally, the focus motor is controlled as an autofocus circuit of a video camera so that the high frequency component of the luminance signal obtained from the image pickup device is maximized, that is, the focus motor is stopped at the in-focus position. The one configured to detect a temporal level change of the range component and restart the autofocus operation when the amount of change has changed by a certain level (threshold value) or more has been a prize.

Further, in Japanese Patent Application No. 59-123017, it is necessary to re-drive the focus motor by subdividing the high frequency component of the luminance signal into wide band, middle band and narrow band and comparing the level changes of each band relatively. What is configured to determine sex is disclosed.

(C) Problems to be Solved by the Invention The prior-art technology discriminates the change in the screen that causes the restart because the stop motor restart determination and the restart restart determination depend on only the high frequency component of the luminance signal. It is difficult to expect high reliability.

(D) Means for Solving Problems The present invention is a focus circuit, which detects a filter for separating low-frequency components of a video signal and a level change of low-frequency components at a plurality of sampling points set on a screen. It is characterized by comprising a detection circuit and a control circuit for re-driving the focus drive mechanism based on the output of the detection circuit, and detecting a change in the screen in the focused state.

(E) Operation Since the present invention is configured as described above, the screen change can be detected by the low-frequency component that is hardly affected by the focus state, and also by the multiple sampling points. It is possible to activate.

(F) Example An example of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit block diagram of this embodiment.

The luminance signal (Y) in the video signal obtained from the image pickup device is separated by the high-pass filter (HPF) (1) only in the high-frequency component, and then in the sampling circuit (2), the focus area setting circuit Only the high frequency component of the luminance signal (Y) in the focus area (FA) of FIG. 3 preset by (3) is sampled. This sampling output is sent to the detection circuit (4), amplified and detected, and then integrated circuit (5)
In, it is integrated over one field.

The focus area setting circuit (3) is a sync pulse generation circuit.
The horizontal sync pulse (H), vertical sync pulse (V), and color subcarrier (C) from (6) are input, and the horizontal sync pulse (H) is used as a reset input in the horizontal direction for color subcarrier.
(C) is counted, and in the vertical direction, the horizontal sync pulse is counted with the vertical sync pulse (V) as the reset input, and when both count values are within the preset focus area range, the sampling gate is used. Output is emitted. Each output of the synchronizing pulse generating circuit (6) also serves as a driving pulse for the image pickup device.

The output of the integration circuit (5) reaches the fixed contact (7g) of the changeover switch (7), and the movable contact (7i) is fixed contact (7g).
When switched to, the signal is input to the AD conversion circuit (8), AD-converted, and read into the first memory (10) through the read selection circuit (9) at a read timing pulse (t ₁ ) described later. Be done. The data sent to the first memory (10) becomes the focus evaluation value at that time. The data in the first memory (10) is transferred to the second memory (11) after one field.

The first comparison circuit (12) compares the contents of the first memory (10) and the second memory (11). That is, the evaluation value of the current field and the evaluation value of the previous field are compared. This comparison output is input to the focus motor control circuit (13), drives the focus motor (14) in the direction in which the focus evaluation value becomes large, and finally the evaluation value becomes maximum, that is, the focus position is detected. To stop the focus motor (14). The control mechanism described above is a well-known technique as an autofocus circuit.

Next, the detection circuit (53) for detecting the change of the screen of the focus motor once stopped will be described.

Luminance signal (Y) is low-pass filter (LPF) (15)
And the low frequency components are separated. H. 3 for knowing the focus evaluation value P. F. The cutoff frequency of (1) is usually 100 KHZ to 500 KHZ, whereas the cutoff frequency shown in FIG. P. F. (15) is 50KHZ-100KH
Z. This is to detect only the change in the screen without being affected by the focus state such as in-focus or out-of-focus.Also, by making the cutoff frequency low, it is necessary to compare in the area. It is possible to detect changes in the screen by making level changes that do not occur only at sample points.

The low frequency components thus obtained are sent to the first, second, third, fourth and fifth sample hold circuits (16) (17) (18) (19) (20). Sample hold circuit (16) (17) (18) (19)
(20) is a sample hold pulse generated by the sample hold pulse generation circuit (21) based on the vertical sync pulse (V), horizontal sync pulse (H), and color subcarrier (C). The low frequency components of 5 points A, B, C, D and E on the screen shown in FIG. The points A and B and the points C and D are on the same line in the horizontal direction, and the points A and C are the same.
The points and the points B and D are located on the same line in the vertical direction.

Here, the sample hold pulse generating circuit (21) will be described with reference to FIG. This sample hold pulse generation circuit (21) uses the vertical sync pulse (V) as the reset input, the vertical counter (22) that receives the horizontal sync pulse (H) as the count input, and the horizontal sync pulse (H) as the reset input. , A horizontal counter (23) that receives the color subcarrier (C) as a count input, and first, second, and third vertical position detection circuits (24) (25) (26) that receive the output of the vertical counter (22). )When,
First, second and third horizontal position detection circuits (27), (28) and (29) which receive the output of the horizontal counter (23), an output of the first vertical position detection circuit (24) and a first horizontal position detection A first AND gate (30) having two inputs to the circuit (27) output and a second AND gate (2) having two inputs to the first vertical position detection circuit (24) output and the second horizontal position detection circuit (28) output 31) and a second vertical position detection circuit
(25) A third AND gate (32) having two inputs of the output and the output of the first horizontal position detection circuit (27), and the second vertical position detection circuit (2
5) A fourth AND gate (33) that receives the output and the output of the second horizontal position detection circuit (28) as two inputs, and outputs the output of the third vertical position detection circuit (26) and the output of the third horizontal position detection circuit (29) 5th to input
The AND gate 34 is composed of five AND gates.

The horizontal and vertical counters (23) and (22) count the horizontal color subcarrier (C) count value and the vertical horizontal sync pulse (H) count value, and the first count value is output.
In the vertical position circuit (24), vertical data of point A (point B) is set in advance, and an output is issued when the count value matches the vertical data. At the same time, vertical data of point C (point D) is set in the second vertical position detection circuit (25), and vertical data of point E is set in the third vertical position detection circuit (26). Outputs when the count value of the vertical counter (22) matches the respective data. Further, the first, second, and third horizontal position detection circuits (27), (28), and (29) have horizontal position data of points A (C), B (D), and E in advance, respectively. Is input and outputs an output when the count value of the horizontal counter (23) matches. Therefore, the first AND
The hold pulse (a) is output from the gate (30) at the time when the luminance signal at the point A is obtained from the image sensor. Similarly, the second, third, fourth, fifth AND gates (31) (32) (33) (34)
Output sample-hold pulses (b) (c) (d) (e) corresponding to sample points B, C, D and E. By this sample hold pulse (a) (b) (c) (d) (e),
1st, 2nd, 3rd, 4th, 5th sample hold circuit (1
6) (17) (18) (19) (20) are sample-held, point A, B
The level of the low frequency component of the luminance signal (Y) at the points C, D, E is detected.

The outputs of the first, second, third, fourth and fifth sample and hold circuits (16) (17) (18) (19) (20) are the fixed contacts (7a) (7b) of the changeover switch (7). (7c), (7d), (7e) and the movable contact piece (7i) are AD-converted by the AD conversion circuit (8) and further read by the read selection circuit (9) to the third memory (3).
5), 5th memory (37), 7th memory (39), 9th memory (4
1), sent to the eleventh memory (43), and one field later, the respective data are stored in the fourth memory (36), the sixth memory (38), and the eighth memory.
It is transferred to the memory (40), the tenth memory (42), and the twelfth memory (44).

Here, the operations of the changeover switch (7) and the read selection circuit (9) will be described in detail. The changeover switch (7) is controlled by the changeover pulse from the changeover pulse generating circuit (51) which receives the vertical synchronizing pulse (V) as an input. That is, the movable contact piece (7i) of the changeover switch (7) is fixed to the fixed contact (7g) by the changeover pulse generated as shown in FIG. 4 (b).
(7a) (7b) (7c) (7d) (7e) (7f) are sequentially switched. The fixed contact (7f) is open.

Further, the control of the read selection circuit (9) is performed by the timing pulse (t ₁ ) (t ₂ ) (t ₃ ) (t) of FIG. 4 (d) from the read timing generation circuit (52) which slightly delays the switching pulse. t ₄ ) (t ₅ ) (t
₆ ) made by. That is, the timing pulse (t ₁ )
At the time of occurrence, the contents of the AD conversion circuit (8) are stored in the first memory (10).
Is selected and read, and similarly at timing pulses (t ₂ ) (t ₃ ) (t ₄ ) (t ₅ ) (t ₆ ),
The contents of the AD conversion circuit (8) are sequentially read into the third, fifth, seventh, ninth and eleventh memories (35) (37) (39) (41) (43). The timing pulse (t ₂ ) (t ₃ )
(T ₄ ) (t ₅ ) (t ₆ ) occurs in the vertical blanking period.

Therefore, the AD conversion output of the integrated output is stored in the first memory (10) as the third, fifth, seventh, ninth and eleventh memories (35) (37) (3).
9) (41) and (43) are inputted with the AD conversion outputs of the low frequency component levels of the points A, B, C, D and E. Third memory (35)
And the contents of the fourth memory (36), that is, the present time at point A and 1
The comparison of the low frequency component level before the field is performed by the second comparison circuit (4
It is done in 5). Similarly, third, fourth, fifth and sixth comparison circuits
In (46) (47) (48) (49), the fifth memory (37) and the sixth memory (3
8), 7th memory (39), 8th memory (40), 9th memory (41)
And 10th memory (42), 11th memory (43) and 12th memory
The contents of (44) are compared with each other. That is, B point, C point, D
At the points E and E, the low frequency component level of the current field and the field one field before are compared. These five comparison outputs are sent to the discriminating circuit (50) and the presence or absence of a screen change is detected by majority decision based on the level changes at the five points. That is, of the five level changes, the H level output is generated only when three or more points exceed the threshold value ε. This discrimination output is sent to the focus motor control circuit (13), and is sent to the focus motor control circuit (13).
3) is the focus motor when the discrimination output becomes H level.
Start the re-driving of (14).

In this way, the focus motor is once stopped at the in-focus position where the level of the high frequency component in the focus area (FA) has become the highest, and during this restart standby, the change of the screen is changed to the low frequency range at five sample points. The change in the component level is detected, the focus motor is restarted, and the focusing operation is restarted.

In the present embodiment, the reading operation of the low frequency level at the sampling point is performed even during the drive of the focus motor, but it may be limited to the standby for the restart. In addition, it is possible to perform signal processing of various circuits by software.
Needless to say, the number and positions of sampling points on the screen are not limited to those in this embodiment and may be set freely.

The above is the configuration and operation of the circuit of the present embodiment, and FIG. 5 shows this as a flowchart. This flowchart will be briefly described.

Here, Sn is the current focus evaluation value, Sn- ₁ shows the focus evaluation value of the previous field, function 1, as evaluated by the high-frequency component becomes the maximum, stopping the focus motor at the focus position It shows a buoyant hill-climbing servo. Function 2 detects changes in the screen using low-frequency components in the restart standby state after stopping the focus motor,
Whether the focus motor needs to be restarted is determined. Note that An, Bn, Cn, Dn, and En are the low-frequency levels at the current sampling points, which are A _n-1 , B _n-1 , C _n-1 , D _n-1 , and E.
_n-1 indicates the low frequency level one field before.

(G) Effect of the Invention As described above, according to the present invention, it is possible to determine the change of the screen, which causes the focus drive mechanism that has been once stopped, to be restarted, by determining the luminance signal low at a plurality of sampling points on the screen. Since the change is performed at the range level, the reliability becomes extremely high, and as a result, stable focus control becomes possible, and the effect is extremely large.

BRIEF DESCRIPTION OF THE DRAWINGS All the drawings relate to one embodiment of the present invention. FIG. 1 is an overall circuit block diagram, FIG. 2 is a circuit block diagram of a sample hold pulse generating circuit, and FIG. FIG. 4 is a timing chart and FIG. 5 is a flow chart showing the position. (13) …… Focus motor control circuit, (14) …… Focus motor (focus drive mechanism), (15) …… Low-pass filter, (53) …… Detection circuit

Claims (1)

[Claims] 1. A focus control mechanism (14) is controlled so that a high frequency component level of a luminance signal obtained from an image pickup device for a certain period is maximized, and the control is stopped when a focused state is reached. In the autofocus circuit, the detection circuit (53) that detects the change of the screen by detecting the change of the low frequency component level of the luminance signal at the plurality of sampling points set on the imaging screen, and the detection circuit Control circuit for restarting the focus drive mechanism when a change in the screen is detected (13)
An autofocus circuit characterized by comprising: