JPH0638573B2 - Semiconductor integrated circuit device - Google Patents

Description

Description: TECHNICAL FIELD The present invention relates to a semiconductor integrated circuit technology, and is effectively applied to, for example, a semiconductor integrated circuit device having a chopper type comparison circuit or an A / D conversion circuit using the chopper type comparison circuit. Regarding

BACKGROUND ART Conventionally, in a circuit such as a successive approximation A / D converter,
For example, a chopper type comparison circuit as shown in FIG. 1 has been proposed (IEEE Journal of Soli).
d-State Circuits, Vol. SC-1
3, pp. 785-791, December 1978).

This chopper type comparator circuit has a pair of switches S ₁ and S ₂ for alternately sampling the input analog signal Vin and the reference voltage Vref, a common connection point No of the switches S ₁ and S ₂ and an output terminal OUT. And a plurality of AC amplification stages 1a, 1b, 1c, 1d connected in series between the two. Each each amplifier stage 1a~1d capacitor _{C 1}
It is constituted by a -C ₄ and the inverter 2 a to 2 d. In addition, each of the capacitors C _{1 to} C ₄ and the inverter 2
A switch group S ₁₁ is provided at connection points N _{1 to} N ₄ with a to 2d.
By to S ₁₄ is the bias voltage _{V B} for determining the operating point of the inverter 2a~2d are to be supplied.

The switch S ₁ and the switch groups S _{11 to} S ₁₄ are turned on / off by a control signal φ, and the switch S ₂ is turned on / off by a control signal having a phase opposite to the control signal φ.

Therefore, for example, when the control signal φ is set to the high level and the switch S ₁ and the switch groups S _{11 to} S ₁₄ are turned on,
The node _N 1 to N ₄ of the amplifier circuits 1 a to 1 d, the bias voltage _{V B} is supplied. At this time, the switch S ₂
Is turned off by the control signal, node No
Is supplied with an input analog voltage Vin.

Next, when the control signal φ is changed to the low level, the switch S ₁ and the switch groups S _{11 to} S ₁₄ are turned off, and the switch S ₂ is turned on by the control signal. Then, the reference voltage Vref is supplied to the node No, and the capacitor C
_{Between the 1} terminal, the input analog voltage Vin and the reference voltage V
A difference voltage (Vin-Vref) from ref is generated.
This difference voltage (Vin-Vref) is amplified by the inverter 2a and supplied to the second amplification stage 1b. In this way, the input analog voltage Vin and the reference voltage Vref
The differential voltage of 1 is sequentially amplified by the first to fourth AC amplification stages 1a to 1d.

By the way, in the chopper type comparator circuit, the output voltage is equal to the logical threshold voltage by being constituted by elements having the same size as the inverters 2a to 2d constituting the amplification stages 1a to 1d and feeding back the output voltage to the input terminal. The bias circuit 3 is composed of the inverter 3a that generates such a bias voltage V _B.

Therefore, such a chopper type comparison circuit is used as an LSI such as a microcomputer having an A / D conversion circuit built-in.
When used as a comparator in a (large-scale integrated circuit), a shoot-through current will always flow to the inverter 3a forming the bias circuit 3 even when the A / D conversion circuit is not operated.

When the A / D conversion circuit is not operated, the switch group S
It is allowed to clear the ₁₁ to S _14, the amplifier stage 1a~
Since the potential of each of the connection points N _{1 to} N ₄ of 1d becomes unstable due to the electric charges charged in the parasitic capacitance, a through current may flow through each of the inverters 2a to 2d.

Therefore, in order to reduce the power consumption of the entire LSI,
An LSI with a built-in D conversion circuit is a CMOS (complementary MO
In the case of the configuration of S), there is a problem in that a large amount of through current flows in the chopper type comparison circuit when the A / D conversion circuit is not used, so that the power consumption is extremely wasteful. .

[Object of the Invention] An object of the present invention is to provide an A / D using a chopper type comparator circuit.
Achieving low power consumption in LSIs with built-in conversion circuits
It is an object of the present invention to provide a semiconductor integrated circuit technology that can be realized without deteriorating the characteristics of the / D conversion circuit.

The above and other objects and novel features of the present invention will be apparent from the description of this specification and the accompanying drawings.

[Outline of Invention] The outline of a typical invention disclosed in the present application will be described below.

That is, in a semiconductor integrated circuit device having a built-in A / D conversion circuit having a chopper type comparison circuit, the chopper type comparison circuit has an inverter composed of complementary MOS transistors, and one end of an input terminal of the inverter. A pair of first amplifiers each including a connected capacitor, the other end of which is an input, and a plurality of amplifier circuits that output the output terminal of the inverter are connected in series, and are connected to an input of a first stage of the amplifier circuit. A switch circuit, the input voltage and the reference voltage are sampled by a control signal that makes the pair of first switch circuits conductive and non-conductive, and the difference voltage is amplified by the amplifying circuit. A second switch circuit is provided between the input terminal of the inverter forming the amplifier circuit and either the ground potential or the power supply potential. By controlling the second switch circuit based on a control signal from the outside of the chopper type comparator circuit, the input terminal of the inverter is set to either the ground potential or the power source potential when the chopper type comparator circuit is not operating. By further enabling the control signals of the pair of first switch circuits to be fixed to either a high level or a low level during the non-operation, An LSI having a built-in A / D conversion circuit having a chopper-type comparison circuit so that a through current does not flow in the inverter forming the amplification stage.
It achieves the above-mentioned object of powering down.

Hereinafter, the present invention will be described in detail with examples.

[Embodiment] FIG. 2 shows an embodiment of the present invention. In the chopper type comparator circuit of this embodiment, except for the configuration of the bias circuit,
It has substantially the same configuration as the circuit shown in FIG.

That is, the common connection point No of the pair of sampling switches S ₁ and S ₂ connected to the input terminals IN ₁ and IN ₂
And the output terminal OUT, the capacitor ₄ is composed of capacitors C _{1 to} C ₄ and inverters 2a to 2d, although not particularly limited thereto.
The AC amplification stages 1a to 1d of the stages are connected. And
The amplification stage connection points _N 1 to N ₄ of 1a~1d via the switch group _S 11 _{to S 14,} the bias voltage _{V B} output from the bias circuit 3 is to be supplied. Although not particularly limited, each of the inverters 2a to 2d and 3a forming the amplification stages 1a to 1d and the bias circuit 3 is formed of a CMOS inverter.

Further, in this embodiment, the input terminal of the inverter 3a that constitutes the bias circuit 3 is connected to the ground point of the circuit via the switch S ₃ . In addition, the inverter 3a
The second switch S ₄ is provided in the middle of the path for feeding back the output voltage (bias voltage V _B ) to the input terminal.

Therefore, the bias circuit 3 of this embodiment becomes exactly the same as the circuit shown in FIG. 1 if the switch S ₄ provided therein is turned on and the switch S ₃ is turned off. That is, since the inverter 3a that constitutes the bias circuit 3 is activated and its output voltage is applied to the input terminal, an output voltage that is equal to the logical threshold voltage is generated, which is the bias voltage. It is supplied as V _{B to the} connection points N _{1 to} N ₄ of the amplification stages 1a to 1d via the switch groups S _{11 to} S ₁₄ and determines the operating point thereof.

However, the bias voltage V _B to determine the operating point, the inverter 3a of the bias circuit 3 is constituted by an element having the same size as the inverter 2a~2d constituting each amplifier stage 1 a to 1 d. Therefore, each inverter 2a-2d
Operates in the vicinity of its logical threshold voltage, providing excellent responsiveness and a large amplification factor.

On the other hand, when it is not necessary to operate the A / D conversion circuit including the chopper type comparison circuit, the switch group S ₁₁
On the to S _14, the high level (and thus the control signal is low level) as shown in FIG. 3 the control signal φ to off'll fixed to. Also, each switch S in the bias circuit 3
_3, S ₄ and the power down signal PWD to control is changed to the high level, the switch S ₄ is turned off to turn on the switch S ₃ instead.

Then, since the ground potential is applied to the input terminal of the inverter 3a and no feedback is applied, the output voltage of the inverter 3a is fixed at the high level (Vcc). This prevents a through current from flowing through the inverter 3a composed of a CMOS inverter. Also, the switch group S
_{Since 11 to} S ₁₄ are turned on by the control signal φ fixed as described above, the high-level output voltage of the inverter 3a is supplied to the connection nodes N _{1 to} N ₄ of the amplification stages 1a to 1d. It As a result, the amplification stages 1a to 1d
The input voltage of the inverters 2a to 2d constituting the above is fixed at a high level so that a through current does not flow.

Moreover, in the above embodiment, the bias circuit 3 has the switch S.
₃ and S ₄ are provided, and the AC amplification stage 1 a when not operating
Since the potentials of the connection nodes N _{1 to} N ₄ of 1d are fixed, there is no possibility that the circuit characteristics will deteriorate. That is, in order to fix the potentials of the connection nodes N _{1 to} N ₄ of the AC amplification stages _{1 a to 1} d, a switch is provided between each connection node and the ground point or the power supply voltage terminal, and the switch is turned on when not operating. A method is also possible. However, in this case, the parasitic capacitance at each connection node may increase and the A / D conversion accuracy may decrease, but according to the above-mentioned embodiment, there is no possibility of such characteristic deterioration.

In the above embodiment, since adapted to apply a ground potential during non-operation of the circuit to the input terminal of the inverter 3a constituting the bias circuit 3, the switch S ₃ is be composed of N-channel type MOSFET it can. On the other hand, the switch S _4, since conveys a power supply voltage Vcc to an intermediate potential between the ground potential, although it is to use a CMOS transmission gate as shown in Figure 4 to prevent the voltage drop, N-channel type or P-channel Shape MO
SFET may be used. The sampling switches S ₁ and S ₂ are composed of CMOS transmission gates, and the switch groups S _{11 to} S ₁₄ are respectively composed of N-channel MOSFETs.

Further, in the above embodiment, the ground potential is applied to the input terminal of the inverter 3a that constitutes the bias circuit 3, and the potentials of the connection points N _{1 to} N ₄ of the amplification stages 1a to 1d are fixed to a high level when not operating. However, the power supply voltage Vcc is applied to the input terminal of the inverter 3a so that the connection point N
_{1 to} N ₄ may be fixed at a low level. Even in this case, a through current does not flow in the inverters 3a and 2a to 2d due to the nature of the CMOS inverter. However, in this case, set switch S ₃ to P
Power source voltage V
It is preferable to apply cc to the input terminal of the inverter 3a without dropping it.

[Effect] A semiconductor integrated circuit device including an A / D conversion circuit having a chopper type comparison circuit, wherein the chopper type comparison circuit has an inverter composed of complementary MOS transistors and an input terminal of the inverter. A pair of first capacitors connected to the input of the first stage of the amplifier circuit, the plurality of amplifier circuits including a capacitor connected to the input terminal, the other end of the capacitor being an input, and the output terminal of the inverter being an output are connected in series. And a switching circuit, the input voltage and the reference voltage are sampled by a control signal that makes the pair of first switching circuits conductive and non-conductive, and the difference voltage is amplified by the amplifier circuit, A second switch circuit is provided between the input terminal of the inverter forming the amplifier circuit and either the ground potential or the power supply potential. By controlling the second switch circuit based on a control signal from the outside of the chopper type comparator circuit, either one of the ground potential or the power source potential is applied to the input terminal of the inverter when the chopper type comparator circuit is not operating. By further enabling the control signals of the pair of first switch circuits to be fixed to either a high level or a low level during the non-operation, There is an effect that it is possible to reduce the power of the LSI having the built-in A / D conversion circuit having the chopper type comparison circuit due to the effect that the through current does not flow in the inverter forming the amplification stage.

Moreover, since the bias circuit is provided with the switch means to fix the potential of each connection point of the AC amplifying stage when it is not in operation, there is no possibility that the characteristic is deteriorated by the parasitic capacitance of the switch.

Although the invention made by the present inventor has been specifically described based on the embodiments, the present invention is not limited to the above embodiments and various modifications can be made without departing from the scope of the invention. Nor. For example, the configuration of the AC amplifier circuit that operates by receiving the bias voltage from the bias circuit is not limited to that of the embodiment shown in FIG. 2, and the switches S _{11 to} S ₁₄ are switched through the respective mirror capacitors at the time of switching. In order to cancel the noise coming into the connection points N _{1 to} N ₄ , it is necessary to connect to each connection point a MOS capacitor in which a signal φ having a phase opposite to the control signal φ is applied to the gate. Various modified examples such as the above-mentioned circuit are conceivable.

[Field of Use] In the above description, the invention mainly made by the present inventor is the background of the invention, which is the field of use, and is a CMOS incorporating a successive approximation A / D conversion circuit using a chopper type comparison circuit.
Although the one applied to the LSI has been described, the present invention is not limited to this, and an LS having a chopper type comparison circuit.
I General availability.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing an example of a conventional chopper type comparison circuit, FIG. 2 is a circuit diagram showing an example of a chopper type comparison circuit according to the present invention, and FIG. 3 is a control signal in the circuit. 4 is a timing chart showing the timing of FIG. 4, and FIG. 4 is a configuration diagram showing an example of switches used in the circuit. 1a to 1d ... AC amplification stage, 2a to 2d ... Inverter, 3 ... Bias circuit, 3a ... Inverter, S ₁ ,
S ₂ ...... sampling _{switch, S 3,} S ₄ ...... switch _{means, S 11, S} 14 _...... switch _group, C 1 -C ₄
...... Capacitor, φ, ...... Control signal.

Claims (3)

[Claims] 1. A semiconductor integrated circuit device having a built-in A / D conversion circuit having a chopper type comparison circuit, wherein the chopper type comparison circuit comprises an inverter composed of complementary MOS transistors, and an input terminal of the inverter. A pair of amplifiers, one end of which is connected to the first end of the amplifier circuit, the other end of the capacitor being an input, and a plurality of amplifier circuits which output the output terminal of the inverter are connected in series. A first switch circuit, wherein the input voltage and the reference voltage are sampled by a control signal that makes the pair of first switch circuits conductive and non-conductive, and the difference voltage is amplified by the amplifier circuit. A second switch circuit is provided between the input terminal of the inverter forming the amplifier circuit and either the ground potential or the power supply potential, By controlling the second switch circuit based on a control signal from the outside of the chopper type comparison circuit, the input terminal of the inverter is set to either the ground potential or the power supply potential when the chopper type comparison circuit is not operating. The control signal of each of the pair of first switch circuits can be fixed to either a high level or a low level during the non-operation. Semiconductor integrated circuit device. 2. The semiconductor integrated circuit device according to claim 1, wherein each of the pair of first switch circuits comprises a complementary MOS transmission gate. 3. The second switch circuit uses a P-channel type MOSFET when one end is connected to the power supply potential, and an N-channel type MOV when the one end is connected to the ground potential.
The semiconductor integrated circuit device according to claim 1 or 2, wherein an SFET is used.