JPH0638588B2 - Echo canceller - Google Patents

Description

The present invention relates to an echo canceller, and more particularly to a structure for reducing the number of input / output terminals of each step of an echo canceller in which a plurality of transversal filters are cascaded.

The echo canceller that has been used in the past performs switching control to compare the transmission and reception signals to turn on the line with the higher level and turn off or attenuate the line with the lower level. However, there are drawbacks such as generation of click noise. In recent years, echo cancellers have been developed to eliminate this drawback. This is to provide a pseudo echo path that simulates the characteristics of the echo path, synthesize a pseudo echo signal from the received signal, and subtract the pseudo echo signal from the echo signal generated from the actual echo path to eliminate the echo signal. It is a thing. The pseudo echo path is mainly composed of a transversal filter, and the pseudo echo signal is synthesized by a convolution operation of the tap coefficient of the transversal filter and the received signal. In recent years, the echo canceller tends to be integrated into an LSI in order to reduce the size and power consumption of the device, and the transversal filter has been constructed by a cascade connection of a plurality of transversal filters. However, when the transversal filters are connected in cascade, a large number of parallel input / output terminals are required to add the result of the convolution operation which is the output of each transversal filter, which has a disadvantage of increasing the number of terminals.

FIG. 1 is a block diagram showing an example of a conventional echo canceller. A transversal filter 100 having a tap number N is shown in FIG.
And 200 are connected in series to form a transversal filter having a tap number of 2N. The reception signal number X input from the reception side input terminal 1 is transmitted to the reception terminal (not shown) from the reception side output terminal 2 and is input to the reception signal storage circuit 7 of the transversal filter 100.
The reception signal storage circuit 7 stores the input value for each time slot for N time slots. The multiplication circuit 8 multiplies the N step tap coefficients of the tap coefficient storage circuit 6 by the input signals of the respective steps of the reception signal storage circuit 7 and accumulates the result in the accumulator circuit 9. That is, a convolution operation is performed. In one time slot, the above N times of multiplication and accumulation of multiplication results are performed. On the other hand, the reception signal storage circuit 7'of the transversal filter 200 stores reception signals N time slots before the reception signal of the reception signal storage circuit 7, and stores them in the tap coefficient storage circuit 6 '. The contents are multiplied and accumulated in the accumulation circuit 9 '.
The convolution operation processing in both transversal filters is performed in parallel, and the accumulated results are obtained at the same time. After the convolution operation processing, the L bit output of the multiplication circuit 9 is sent in parallel to the accumulation circuit 9 ', and the accumulation circuit 9'stores the sum of the output values of both transversal filters. That is, it is possible to obtain an output value as a transversal filter having a tap coefficient of 2N. This output value is the pseudo echo signal Then, the subtracter 5 subtracts the difference from the transmitted signal Y (which is the echo signal when there is no speech), and the residual echo signal e is sent from the transmission-side output terminal 4. The accumulation circuit 9,
Since the output of 9'is an L-bit parallel output, L input / output terminals are required. K the transversal filter
If the cascade connection is made, 2L · K input / output terminals are required, so that the number of input / output terminals increases as described above. The contents of the accumulator circuits 9 and 9 ', etc. may be added by different adders and supplied to the subtractor 5, but the situation in which the number of terminals increases is the same as described above.

It is an object of the present invention to provide an echo canceller capable of reducing the above-mentioned conventional drawbacks and reducing the number of input / output terminals, simplifying the input configuration to the accumulator circuit, and having a simple circuit configuration. .

The echo canceller of the present invention includes a reception signal storage circuit, a tap coefficient storage circuit, a multiplication circuit for multiplying the contents of the reception signal storage circuit and the contents of the tap coefficient recording circuit, and an output of the multiplication circuit. A plurality of transversal filters each including an accumulator circuit for performing an arithmetic operation are provided, and the plurality of transversal filters are connected in cascade. In the echo canceller, which comprises means for calculating a total value with the output value of the transversal filter from, and the output value of the transversal filter at the final stage is input to the circuit for subtracting from the transmission signal, the accumulating circuit is a plurality of Each transversal filter is composed of a plurality of sets of accumulators for accumulating a set of small parallel data. A time-division switch circuit for sequentially outputting a plurality of small parallel data for each data, the transversal filter except the first stage, the output value of the multiplication circuit, and the time-division switch circuit of the previous stage of the transversal filter The output value and the fixed value “0” are input, the output of the multiplication circuit is input to the accumulators of the corresponding digits of the accumulation circuit during the convolution operation, and after the convolution operation is completed, The small parallel data output from the time division switch circuit is sequentially input to the bit input of the accumulator of the corresponding digit of the accumulator circuit, and "0" is input to the bit input of the accumulator of other digits. A selection circuit for selecting the output of the time-division switch circuit of the final stage transversal filter is output as a total value of the outputs of the cascade-connected transversal filters. That.

Next, the present invention will be described in detail with reference to the drawings.

FIG. 2 is a block diagram showing the input / output configuration of the accumulator circuit in the embodiment of the present invention. In this embodiment, the input / output configuration shown in FIG. 2 is used for the input / output of the accumulator circuit 9 of the conventional echo canceller shown in FIG. 1, and the other parts are shown in FIG. It is similar to the conventional configuration. The accumulator circuit 9 includes two L / 2-bit accumulators 12 and 13 to form a combined L-bit accumulator. The accumulator 12 is an accumulator that accumulates the lower L / 2 bits of the L bits, and the accumulator 13 accumulates the upper L / 2 bits. The carrier signal of the accumulator 12 is of course added to the least significant bit of the accumulator 13. The output values of the accumulators 12 and 13 are sequentially output in a time division manner by the time division switch circuit 11.
The output signal of the time division switch circuit 11 is an L / 2 bit. The selection circuit 10 outputs the output value (L bit) of the multiplier 8 and
The output (L / 2 bit) of the time division switch circuit 11 of the transversal filter of the preceding stage and the fixed value "0" of the L / 2 bit are input, and L of the multiplier 8 is supplied during the convolution operation.
The bit output is selected and output, and L / 2 bits are input to the corresponding digit inputs of the accumulators 12 and 13, respectively. After the convolution operation is completed, the output (L / 2 bit) of the time division switch circuit 11 and the fixed value "0" (L / 2 bit) of the transversal filter of the preceding stage are selected and sent from the preceding stage. The value of the lower L / 2 bits that came is sent to the accumulator 12.
A fixed value "0" is input to the accumulator 13, then the L / 2 bit value sent from the previous stage is input to the accumulator 13, and a fixed value "0" is input to the accumulator 12. . Therefore, the accumulators 12, 13
Stores the output value of the multiplier 8 during the convolution operation and accumulates the result. After the convolution operation is finished, the lower L / 2 bit of the accumulation result of the previous stage is first stored in the accumulator 12. Then, the high-order L / 2 bits from the previous stage are added to the accumulator 13.
That is, the result obtained by adding the output value of the transversal filter at the preceding stage to the accumulation result is obtained. The selection circuit 10 described above is not necessary in the first-stage transversal filter. The accumulation result of the final stage transversal filter is L / 2 from the time division switch circuit 11.
It is output bit by bit and is subtracted from the echo signal Y by the subtractor 5 in FIG. In this embodiment, since the signal is the L / 2 bit output from the time division switch circuit 11 to the next stage, the number of input / output terminals is L / 2 bit. That is, there is an effect that the number of input / output terminals can be reduced to half compared with the configuration of the conventional example. Needless to say, the number of input / output terminals can be further reduced by further dividing the accumulator.

As described above, in the present invention, the transversal filter is composed of a plurality of sets of accumulators for accumulating small parallel data, respectively, and is input in a time division manner from the transversal filter in the preceding stage of this accumulator. Small parallel data is input to the bit input of the accumulator of the corresponding digit, and "0" is forcibly added to the input of the other digit to which data is not sent. There is an effect that the circuit configuration can be simplified without the need to provide an adding circuit in front of the container.

[Brief description of drawings]

FIG. 1 is a block diagram showing an example of a conventional echo canceller.
FIG. 2 is a block diagram showing an example of the input / output configuration of the accumulating circuit in the embodiment of the present invention. In the figure, 1 ... Receiving side input terminal, 2 ... Receiving side output terminal, 3 ... Sending side input terminal, 4 ... Sending side output terminal,
5 ... Subtractor, 6, 6 '... Tap coefficient storage circuit, 7,
7 '... Received signal memory circuit, 8 ... Multiplier circuit, 9, 9'
…… Accumulation circuit, 11 …… Time division switch circuit, 10 ……
Selection circuit, 12, 13 ... Accumulator, 100, 200 ...
Transversal filter, X ... received signal, Y ... echo signal, e ... residual echo signal.

Claims (1)

[Claims] 1. A reception signal storage circuit, a tap coefficient storage circuit, a multiplication circuit for multiplying the contents of the reception signal storage circuit and the contents of the tap coefficient recording circuit, and a cumulative circuit for accumulating outputs of the multiplication circuit. A plurality of transversal filters each including an arithmetic circuit, and the plurality of transversal filters are connected in cascade, and the accumulator circuits of the respective transversal filters include accumulated values of outputs of the multiplier circuits and transformers from the previous stage. In the echo canceller, the output circuit of the final stage transversal filter is input to a circuit that subtracts from the transmission signal, the means including a means for calculating a total value with the output value of the versal filter. It is composed of multiple sets of accumulators for accumulating parallel data, and each of the transversal filters has a plurality of output data of each accumulator. The transversal filter except the first stage is provided with a time-division switch circuit that sequentially outputs the small parallel data of the above, and the output value of the multiplication circuit and the output value of the time-division switch circuit of the transversal filter of the previous stage and the fixed value. By inputting the value "0", the output of the multiplication circuit is input to the accumulator of the corresponding digit of the accumulation circuit during the convolution operation, and after the convolution operation is completed, the time division switch of the previous stage is input. A selection circuit for successively inputting small parallel data output from the circuit to the bit input of the accumulator of the corresponding digit of the accumulator circuit and inputting "0" to the bit input of the accumulator of the other digit. The output of the time divisional switch circuit of the final stage transversal filter is output as a total value of the outputs of the cascade-connected transversal filters. Removed by the device.