JPH0639367Y2 - Bias prevention control device for reactive power compensator - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial application] The present invention relates to a control device for preventing biasing of a high impedance transformer that generates reactive power when a thyristor is energized in a reactive power compensator.

[Prior Art] A thyristor switch connected in anti-parallel with a high-impedance transformer is connected in series to a reactive power load circuit that changes abruptly like an arc furnace, and is connected in parallel with the load. A method is adopted in which the secondary current of the transformer is controlled at high speed by the thyristor switch to suppress voltage fluctuations. When the arc furnace consumes a positive / negative unbalanced load current, the control device controls it so as to cancel it.
The high-impedance transformer is biased and defeats the original purpose of reactive power compensation.

In order to avoid such a problem of bias magnetism,
(1) Japanese Patent Application No. 59-53079 (see Japanese Patent Application Laid-Open No. 60-196825).
Proposal of "reactive power compensator", and (2) Japanese Patent Application No. 60
-19010 (see JP-A-61-177519). We applied for a "reactive power compensator" and proposed measures to prevent magnetic bias in high impedance transformers in this type of device.

The above (1) is a reactive power compensating circuit composed of a high impedance transformer and an antiparallel connection thyristor switch, samples and holds the primary current and the secondary current of the high impedance transformer for a certain time, and compares the two current signals. The thyristor switch is phase-controlled to detect the bias magnetic current and cancel it, thereby suppressing the bias magnetism of the high impedance transformer.

The above (2) detects the imbalance of the ignition section between the thyristor switches in the reactive power compensating circuit similar to (1), and reversely corrects the ignition pulse between the thyristor switches by the first-order lag minor loop, The ignition angles of the positive and negative pulses are aligned to suppress the magnetic bias of the high impedance transformer.

[Problems to be Solved by the Invention] In the above method (1), the CT coupled on the primary side and the secondary side of the high-impedance transformer is a CT if the measured current is biased.
Since the magnetic field is also demagnetized, in this method, both the circuit and adjustment such as sample-hold and comparison are complicated.

In the method (2), the reactive power compensator for an arc furnace or the like naturally requires high-speed response, so the main control is usually constituted by open loop control. Is controlled by a minor closed loop, the overshoot due to the time constant delay of PI control can induce reverse bias of high impedance transformer.

[Structure of the Invention] Among the above-mentioned conventional high-impedance transformer anti-bias prevention measures, the present invention relates to a reactive power compensator capable of improving overshoot due to PI control of (2) and operating in an extremely stable state. In order to obtain a control device, when detecting the positive / negative imbalance of the gate pulse of the thyristor switch of the reactive power compensator and performing the reverse correction by the minor loop, PI
It is configured to prevent reverse eccentricity due to control time constant delay.

The present invention will be described below with reference to the embodiments shown in the drawings.

FIG. 1 is a block diagram showing an outline of a reactive power compensating device incorporating the control device of the present invention, and FIG. 2 is a block diagram showing a bias magnetism correcting device in the device of FIG.

For the variable load 10 connected to the bus bar 1, a high impedance transformer 8 and a series circuit of a thyristor switch 9 connected in anti-parallel are connected to the bus bar 1, and a filter 13 is connected in parallel with the high impedance transformer 8.
Are connected. Further, PT2 is connected to the bus bar 1, the input side of the ΔQ detection circuit 4, the synchronization pulse circuit 5, and the bias magnetic correction circuit 11 is connected to the secondary side of PT2, and the input side of the ΔQ detection circuit 4 is connected to the variable load 10. It is also connected to the combined CT3. Pulses V _p and V _n to the anti-parallel connection thyristor switch 9 are input to the bias correction circuit 11 from the pulse generation circuit 6 described later together with the output signal V _{s of} PT2.

The outputs of the ΔQ detection circuit 4 and the bias correction circuit 11 are input to the adder 12, and the outputs thereof are input to the pulse generation circuit 6. Also,
A sync pulse is input from the sync pulse circuit 5 to the pulse generation circuit.

The output of the pulse generation circuit 6 is the bias magnetic correction circuit 11 as described above.
Is input to the pulse amplifier 7, and the output of the pulse amplifier 7 is input to the ignition terminal of the thyristor switch 9.

FIG. 2 shows a block diagram of the bias correction apparatus of FIG.

The voltage signal V _s from the PT2 is input to the synchronization shaping circuit 111,
V _p and V _n are input to the positive pulse expansion circuit 112 and the negative pulse expansion circuit 113, and the outputs thereof are the synchronous rectangular wave voltage signal V from the synchronization shaping circuit 111 in the positive signal pulse output circuit 114 and the negative signal output circuit 115. 'by _S, it dropped off the wave tail at positions synchronous power supply voltage becomes zero, positive signal pulse and a negative signal pulses are formed. The difference between the positive and negative signal pulses is calculated by an adder 116, and the proportional-integral circuit 117 is input to obtain the integrated value. For example, when ± 10VP is input to the multiplier 118, Then, the input to the adder 12 is obtained, and the value obtained by adding this and the output from the Q output detection circuit 4 is the pulse generation circuit 6
Will be entered.

On the other hand, as shown in FIG. 2, a dead zone circuit 119 and a circuit 120 for resetting the proportional-plus-integration circuit 117 to the output thereof are provided.

The dead zone circuit 119 integrates the output signals from the positive signal pulse output circuit 114 and the negative signal output circuit 115 for one cycle,
It has a function of detecting positive pulse ≈ negative pulse.

A series of these operations will be described with reference to the time chart shown in FIG.

The cause of the magnetic bias of the transformer is generally when a positive or negative asymmetric waveform is input, so the transformer starts from this state.
As shown in (b), if V _p and V _n pulses for energization control are generated in the anti-parallel connection thyristor, the energizing current of the reactive power compensation circuit becomes as shown in (a). , V _p , and V _n are expanded by the pulse expansion circuits 112 and 113, respectively, and the square wave output (V ₁ , V ₁ of the synchronization shaping circuit 111 in the positive signal pulse output circuit 114 and the negative signal pulse output circuit 115
By V ₁ ), the wave tail is cut off when the synchronous power supply voltage becomes zero, and the waveform becomes as shown in (c). These waveforms include a bias magnetic component.

The difference between the waveforms is calculated by the adder 116, and the difference between the positive and negative waveforms corresponds to the biased magnetic component and is integrated by the proportional-plus-integration circuit 117. (D) The figure shows this state. The operation time of the proportional-plus-integral circuit 117 is set to several hundred ms so as not to disturb the reactive power compensation operation.

(D) polarized磁成amount shown in the figures, in multiplier 118, the input than the synchronization-shaping circuit 111, is converted into magnetic deflection correction signal ± V _.DELTA.0 positive and negative as shown in (e) Fig.

The magnetic deflection correction signal ± V _.DELTA.0 is calculated by the adder 12 of FIG. 1, corrects the calculated compensation power corresponding signal Q at ΔQ detection circuit 4, as shown in FIG. 3 (f), for example, a positive On the side with a large amount of reactive compensation current, the phase pulse is sequentially emitted in the direction of the pulse indicated by the dotted line to squeeze the current, and on the side with a small amount of negative reactive compensation current, the phase pulse is sequentially output in the direction of the pulse indicated by the dotted line. Although the current is generated to increase the current, the proportional-plus-integration circuit 117 has a delay, so that the phase control pulse shown by the dotted line may go too far, which may cause reverse bias magnetization (overshoot).

The thyristor phase control pulse has positive and negative symmetry and the output of the bias correction circuit becomes zero. Therefore, the waveform signals V _A and V _B from the positive signal pulse output circuit 114 and the negative signal pulse output circuit 115 are supplied to the dead band circuit 119 for each cycle. Of the output signal widths, and when the difference becomes zero or shows a very small value, a signal is issued from the dead zone circuit 119 to operate the reset circuit 120 to operate the proportional-integral circuit 117. Reset. That is, the bias magnetic compensation circuit becomes 0 at this point, so that reverse bias is prevented.

With such a configuration, it is possible to eliminate the problematic overshoot. FIG. 3 (g) shows the phase control pulse generation time based on the time when the synchronous power supply voltage becomes zero.
t ₁ , t ₂ , t _{3 are} almost or the same,
When this state is reached, the proportional-plus-integrator circuit 117 is instantly reset.

[Advantages of the Invention] Regarding the problem of transformer bias magnetism that occurs when the phase of a high impedance transformer that constitutes the reactive power compensator of the reactive power compensator is controlled by a thyristor, the average value detection by PI control by the bias magnetism correction circuit The present invention deals with overshoot (reverse bias magnetism) due to the time constant delay that occurs when the method is used.
Since the dead zone circuit for the signal is provided and the PI control operation is reset by the signal from this dead zone circuit, it is possible to eliminate the above-mentioned overshoot and prevent the high impedance transformer from being magnetized. You can

[Brief description of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a block diagram showing a bias magnetic compensation circuit of the apparatus shown in FIG. FIGS. 3A to 3G are waveform diagrams of each part of the control device. 1 ... Bus bar, 2 ... PT, 3 ... CT, 4 ... Q detector, 5 ... Synchronous detector, 6 ... Pulse generator, 7 ... Pulse amplifier, 8 ... High impedance transformer, 9 ... Thyristor switch, 10 ... Variation Load, 11 ... Demagnetization correction circuit, 114 ... Positive signal pulse output circuit, 115 ... Negative signal pulse output circuit, 117 ... Proportional integration circuit,
118 ... Multiplier, 119 ... Dead band circuit.

Claims (1)

[Scope of utility model registration request] 1. A reactive power control for phase-controlling the thyristor switch of a reactive power compensator in which a high impedance transformer and a thyristor switch connected in anti-parallel are connected in series and arranged in parallel with a load connected to a bus bar. A bias prevention control device for a reactive power compensator for adding a bias correction signal to a signal to prevent bias of the high-impedance transformer, wherein the bias prevention controller is a synchronous shaping device using a bus voltage as an input. Circuit, a positive / negative pulse expansion circuit that outputs positive / negative expansion pulse signals by inputting positive / negative pulse signals from the pulse generation circuit, and a synchronous rectangular wave voltage signal and positive / negative pulse expansion from the synchronization shaping circuit. The positive and negative pulse signals of the circuit are input respectively, and the signal width from when the thyristor pulse is generated until the synchronous rectangular wave voltage signal becomes zero is detected every positive and negative half cycle. And a positive / negative signal pulse output circuit for outputting the positive and negative pulse signals, an adder for obtaining a bias magnetic component with the positive and negative pulse signals of the pulse output circuit as an input, a proportional integration circuit for integrating the output of the adder, and the synchronous shaping A multiplier that receives the synchronous rectangular wave voltage signal of the circuit and the output of the proportional-plus-integral circuit and outputs a bias magnetic correction signal; a synchronous rectangular wave voltage signal of the synchronization shaping circuit and a positive / negative signal of the positive / negative signal pulse output circuit. A dead band circuit that outputs a signal when a pulse is input and the signal widths of each half cycle of each positive / negative signal pulse are compared and the difference becomes zero or extremely small, and the proportional integration circuit by the output of the dead band circuit. An anti-bias control device for a reactive power compensating device, comprising a bias magnetism correction circuit comprising a reset circuit for resetting.