JPH0640609B2 - Differential amplifier circuit - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a differential amplifier circuit, and more particularly to expansion of input / output dynamic range of a differential amplifier.

Conventionally, when a wide-band DC direct-coupling amplifier is configured inside a semiconductor integrated circuit and an output dynamic range is required, a differential amplifier circuit in which a DC level shift stage is installed in front of a differential amplifier is used. There is.

FIG. 1 shows a conventional differential amplifier circuit. That is, a pair of transistors 4 and 6 are installed in the differential amplifier 2, and the emitters of these transistors 4 and 6 are commonly connected via resistors 8 and 9, and the connection point of the resistors 8 and 9 and the ground point are connected. A constant current source 10 is connected between them. Transistor 4
Is directly connected to the positive potential line to which the drive voltage Vcc is applied from the power supply terminal 12, the collector of the transistor 6 is connected to the positive potential line through the resistor 14, and the differential amplified output is taken out to the collector. Output terminal 1 for
6 is formed.

The level shift circuits 18A and 18B are individually installed in the respective base input portions of the transistors 4 and 6. The level shift circuit 18A includes a transistor 22 and a diode 24 installed between the positive potential line and the ground point.
And a constant current source 26 in a series circuit, and the level shift circuit 18B includes a transistor 28, a diode 30, and a constant current source 32. Each transistor 22, 28
The signal to be amplified is added to the base of the, and the signal whose DC level is shifted is added to the bases of the transistors 4 and 6 from the cathode side of the diodes 24 and 30.

According to such a differential amplifier circuit, the transistor 22,
The DC level of the signal applied to the base of 28 is level-shifted by the level shift circuits 18A and 18B and then applied to the differential amplifier 2, and the differential amplified output thereof is output terminal 1
Taken out from 6.

The differential amplification gain Gv of this differential amplifier circuit is Gv = R, where R _{E is} the resistance value of the resistors 8 and 9, re is the differential resistance of the transistors 4 and 6, and R _L is the resistance value of the resistor 14. _L / (re + R _E ) ... (1)

However, when the level shift circuits 18A and 18B are installed in the preceding stage of the differential amplifier 2 as described above, although it is effective for expanding the dynamic range of the output, the input dynamic range cannot be sufficiently obtained. If the input dynamic range is made sufficiently large, the output dynamic range will become small and the shift function of the level shift circuit will be limited.

Further, in the case of expanding the input / output dynamic range in this kind of amplifier circuit, there is a method of forming a differential amplifier with PNP type transistors and synthesizing and outputting the output current thereof. The frequency characteristics are poor in comparison, and it is not suitable for a wide band DC direct-coupling amplifier.

Therefore, the present invention provides a differential amplifier circuit that realizes simplification of the configuration by expanding the input / output dynamic range and configuring an amplitude compression circuit using a part of the elements of the differential amplifier. To aim.

That is, in the differential amplifier circuit of the present invention, the second transistor (44) is provided together with the first transistor (42) for sharing the base and collector and receiving the input signal to be amplified. The first constant current source (transistor 52, constant current source 86) for flowing an operating current to the first and second transistors is connected between the emitters of the transistors A second constant current source (transistor 60, constant current source 84) is connected between the base and collector of the first transistor and the current side, and a differential output is supplied from the collector side of the second transistor. A differential amplifier (40) to be taken out and a third transistor (70) for receiving an input signal to be amplified by this differential amplifier at the base are installed, and
A third constant current source (transistor 72, constant current source 88) is provided between the emitter of the third transistor and the reference potential point.
Is connected to shift the level of the input signal, and the input signal, which is the level shift output extracted from the emitter side of the third transistor of the level shift circuit, is input to the level shift circuit (48, 48A). The resistance (7
7) and having the same base and collector, the first transistor, the second constant current source connected to the base and collector side of the first transistor, and the first and second transistors. An amplitude compression circuit (46) for logarithmically compressing the amplitude of the input signal with the first constant current source connected to the emitter side is provided.

Hereinafter, the present invention will be described in detail with reference to the embodiments shown in the drawings.

FIG. 2 shows an embodiment of the differential amplifier circuit of the present invention.

In FIG. 2, the differential amplifier 40 is provided with first and second transistors 42 and 44 having a common emitter, and the transistor 42 is configured as a diode with its base and collector being commonly connected. .

A transistor 52 and a resistor 54, which form a first constant current source, are connected between the emitters of the transistors 42 and 44 and a common line connected to a reference potential point (GND) via a common terminal 50. A voltage source 55 for biasing is connected between the base of 44 and the common line.

A transistor 60 forming a second constant current source is connected via a resistor 58 between the collector of the transistor 42 and the positive potential line to which the drive voltage Vcc is applied from the power supply terminal 56, and the transistor 60 is also connected. A resistor 63 is connected between the collector of 44 and the positive potential line. The base of the transistor 60 is the transistor 62
The base and collector of the transistor 62 are connected in common, and the transistor 62 has a resistor 64 between the positive potential line and the common line, and the transistor 6 has a common base and collector.
2, a resistor 65, a transistor 66 having a common base / collector, and a resistor 68 are connected. That is, resistance 5
8, 64 and the transistors 60, 62 form a current inversion circuit, and the current flowing in the transistor 62 is inverted and flows from the transistor 60 to the transistor 42. Also,
The transistors 52 and 66 and the resistors 54 and 68 form a current inversion circuit, and the current flowing through the transistor 66 is inverted and the current of the transistor 52 is absorbed.

The level shift circuit 48 includes a third transistor 70, a transistor 72 forming a third constant current source, and a resistor 74 connected in series between the positive potential line and the common line. Transistor 66
The bases and collectors of the
Reference numerals 6 and 72 constitute a current inversion circuit, and the current flowing through the transistor 66 is inverted and flows through the transistor 72. A signal to be amplified is applied to a terminal 76 formed at the base of the transistor 70 from a signal source (not shown), and the level shift output is applied to the amplitude compression circuit 46 from the emitter of the transistor 70 through the resistor 77. . In this embodiment, the amplitude compression circuit 46 is composed of transistors 42, 44, 52, 60 which are some elements of the differential amplifier 40, resistors 54, 58 and a resistor 77.

The output of the differential amplifier 40 is applied to the base of the transistor 78. The transistor 78 has a resistor 8 on the emitter side between the positive potential line and the common line.
An output is taken out from an output terminal 82 which is connected through 0 and is formed on the emitter side.

The operation will be described based on the above configuration.

The current I flowing in the transistor 62 is inverted and flows from the transistor 60 to the transistor 42. At the same time, the current I flowing through the transistor 66 is inverted and flows through the transistor 72. When the resistance value of the resistor 54 is set to about 1/2 of that of the resistor 68, the transistor 52 sinks 2I of current. Here, when the voltage of the bias voltage source 55 is set equal to the voltage of the common terminal of the base and collector of the transistor 42, a current I flows through the transistor 44.

The signal applied to the base of transistor 70 is applied to level shift circuit 48, its DC level is shifted, its output is applied to the base and collector of transistor 42, and its amplitude is logarithmically compressed. That is, the transistors 42 and 44 have their emitters connected in common to form a differential pair, but one of the transistors 42 is a diode connection in which the collector and base are in common, so that the transistor 42, 44 has an input function as a diode. There is a logarithmic relationship between the signal current and the collector-emitter voltage. In other words, the collector-emitter voltage increases logarithmically as the input signal current increases, and the output on the collector side is extracted as a signal obtained by logarithmically compressing the input signal current.

In this case, a voltage drop Vi due to the input signal AC component is generated between both terminals of the resistor 77.

The transistor 42 is a constituent element of the differential amplifier 40, and the logarithmically compressed signal thereof is differentially amplified, and the signal is taken out from the output terminal 82 via the transistor 78.

Therefore, the logarithmic compression operation will be described. Transistors 56, 60 and 72 in the differential amplifier circuit shown in FIG.
Constitutes a constant current source, and its equivalent circuit is as shown in FIG.

Here, the input voltage ∂V _i, the output voltage ∂V _O, the differential resistance of the transistors 42,44,70 _{r e42,}
r _e44 , r _e70 (= r _e ), the resistance value of the constant current 63 is R _L , the current flowing through the resistor 63 is ∂I _O , and the transistor 4
The current flowing through the collector of No. 4 is ∂I _C.

First, the voltage amplification gain G _V is obtained.

The output voltage is ∂V _O = ∂I _O × R _L , and the current ∂
I _O and ∂I _C are ∂I _O = ∂I _C.

Therefore, ∂V _O = ∂I _C × R _L (2) The base-emitter voltage of the transistor is ∂V
_BE , transconductance g _m is g _m = ∂I _C / ∂V _BE
Therefore, from this g _m , the base-emitter voltage is represented by ∂V _BE = ∂I _C / g _m (3)

The differential resistance r _e is r _e = 1 / g _m . From this, the voltage amplitude ∂ at the base and collector of the transistor 42
V _b is the base-emitter voltage ∂ of the transistor 42
V _BE42 , the sum of the base-emitter voltage ∂V _BE44 of the transistor 44, Becomes Therefore, the input voltage ∂V _i is Becomes

Here, the transconductance g _m is the
2, 44 and 70 are transconductances g _m42 and g
_{It is assumed} that _m44 and g _m70 are equal to each other (g _m = g _m42 = g
_m44 = g _m70 ) and the equation (5) is Becomes Substituting equation (6) into equation (2), And the amplification gain G _V is Becomes

Next, the voltage amplitude ∂V _b at the base-collector of the transistor 42 is obtained. Since the transistor 42 forms a diode, the diode equation And substituting equation (7) into equation (8), Becomes As is clear from this equation (9), ∂V _b ∝ln
Since it is f (∂V _i ), there is a logarithmic compression relationship between the base voltage amplitude V _b and the input voltage V _i , and the base voltage amplitude V _b is a value obtained by logarithmically compressing the input voltage V _i. .

Also, to represent the formula (9) by using the differential resistor r _e shown in Formula (3), Becomes As is clear from this equation (10), the relationship between the base voltage amplitude V _b and the input voltage V _i has a logarithmic compression relationship. _However, the _{R E> r e.}

According to such a configuration, after the DC level of the signal is shifted by the level shift circuit 48, the signal amplitude is compressed and differentially amplified, so that the output dynamic range can be expanded without impairing the input dynamic range. You can As a result, it can be used as a differential amplifier circuit of a semiconductor integrated circuit for low voltage driving. In addition, P
Since no NP-type transistor is used, the frequency characteristic is not deteriorated and a wide band can be realized.

FIG. 3 shows another embodiment of the differential amplifier circuit of the present invention,
The same parts as those in the embodiment shown in FIG. 2 are designated by the same reference numerals.

The differential amplifier 40 includes transistors 42 and 44 and constant current sources 84 and 86, the current I is supplied from the second constant current source 84, and the first constant current source 86 absorbs the current 2I. Further, the amplitude compression circuit 46 includes the differential amplifier 40.
Of transistors 42 and 44, constant current sources 84 and 86, and a resistor 77.

Level shift circuits 48A and 48B also serving as buffer circuits are individually installed at the base input portions of the transistors 42 and 44, and the level shift circuits 48A and 48B are composed of a transistor 70 and a third constant current source 88. .
An input terminal 76A is formed on the base of the transistor 70 on the level shift circuit 48A side, an input terminal 76B is formed on the base of the transistor 70 on the level shift circuit 48B side, and a signal to be amplified is applied to the input terminal 76A. A bias is applied to the input terminal 76B.

Then, in this embodiment, the output terminal 82 is formed on the collector side of the transistor 44, and the amplified output is taken out.

Even with this structure, the same effect can be expected by the same operation as that of the above-described embodiment.

In the case of this embodiment, the amplification gain G _v is given in the same manner as the equation (2).

The logarithmic compression of the signal amplitude is the same as in the above embodiment.

In each embodiment, the base / collector of the transistor 42 is commonly used as a diode, but this transistor 42 may be an ordinary diode.

As described above, according to the present invention, the differential amplifier, the level shift circuit for shifting the level of the input signal to be amplified by the differential amplifier, and the input signal to be applied to the differential amplifier through the level shift circuit. Since the differential amplifier circuit is composed of the amplitude compression circuit for logarithmically compressing the amplitude of the input / output, the input / output dynamic range can be expanded, and the level shift output extracted from the level shift circuit 1 transistor base
A first transistor connected to the base-collector side of the first transistor, which has a resistor added to the collector side and constitutes a part of a differential amplifier, that is, a first transistor having a common base-collector Constant current source, first
And a second transistor connected to the emitter side of the second transistor
By adopting a configuration in which the amplitude of the input signal is logarithmically compressed by the constant current source, the differential amplifier and the amplitude compression circuit can be integrated by sharing the elements, and the configuration can be simplified by reducing the elements. In addition to standardization of circuit constants,
The matching between the circuits can be improved, and highly reliable operation can be realized.

[Brief description of drawings]

FIG. 1 is a circuit diagram showing a conventional differential amplifier circuit, FIG. 2 is a circuit diagram showing an embodiment of the differential amplifier circuit of the present invention, and FIG. 3 is another embodiment of the differential amplifier circuit of the present invention. FIG. 4 is a circuit diagram showing an equivalent circuit of the differential amplifier circuit shown in FIG. 40 ... Differential amplifier 42 ... First transistor 44 ... Second transistor 46 ... Amplitude compression circuit 48, 48A ... Level shift circuit 52 ... Transistor (first constant current source) 60 ... Transistor (Second constant current source) 70 ... Third transistor 72 ... Transistor (third constant current source) 77 ... Resistor 84 ... Second constant current source 86 ... First constant current source 88 ...... Third constant current source

Claims (1)

[Claims] 1. A second transistor is installed together with a first transistor for receiving an input signal to be amplified with a common base / collector, and the emitters of the first and second transistors are connected in common and the emitter is connected. And a reference potential point, a first constant current source for supplying an operating current to the first and second transistors is connected, and a second constant current source is connected between the base and collector of the first transistor and the power supply side. A constant current source is connected, a differential amplifier for extracting a differential output from the collector side of the second transistor, and a third transistor for receiving an input signal to be amplified by this differential amplifier at its base are provided. , Between the emitter of this third transistor and the reference potential point,
A level shift circuit connected to the constant current source to shift the level of the input signal, and the input signal which is the level shift output extracted from the emitter side of the third transistor of the level shift circuit A transistor having a resistor applied to the base-collector side of the transistor, and having a common base-collector, the second constant current source connected to the base-collector side of the first transistor, A differential amplifier circuit comprising: an amplitude compression circuit for logarithmically compressing the amplitude of the input signal by using the first constant current source connected to the emitter sides of the first and second transistors.