JPH064304A - Serial data interrupt notification method - Google Patents

Abstract

(57) [Summary] [Objective] Regarding a serial interrupt data notification method for notifying information of interrupt occurrence by serial data, to provide a method for performing more advanced interrupt processing by adding information of interrupt type. To aim. [Structure] An interrupt data collection control unit 1a that constantly notifies the central processing unit 1 that controls the system of a serial interrupt data collection signal via the bus line 3, and an interrupt register 1b that holds the collected interrupt data. , Recognizes the interrupt data held by the interrupt register 1b,
An interrupt data recognition processing unit 1c for processing the recognition result is provided, and the interrupt type is determined and the processing is performed simultaneously with the recognition of the interrupt notification source in one interrupt collection operation.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a device requiring interrupt processing, and more particularly to a serial interrupt data notification system for notifying information of interrupt generation by serial data.

In recent years, with the advancement of various processing devices, it has been required to shorten the interrupt processing time. Therefore, the serial interrupt data collection signal is always output,
Although a method of confirming the interrupt source is provided, it is necessary to further recognize the interrupt type because it is not known which interrupt process should be performed.

[0003]

2. Description of the Related Art A conventional example will be described below with reference to FIGS. FIG. 3 is a diagram showing a configuration of a conventional example circuit, and FIG. 4 is a diagram showing a timing of the conventional example circuit.

In FIG. 3, 11 is a central processing unit (hereinafter,
CPU device), and interrupt data collection control unit
11a, an interrupt generation recognition unit 11b, and an interrupt type recognition access unit 11c.

Further, 12-1 to 12-n are a plurality of input / output devices having the same structure.
Each of -n includes an interrupt data output unit 12a and an interrupt type holding unit 12b. A bus line 13 connects the CPU device 11 and the input / output devices 12-1 to 12-n.

In FIG. 4, (a) shows a serial interrupt data collection signal, (b) shows serial interrupt data, and (c) shows n time slots T ₁ assigned to the serial interrupt data (b). shows the ~T _n.

Further, (d) is the timing of the recognition access of the serial interrupt type of the CPU device 11, and (e) is the timing of the serial interrupt processing. As shown in FIGS. 3 and 4, in the conventional interrupt notification method, the CP
A plurality of input / output devices 12-1 to 12 under the U device 11
-n is connected via the bus line 13, and the interrupt notification, which is the access from the CPU device 11, is always output from the interrupt data collection control unit 11a through the bus line 13 as the serial interrupt data collection signal (a). is doing.

Each of the interrupt data output units 12a of the input / output devices 12-1 to 12-n receives the serial interrupt data collection signal (a) from the CPU device 11 and receives its own time slot on the bus line 13. Serial interrupt data for T _{1 to} T _n
(b) is output, and the interrupt generation recognition unit 11b that has received the serial interrupt data (b) recognizes which of the input / output devices 12-1 to 12-n is the interrupt generation source.

However, as shown in FIGS. 4 (b) and 4 (c), from the interrupt data output unit 12a to the time slot (c)
Since the serial interrupt data (b) assigned and output to each of the time slots T _{1 to} T _n in the above is 1-bit information, the CPU device 11 can only determine whether or not there is an interrupt.

Therefore, in order for the CPU 11 device to recognize the interrupt type, it is necessary to access the interrupt source again to recognize the interrupt type.
For this access, there is an interrupt type recognition access unit 11c in the CPU device 11, and the interrupt type recognition access unit 11c determines which of the input / output devices 12-1 to 12-n is the interrupt source. At the same time, the CPU device 11 makes an interrupt type recognition access to the interrupt type holding unit 12b at the timing of the recognition access (d) after the end timing of one data collection operation.

Further, at the timing of the next interrupt processing (e) after the end of the recognition access, the CPU device 11 interrupts any of the recognized input / output devices 12-1 to 12-n. Go to run.

[0012]

Therefore, in the conventional serial data interrupt notification method, even if the serial interrupt data is received by the interrupt collection, only the origin of the interrupt can be recognized. However, there is a problem that a processing time is lost such that an access for recognizing the interrupt type must be performed, and the interrupt processing is performed after waiting for the access.

According to the present invention, for collecting serial interrupts, by adding the information on whether or not interrupt processing is necessary to the output data of the interrupt source and the information on the interrupt type, access for recognizing the interrupt type is unnecessary. , The purpose is to provide a method for performing more advanced interrupt processing.

[0014]

In order to achieve the above object, according to the present invention, as shown in FIG. 1, a central processing unit 1 for controlling a system is always provided with a serial interrupt data collection signal via a bus line 3. An interrupt data collection control unit 1a for notifying via, an interrupt register 1b for holding the collected interrupt data, an interrupt data recognition processing unit for recognizing the interrupt data held by the interrupt register 1b, and processing the recognition result. A serial interrupt collection signal notified from the interrupt data collection control unit 1a to a plurality of input / output devices 2-1 to 2-n that are provided with 1c and are slave-connected to the central processing unit 1 via the bus line 3. If there is an interrupt request, the interrupt data output that outputs serial interrupt data including the presence or absence of the interrupt and the type in the assigned time slot of the own device It includes a section 2a, configured to perform processing to determine simultaneously interrupt type recognition of the interrupt notification source in one interrupt collection operation.

[0015]

As shown in FIGS. 1 and 2, the present invention sends a serial interrupt data collection signal from the interrupt data collection controller 1a of the CPU device 1 to the interrupt source I / O device 2-1 to I / O device 2-n. The device which sends out the interrupt request outputs the interrupt data to which the interrupt type is added in one time slot assigned to itself.

Therefore, the CPU device 1 can immediately recognize and process the interrupt type after collecting the interrupt data.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will be described below with reference to FIGS. FIG. 1 is a diagram showing a configuration of an embodiment circuit of the present invention, and FIG. 2 is a diagram showing a timing of the embodiment circuit of the present invention.

In FIG. 1, reference numeral 1 is a CPU device, which comprises an interrupt data collection controller 1a, an interrupt register 1b, and an interrupt data recognition processor 1c. Also, 2-1 to 2-
n is an input / output unit including an interrupt data output unit 2a, and 3 is a CPU device 1 and an input / output device 2-1 to an input / output device 2-.
A bus line that forms a data path between n.

In FIG. 2, (a) shows a serial interrupt data collection signal, (b) shows serial interrupt data having a plurality of bits, and (c) shows a time slot assigned to this serial interrupt data (b). Indicates. Further, (d) is the timing of the interrupt processing of the CPU device 1.

Similar to the conventional example shown in FIGS. 3 and 4,
A plurality of input / output devices for collecting monitoring data under the control of the CPU device 1 via the bus line 3 from the CPU device 1.
2-1 to I / O device 2-n are connected.

It should be noted that the input / output device 2-1 to input / output device 2-n that generates and sends a serial interrupt request has a plurality of time slots T _{1 to} T _{n at} which the device itself should output serial interrupt data. It is assigned.

From the interrupt data collection control unit 1a in the CPU device 1, a serial interrupt data collection signal (a) indicating an interrupt request is constantly sent through the bus line 3 to each input / output device.
2-1 to I / O device 2-n.

Each of the input / output devices 2-1 to 2-n has an interrupt data output section 2a, and when there is an interrupt request, the presence / absence of an interrupt is checked in accordance with the time slots T _{1 to} T _n allocated to the device. Outputs interrupt data (b) consisting of multiple bits including the type.

[0024] The interrupt data (b), as shown in FIG. 2 (b), in correspondence to the interrupt without at the interrupt there cutlet 'L' in the 'H', also bit on one time slot T ₁ through T _n Each is a plurality of bits (3 bits in Fig. 2 (b))
Then, the input / output device 2-1 to the input / output device 2-n are created to represent the types.

The interrupt register 1b stores the interrupt data
Upon receiving (b), the data is once held and then processed in order by the interrupt data recognition processing unit 1c. When there is this interrupt data (b), the interrupt processing wait notification lamp is always
Turn on 1d to notify the outside that there is an interrupt processing state.

[0026]

As is apparent from the above description, according to the present invention, the interrupt source and the interrupt type can be recognized only by the interrupt data collection operation which is always performed, and immediately after the interrupt data collection. It has an effect of shifting to interrupt processing, and largely contributes to improvement of processing capability of various processing devices.

[Brief description of drawings]

FIG. 1 is a diagram showing a configuration of an embodiment circuit of the present invention.

FIG. 2 is a diagram showing a timing of a circuit according to an embodiment of the present invention.

FIG. 3 is a diagram showing a configuration of a conventional example circuit.

FIG. 4 is a diagram showing a timing of a conventional example circuit.

[Explanation of symbols]

 1 is a central processing unit (CPU device) 1a is an interrupt data collection control unit 1b is an interrupt register 1c is an interrupt data recognition processing unit 1d is a notification lamp 2-1 to 2-n is an input / output device 2a is an interrupt data output unit 3 is Bus line

Claims (1)

[Claims] 1. A central processing unit for controlling the system (1)
In addition, the serial interrupt data acquisition signal is always
Interrupt data collection control unit (1a) that notifies via (3)
An interrupt register (1b) for holding the collected interrupt data, and an interrupt data recognition processing unit (1c) for recognizing the interrupt data held by the interrupt register (1b) and processing the recognition result, The interrupt data collection control unit (1a) notifies the plurality of input / output devices (2-1 to 2-n) slaved to the central processing unit (1) via the bus line (3). When a serial interrupt collection signal is received and an interrupt request is issued, an interrupt data output unit (2a) that outputs serial interrupt data including the presence or absence of an interrupt and its type in the assigned time slot of its own device is provided. A serial data interrupt notification method characterized in that the interrupt type is determined and the processing is performed simultaneously with the recognition of the interrupt notification source.