JPH0644201A - Monitor device for computer system using shared memory - Google Patents

Abstract

PURPOSE:To analytically detect abnormality of the computer system which uses the shared memory by monitoring a CPU's access request and the response state of the shared memory. CONSTITUTION:This device is equipped with a means which sets a 1st flag 13 when no delay signal is generated even a set time T1 after a chip select signal is generated and a use right acquisition signal is generated and a means which sets a 2nd flag 16 when a ready signal and the use right acquisition signal are generated even a 2nd set time T2 longer than the time T1 is elapsed after the chip select signal is generated.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a monitoring system for analytically monitoring a state in which a shared memory cannot be normally accessed in a computer system using the shared memory.

[0002]

2. Description of the Related Art In various computers such as microprocessors, a CPU accesses various devices (main memory, external memory, etc.) according to a program to perform various processes. In the development stage, it is easy for the CPU to run away due to some mistake in the program during debugging. In order to check a program error, it is necessary to perform an operation test while checking each instruction step by step to check whether an illegal address is output.

[0003]

When the CPU is runaway, a reset signal is input and the same program is executed again while checking whether an illegal address is output, and debugging is repeated while following the program list. There must be. With this method, the program is executed by means such as a single step for confirmation, so it takes a lot of time and the work efficiency is very poor. One of the causes is that when the CPU goes out of control,
The only thing that is known is the result of a runaway. Therefore, we have no choice but to ask the program creator to analyze the cause of the runaway.

Debugging can be fairly simple if you know which device the CPU was trying to access when it went out of control. But there was no suitable tool for that. In particular, if it is possible to access a common memory in multiple systems (CPUs), and if a runaway occurs when trying to access the shared memory, it will be very difficult to discover that, and debug There was a problem that was even more troublesome.

The present invention has been made in view of the above-mentioned conventional problems. An object of the present invention is to monitor an access request of a CPU and a response status of the shared memory in a computer system using the shared memory to detect an abnormality. It is to provide a monitoring device capable of being detected analytically.

[0006]

The monitoring device of the present invention comprises:
A chip select signal generated from the address decoder when the CPU attempts to access the shared memory, a ready signal generated after a predetermined time from the ready circuit in response to the chip select signal, and the chip select signal in response to the chip select signal. The use right acquisition signal output from the arbitration circuit according to the state of the shared memory is used as an input, and the ready signal is not generated even when the set time T1 has elapsed after the chip selection signal was generated, and at that time point. Means for setting the first flag when the usage right acquisition signal is generated, and the ready even after the second set time T2 longer than the time T1 has elapsed since the chip selection signal was generated. Signal and means for setting a second flag when the usage right acquisition signal does not occur.

[0007]

The state in which the ready signal is not output even though the predetermined time has elapsed after the chip selection signal is output is considered to be an abnormal situation. However, the shared memory is accessed by another system that shares the memory. If the state is not taken into consideration, the abnormality cannot be determined simply because the abnormality ready signal is not generated for a certain period of time. In the monitoring device of the present invention configured as described above, the set time for abnormality monitoring is set to 2 of T1 and T2 depending on whether the right to use the shared memory is acquired or not.
Kind prepared. Then, if an abnormality of the ready signal is detected in each state, both are distinguished and stored by the above-mentioned first or second flag.

[0008]

DESCRIPTION OF THE PREFERRED EMBODIMENTS FIG. 1 shows an embodiment of a computer system equipped with a monitoring device 1 of the present invention. In this example,
Two systems A and B can access the shared memory (dual port memory) 2. When the CPU 3 of the system A tries to access the shared memory 2, the address decoder 5 detects this from the address signal, and the chip selection signal for the shared memory 2 is output. Upon receiving this chip selection signal, the access control circuit 9
Supplies a request signal to the arbitration circuit 4 of the shared memory 2. The arbitration circuit 4 manages the access state of the shared memory 2 by the two systems A and B, and gives a usage right acquisition signal to the system A or B depending on the situation. Also,
In response to the chip selection signal from the address decoder 5,
The ready circuit 6 supplies a ready signal to the CPU 3 after a predetermined time. Upon receiving this ready signal, the CPU 3 accesses the shared memory 2 via the address buffer 7, the data buffer 8 and the access control circuit 9.

In the above system configuration, the monitoring device 1
Operates as follows based on the chip selection signal from the address decoder 5, the usage right acquisition signal from the arbitration circuit 4, and the ready signal from the ready circuit 6.

FIG. 2 shows a specific example of the configuration of the monitoring device 1. In FIG. 2, the timer circuit 11 starts counting when the chip selection signal is turned on, and is cleared when the ready signal is turned on. Timer circuit 1
When the time value of 1 reaches the set time T1, the T1 elapsed signal is output, and when the time value reaches the set time T2, the time-up signal is output. Of course, T1 is a value smaller than T2.

If the ready signal is not output even after the elapse of T1 time from the turning on of the chip selection signal, the T1 elapse signal is output. At this time, if the usage right acquisition signal is turned on, the output of the AND gate 12 is turned on, and
Flag (flip-flop) 13 is set.

Further, if the ready signal is not output even after T2 time has elapsed after the chip selection signal is turned on, a time-up signal is output. At this time, if the usage right acquisition signal is not turned on, the output of the AND gate 15 is turned on and the second flag 16 is set.

As described above, the T
If the right to use the shared memory 2 can be obtained within 1, T1
If no ready signal is issued by then, it is determined that there is some abnormality, and the first flag 13 is set. If the usage right acquisition signal does not turn on within T1, it is not considered abnormal even if the ready signal does not occur within T1. If the time T2 has elapsed without obtaining the right to use the shared memory 2 and no ready signal has been issued until then, it is determined that there is something abnormal and the second flag 16 is set.

[0014]

As described in detail above, according to the monitoring apparatus of the present invention, in a computer system using a shared memory, occurrence of an abnormality relating to access to the shared memory is determined according to the acquisition status of the right to use the shared memory. Can be detected properly by using C
When a PU runaway occurs, it is easy to know whether or not there is an illegal operation on the shared memory, and the task of analyzing the cause of the runaway becomes very easy.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram of a computer system including a monitoring device of the present invention.

FIG. 2 is a block diagram showing a specific circuit example of the monitoring device in FIG.

[Explanation of symbols]

 1 Monitoring Device 2 Shared Memory 13 First Flag 16 Second Flag

Claims (1)

[Claims] 1. A chip select signal generated from an address decoder when a CPU attempts to access a shared memory, a ready signal generated after a predetermined time from a ready circuit in response to the chip select signal, and the chip select signal. In response to the state of the shared memory, the right-of-use acquisition signal output from the arbitration circuit is used as an input, and the ready signal is not generated even when the set time T1 has elapsed since the chip selection signal was generated. And a second setting time T2 longer than the time T1 has elapsed since the chip select signal was generated, when the usage right acquisition signal is generated at that time. Even if the ready signal and the usage right acquisition signal are not generated, a means for setting a second flag is provided, and a controller using a shared memory is provided. Computer monitoring system.