JPH0645728A - Manufacture method of circuit substrate - Google Patents

Abstract

PURPOSE:To perforate blind type through holes in a tall soldering land part for preventing solder bridges from being put up between respective semiconductor connecting lands at narrow pitch during the soldering step of electronic parts. CONSTITUTION:Through holes 13 are perforated into an insulating substrate 11 whereon a first metallic layer 12a is formed and then a second metallic layer 12b is formed. Next, a plating barrier film 20 is affixed to the position of the second metallic layer 12b excluding the through holes 13 and then a third metallic layer 12c is formed to pressure-fix a prepreg 16 to lower side of said insulating substrate 11. Next, a fourth metallic layer 12d and a fifth metallic layer 12e are respectively formed on the surface of the third metallic layer 12c and then after releasing and removing the film 20, the upper surface side of the insulating substrate 11 is photo-etched away. Finally, multiple solder connecting lands 17 and 18 are formed at narrow pitch respectively on the positions of the through holes 13 and the positions excluding the through holes 13.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method for manufacturing a circuit board having solder connection lands for soldering various electronic components such as integrated circuits and chip resistors.

[0002]

2. Description of the Related Art In a recent circuit board, a solder connecting land portion is provided at a position of a through hole in the circuit board so as to close the through hole, in other words, the through hole is a so-called blind type. By configuring it as a through hole and allowing electronic parts such as chip resistors to be soldered to this place as well,
BACKGROUND OF THE INVENTION High density or miniaturization of circuit boards has been attempted.

Therefore, the present inventor has proposed the following manufacturing method when manufacturing the circuit board having the blind type through hole. That is, first, in FIG.
As shown in FIG. 2, a plurality of through holes 3 for through holes are formed in an insulating substrate 1 made of glass epoxy resin having first metal layers 2a made of copper or the like on both upper and lower surfaces thereof, and then the first metal layer 2 is formed.
As shown in FIG. 13, the second metal layer 2b is formed on the surface of a and the inner surface of each through hole 3 by electroless plating of copper.

Then, as shown in FIG. 14, a third metal layer 2c is formed on the entire surface of the second metal layer 2b by copper electroplating, whereby the through holes 3 are formed.
After forming the through hole 4 in the inside, as shown in FIG. 15, the inner layer side wiring pattern 5 is formed by performing photo-etching on the lower surface side of the insulating substrate 1. Next, as shown in FIG. 16, the prepreg 6 is pressure-bonded to the lower surface side of the insulating substrate 1 so that the prepreg 6 is inserted into the through hole 4, and then the front surface side is shown in FIG. So, by electroless plating of copper,
A fourth metal layer 2d is formed, and a fifth metal layer 2e is formed on the surface of the fourth metal layer 2d as shown in FIG.
Are formed by electroplating copper.

Then, by performing photo-etching on the upper surface side of the insulating substrate 1, as shown in FIG.
The solder connecting lands 7 for forming the blind type through holes are formed, and the solder connecting lands 8 for mounting the electronic parts are formed at a narrow pitch interval on the portions other than the through holes 4 respectively. As shown in FIG. 20, solder resist 9 is applied to the upper surface of the insulating substrate 1 excluding the solder connection lands 7 and 8.

[0006]

According to the manufacturing method proposed above, each through hole 4 can be formed into a blind type through hole by the solder connecting land portion 7 formed at that location. As shown by the chain double-dashed line in FIG. 20, electronic parts such as the chip resistor A can be reliably soldered to the solder connecting land portion 7.

On the other hand, however, since the solder connecting lands 8 having a narrow pitch interval are formed at the same time as the solder connecting lands 7 at the positions of the through holes 4, the solder connecting lands 8 have a narrow pitch interval. The height H ′ of each solder connection land portion 8 is the same as that of each solder connection land portion 7 at each through hole 4, and each metal layer 2
The size is considerably high as it is the total thickness of the a, 2b, 2c, 2d and 2e.

Therefore, when soldering the electronic parts such as the integrated circuit B to the solder connecting lands 8 having a narrow pitch, as shown by the two-dot chain line in FIG. This causes a problem that a solder bridge is generated between the land portions 8. It is a technical object of the present invention to provide a method for manufacturing a circuit board in a form in which a solder bridge does not occur in soldering an electronic component to the circuit board.

[0009]

In order to achieve this technical object, according to the present invention, a through hole for a through hole is formed in an insulating substrate having a first metal layer formed on at least an upper surface thereof, and then the first A second metal layer is formed on the surface of the metal layer and the inner surface of the through hole by electroless plating, and then a third metal layer is formed on the entire surface of the second metal layer by electroplating.
After the prepreg is pressure-bonded to the lower surface side of the insulating substrate, the fourth metal layer is electroless plated on the surface of the third metal layer, and the fifth metal layer is electroplated on the surface of the fourth metal layer. Then, the upper surface side of the insulating substrate is photo-etched to form solder connection land portions at the through-hole through holes and a plurality of solder connection portions at the other positions than the through-holes. In a method of manufacturing a circuit board in which the land portions for soldering are formed at narrow pitch intervals, the second metal layer is formed on a portion of the insulating substrate where the land portions for solder connection having the narrow pitch distance are formed. A method of forming a plating barrier coating in a state before forming or in a state before forming the third metal, and removing the plating barrier coating before performing the photoetching. It was adopted.

[0010]

[Operation] In this way, the second portion is formed in the region of the insulating substrate where the land for solder connection with a narrow pitch is formed.
A plating barrier film is formed before the metal layer is formed or before the third metal is formed, and the plating barrier film is removed before the photoetching for forming the solder connection lands. By doing so, it is possible to prevent the second to fifth metal layers or the third to fifth metal layers from being formed in the region where the solder connection lands having the narrow pitch are formed.

As a result, the height of the solder connection land portion at the location of the through hole can be adjusted to the first metal layer, the second metal layer,
Since the total thickness of each of the third metal layer, the fourth metal layer, and the fifth metal layer can be obtained, the through hole 4 is a blind type through hole at the solder connection land portion formed at that location. On the other hand, the height of each solder connection land portion with a narrow pitch interval is set to be the thickness of the first metal layer, or the thickness of the first metal layer is added to the thickness of the second metal layer. It can be made as small as possible.

[0012]

Therefore, according to the present invention, a circuit board with through holes is formed into blind type through holes, and when soldering an electronic component, land portions for solder connection with a narrow pitch interval are formed. It has an effect that it can be manufactured in a form in which a solder bridge does not occur between them.

[0013]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENT An embodiment of the present invention will be described below with reference to the drawings of FIGS. First, as shown in FIG. 1, a plurality of through-holes 13 for through holes are formed in an insulating substrate 11 made of glass epoxy resin having a first metal layer 12a of copper or the like having a thickness of 18 μm formed on both upper and lower surfaces. Set up.

Then, as shown in FIG. 2, a second metal layer 12b having a thickness of 2 μm is formed on the surface of the first metal layer 12a and the inner surface of each through hole 13 by electroless plating of copper. Of the surface of the second metal layer 12b,
A film 20 made of synthetic resin is attached to the portion excluding each through hole 13 or a synthetic resin liquid is applied to form a plating barrier coating.

Then, as shown in FIG. 3, a third metal layer 12c having a thickness of 20 μm is formed on the whole by electroplating of copper, whereby through holes 14 are formed in the through holes 13. After forming, as shown in FIG.
The inner layer side wiring pattern 15 is formed by performing photo-etching on the lower surface side of the insulating substrate 11. Next, as shown in FIG. 5, the prepreg 16 is pressure-bonded to the lower surface side of the insulating substrate 11 so that the prepreg 16 is inserted into the through hole 14, and then the front surface side is shown in FIG. As described above, a fourth metal layer 12d having a thickness of 2 μm is formed by electroless plating of copper, and further, as shown in FIG. 7, a fourth metal layer 12d having a thickness of 20 μm is formed on the surface of the fourth metal layer 12d. The fifth metal layer 2e is formed by electroplating copper.

Then, as shown in FIG. 8, the synthetic resin film 20 is peeled and removed, and then the insulating substrate 11 is removed.
By performing photo-etching on the upper surface side of each of the through holes 14, as shown in FIG.
Solder connection lands 17 for forming the through holes 14 into blind type through holes are formed, and solder connection lands 18 for mounting electronic components are formed at a narrow pitch interval in a place other than each through hole 14. After that,
Each solder connection land portion 1 on the upper surface of the insulating substrate 11
As shown in FIG. 10, a solder resist 19 is applied to the portions except 7 and 18.

As described above, the synthetic resin film 20 is attached to the region of the insulating substrate 11 where the solder connecting lands 18 having a narrow pitch are formed, in the state before the third metal 12c is formed. In this state, after the third metal layer 12c, the fourth metal layer 12d, and the fifth metal layer 12e are formed, and before the photoetching for forming the solder connection lands 17 and 18 is performed, the above-mentioned synthesis is performed. By peeling and removing the resin film 20,
The third metal layer 12c and the fourth metal layer 1 are provided in the region where the solder connection lands 18 having a narrow pitch are formed.
It is possible to prevent the formation of 2d and the fifth metal layer 12e.

As a result, at the position of the through hole 14,
Height H of solder connection land 17 ₁The first metal layer 1
2a, second metal layer 12b, third metal layer 12c, fourth metal
Total thickness of each of the layers 12d and the fifth metal layer 12e
Total, that is H₁= 18 + 2 + 20 + 2 + 20 = 62
Through holes can be in the micron
14 to the solder connecting land portion 17 formed at the location.
Can be configured as a blind type through hole.
On the other hand, in each land 18 for solder connection with a narrow pitch interval.
Height H₂To the thickness of the first metal layer 12a.
2b plus thickness, that is, H₂= 18 + 2 = 2
It can be significantly reduced to 0 micron.
It

Therefore, with respect to the solder connecting land portion 17 at each through hole 14, as shown in FIGS.
As shown by the chain double-dashed line in FIG. 10, the chip resistor A can be reliably soldered, while the solder connecting lands 18 having the narrow pitch intervals are shown by double-dotted chain lines in FIGS. As shown in the figure, when the integrated circuit B is soldered, it is possible to reliably avoid the occurrence of a solder bridge between the solder connection land portions 18.

In the above-mentioned embodiment, the synthetic resin film 20 for the plating barrier is attached in the state before the third metal layer 12c is formed. However, the synthetic resin film 20 for the plating barrier is attached. The second metal layer 1
When the bonding is performed in the state before the formation of 2b, the height of each solder connection land portion 18 having the narrow pitch can be made the same as the thickness of the first metal layer 12a.

[Brief description of drawings]

FIG. 1 is a vertical cross-sectional front view of a state in which a first metal layer is formed on an insulating substrate in an example of the present invention.

FIG. 2 is a vertical cross-sectional front view showing a state where a second metal layer is formed on the insulating substrate of FIG. 1 and a synthetic resin film is attached.

3 is a vertical cross-sectional front view of a state where a third metal layer is formed on the insulating substrate of FIG.

FIG. 4 is a vertical sectional front view showing a state where an inner layer side wiring pattern of the insulating substrate of FIG. 1 is formed.

5 is a vertical cross-sectional front view of a state in which a prepreg is pressure-bonded to the lower surface of the insulating substrate of FIG.

FIG. 6 is a vertical cross-sectional front view of a state where a fourth metal layer is formed on the insulating substrate of FIG.

7 is a vertical cross-sectional front view showing a state where a fifth metal layer is formed on the insulating substrate of FIG.

FIG. 8 is a vertical cross-sectional front view of a state where a synthetic resin film is peeled off from the insulating substrate of FIG.

9 is a vertical cross-sectional front view of a state in which a solder connection land portion is formed on the insulating substrate of FIG.

10 is a vertical cross-sectional front view of a state in which a solder resist is applied to the insulating substrate of FIG.

11 is a plan view of FIG.

FIG. 12 is a vertical sectional front view showing a state in which a first metal layer is formed on an insulating substrate by the method before the present invention.

13 is a vertical cross-sectional front view showing a state where a second metal layer is formed on the insulating substrate of FIG.

14 is a vertical cross-sectional front view showing a state where a third metal layer is formed on the insulating substrate of FIG.

15 is a vertical cross-sectional front view of a state where an inner layer side wiring pattern of the insulating substrate of FIG. 12 is formed.

16 is a vertical cross-sectional front view of a state in which a prepreg is pressure-bonded to the lower surface of the insulating substrate of FIG.

17 is a vertical cross-sectional front view showing a state where a fourth metal layer is formed on the insulating substrate of FIG.

18 is a vertical cross-sectional front view showing a state where a fifth metal layer is formed on the insulating substrate of FIG.

FIG. 19 is a vertical cross-sectional front view of a state in which solder connecting lands are formed on the insulating substrate of FIG. 12;

20 is a vertical sectional front view showing a state in which a solder resist is applied to the insulating substrate of FIG.

[Explanation of symbols]

11 Insulating Substrate 12a First Metal Layer 12b Second Metal Layer 12c Third Metal Layer 12d Fourth Metal Layer 12e Fifth Metal Layer 13 Through Hole Through Hole 14 Through Hole 15 Inner Layer Pattern 16 Prepreg 17 Solder Connection Land Part 18 Solder Connection land 19 Solder resist 20 Synthetic resin film for plating barrier

Claims (1)

[Claims] 1. A through hole for a through hole is formed in an insulating substrate having a first metal layer formed on at least an upper surface thereof, and a second metal layer is not formed on the surface of the first metal layer and the inner surface of the through hole. It is formed by electrolytic plating, then a third metal layer is formed on the entire surface of the second metal layer by electroplating, and a prepreg is pressure-bonded to the lower surface side of the insulating substrate. The fourth metal layer on the surface of the metal layer by electroless plating,
A fifth metal layer is formed on the surface of the fourth metal layer by electroplating, and then the upper surface of the insulating substrate is photo-etched to connect the through holes for through holes with solder. In a method for manufacturing a circuit board, in which a plurality of solder connecting lands are formed at locations other than the through-holes at a narrow pitch interval, in the insulating substrate, for solder connection at the narrow pitch interval. A plating barrier film is formed in a region before forming the second metal layer or in a state before forming the third metal in a region of the land forming region, and the plating barrier film is subjected to the photoetching. A method for manufacturing a circuit board, characterized by removing before applying.