JPH0645962A - Transmitter/receiver - Google Patents

Abstract

(57) [Summary] [Object] To prevent interference between a transmission system circuit and a reception system circuit with a simple configuration in a transmission / reception device of a TDD system, a TDMA / TDD system, or the like. In a transmitter / receiver that time-divides one channel into a transmission slot and a reception slot and performs transmission and reception in a transmission slot and a reception slot of one channel, as a transmission signal modulation circuit 20, The oscillation signal is converted into two signals whose phases are shifted from each other by the phase shifting means 21, and the two signals are divided by the frequency dividers 22 and 2, respectively.
The frequency is divided by 3, and the respective divided signals are modulated by the transmission data, and the outputs of the respective frequency dividers 22 and 23 are prohibited during the period of the reception slot.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a transmitter / receiver for a communication system to which a TDD system such as TDMA / TDD system is applied.

[0002]

2. Description of the Related Art In a digital mobile phone applied to a telepoint system, a personal handy phone, etc., the same frequency is used for transmission and reception, and so-called ping-pong transmission is used for TDD (time division duplex) or TDD.
Some of them employ a DMA / TDD system (time division multiple access / time division duplex system).

That is, in the case of the TDD system, for example, as shown in FIG. 6, one channel (frequency) is temporally divided into a transmission slot T and a reception slot R, and these slots T and R are alternately repeated. At the same time, a guard time Tg is provided between these slots T and R. In this case, for example, each slot T and R is set to 1 msec and the guard time Tg is set to several tens of microseconds. Then, the mobile phone communicates with the base station in the transmission slot T and receives from the base station in the reception slot R.

In the case of the TDMA / TDD system,
In the communication between one mobile phone and the base station, the transmission slot T and the reception slot R in one channel are used only once in several cycles, and the other transmission slot T and the reception slot in the same channel are used. R is used for communication between another mobile phone and a base station, and is multiplexed so that communication between a plurality of communication devices can be performed on one channel. Therefore, the basic configuration of the transmission circuit and the reception circuit of the transmission / reception device is the same between the TDD system and the TDMA / TDD system, and the transmission / reception timing control and the like are different between both systems.

A transmitter circuit and a receiver circuit of a TDD type transmitter / receiver for performing such transmission / reception are shown in FIG.
It is configured as shown in.

First, the receiving system will be described. The received signal from the antenna 1 (whose line frequency is F ₀ ) is transmitted through the transmission / reception changeover switch 2 and is passed through the bandpass filter 3
Is supplied to. The output of the bandpass filter 3 is supplied to the mixer 5 via the amplifier 4, and the frequency Fs supplied to the mixer 5 from the frequency synthesizer 27 for channel selection common to the transmission system and the reception system is Fs = F ₀ -Fi ₁
Local oscillation signal is mixed, and the mixed output is supplied to the bandpass filter 6 and converted into a first intermediate frequency signal having a frequency of Fi ₁ . This first intermediate frequency signal is the mixer 7
And is mixed with the local oscillation signal supplied from the local oscillator 8 to the mixer 7, and the mixed output is supplied to the bandpass filter 9 and converted into a second intermediate frequency signal of frequency Fi ₂ . , From the output terminal 10 to a demodulator (not shown).

[0007] Next, explaining the transmission system, the frequency F _L of the oscillator 12 outputs supplies a carrier signal F _L = Fi ₁ to the quadrature modulation circuit 13. In addition, the two series of baseband signals I and Q from the input terminals 14 and 15 are supplied to the quadrature modulation circuit 1.
3 to modulate a carrier signal having a phase difference of 90 °,
The modulated signals are combined to obtain a quadrature modulated signal. This quadrature modulated signal is supplied to the mixer 16, the frequency Fs supplied from the frequency synthesizer 11 common to the receiving system to the mixer 16 is mixed with the local oscillation signal of Fs = F ₀ -Fi ₁ , and the mixture thereof is mixed. The output is supplied to the bandpass filter 17, and a transmission signal having a frequency F ₀ is obtained. This is transmitted through the amplifier 18 and the transmission / reception changeover switch 2 to the antenna 1
Is supplied to and transmitted.

[0008]

By the way, in such a transmitting / receiving apparatus, the output signal of the transmission system circuit does not adversely affect the reception processing in the reception system circuit.
It is preferable to stop the transmission system circuit during the reception slot. That is, in the TDD system and the TDMA / TDD system, since the transmission frequency and the reception frequency are the same, the interference between the transmission system circuit and the reception system circuit becomes a serious problem. However, in reality, the periods of the transmission slot and the reception slot are very short, and it is difficult to stop all the transmission system circuits only during the period of the reception slot.

For this reason, the applicant has previously provided a connection switch between the oscillator 12 and the quadrature modulation circuit 13 to connect this switch only for the period of the transmission slot, and to turn off this switch for the period of the reception slot. As a connection state, a transmission / reception device was proposed in which the carrier wave signal output from the oscillator 12 is supplied to the quadrature modulation circuit 13 only during the transmission slot period. With this configuration, the carrier signal is not supplied to the quadrature modulation circuit 13 during the reception slot,
The quadrature modulation circuit 13 does not output the transmission signal during the reception slot period, and the transmission signal does not adversely affect the reception processing during the reception slot period.

However, if a connection switch is provided between the oscillator 12 and the quadrature modulation circuit 13 for such processing, there is a disadvantage that the structure of the transmitter / receiver becomes complicated accordingly.

In view of the above point, the present invention aims to prevent interference between a transmission system circuit and a reception system circuit with a simple structure in a transceiver of this type.

[0012]

According to the present invention, for example, as shown in FIG. 1, one channel is time-divided into a transmission slot and a reception slot, and a transmission slot and a reception slot of one channel are transmitted and received. In a time-division transmission / reception apparatus, the oscillation signal is used as the modulation circuit 20 of the transmission signal, and the oscillation signal is made into two signals whose phases are mutually shifted by the phase shift means 21, and these two signals are respectively divided by the frequency divider 22,
The frequency division is performed at 23, and the respective frequency-divided signals are modulated with the transmission data, and the outputs of the respective frequency dividers 22 and 23 are prohibited during the reception slot period.

Further, according to the present invention, for example, as shown in FIG.
In a transmission / reception apparatus that time-divisionally divides one channel into a transmission slot and a reception slot, and performs transmission and reception in one channel's transmission slot and reception slot, the oscillation signal is used as a transmission signal modulation circuit 20. By the phase shift means 21, two systems of signals whose phases are mutually shifted,
The signals of these two systems are frequency-divided by frequency dividers 22 and 23, respectively, and the frequency-divided signals are modulated by the transmission data. The period is changed.

Further, in each case, the frequency dividers 22 and 2 are
The frequency division ratio of 3 is a power of 2 divided by one.

[0015]

According to the present invention, the output of the frequency divider constituting the modulation circuit is prohibited during the reception slot period, so that the modulation frequency signal is not output from the modulation circuit during the reception slot period. The transmitting system circuit does not output an interfering wave to the receiving system circuit during the reception slot.

Further, according to the present invention, the frequency division ratio of the frequency divider constituting the modulation circuit is changed to the period of the reception slot, so that the signal output from the modulation circuit is modulated during the period of the reception slot. The signal has a frequency different from the frequency, and the output of the transmission system circuit does not interfere with the reception system circuit during the reception slot.

[0017]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described below with reference to FIGS. In FIGS. 1 to 3, FIGS.
The same reference numerals are given to the portions corresponding to, and the detailed description thereof will be omitted.

This embodiment is applied to a TDD type transmitter / receiver as in the prior art, and its quadrature modulation circuit is constructed as shown in FIG. That is, in FIG.
Represents a quadrature modulation circuit. In the quadrature modulation circuit 20, a signal having a frequency 4f _{0 which is} four times the carrier frequency f ₀ supplied from the oscillator 12 is supplied to the phase shifter 21. The phase shifter 21 is composed of a flip-flop, and the output pulse Q or Q (inversion) is inverted every cycle of the signal having the frequency 4f ₀ . Therefore, the frequency of the output pulse Q and the output pulse Q (inversion) is set to 2f ₀ , which is half the frequency of the input pulse.
As indicated by A and B, the signals Q and Q (inverted) are mutually shifted in phase by 180 °.

The output Q and the output Q (inversion) of the two systems which are 180 ° out of phase with each other are supplied to the frequency dividers 22 and 23. This frequency divider 22 and 23, respectively
Has a frequency division ratio of 1/2, and a pulse of frequency 2f ₀ shown in A and B of FIG. 2 is converted into a frequency f ₀ shown in C and D of FIG.
The pulse is divided into 1/2. In this case, since the phase of the pulse supplied to the frequency divider 22 and the phase of the pulse supplied to the frequency divider 23 are inverted, the pulse frequency-divided by the frequency divider 22 (see FIG. 2). C) and the pulse (D in FIG. 2) whose frequency is divided by 1/2 by the frequency divider 23 are 90 ° out of phase with each other.

Then, the output pulses of the frequency dividers 22 and 23 are supplied to the low-pass filters 24 and 25 to remove the high frequency components to obtain the waveforms shown in E and F of FIG. The output waveforms of the low pass filters 24 and 25 are supplied to the mixers 26 and 27, and the terminals 14 and 15 are supplied.
The two series of baseband signals I and Q obtained in (1) are mixed with the outputs of the low-pass filters 24 and 25 to obtain data modulated by the output waveforms of the low-pass filters 24 and 25. The outputs of both mixers 26 and 27 are added to the adder 2
The signal of one system output from the adder 28 is supplied to the output terminal 29 as the output of the quadrature modulation circuit 20. Then, the output terminal 29 supplies the mixer 16 (see FIG. 7) for modulation to the transmission channel. The signal obtained at this output terminal 29 is
The transmission data is a signal that is quadrature-modulated at the frequency f ₀ .

In this example, the processing in the phase shifter 21 and the processing in the frequency dividers 22 and 23 in the quadrature modulation circuit 20 are controlled by the control circuit 30. The control circuit 30 is a circuit for controlling the timing of transmission / reception in this transmission / reception device, and the phase shifter 21 and the frequency dividers 22 and 23 perform corresponding processing only during the period of the transmission slot in which transmission is performed in this device. The operation is controlled so that the operation of the phase shifter 21 and the frequency dividers 22 and 23 is stopped in the reception slot. The control of this processing operation is performed, for example, by controlling the supply of power to operate each circuit.

Since the transmitter / receiver of this example is a TDD type transmitter / receiver, the transmission slots T and the reception slots R appear alternately as shown in FIG. 3, and the transmission slots T and the reception slots R are switched. The power supplied to the phase shifter 21 and the frequency dividers 22 and 23 is turned on and off every time. In this case, since the phase shifter 21 and the frequency dividers 22 and 23 are circuits in which the rising edge of the operation is relatively fast, even if the operation is stopped during the period of the receiving slot, the phase shifter 21 and the frequency dividers 22 and 23 are placed between the receiving slot and the transmitting slot. The operation becomes stable during the guard time Tg existing in 1), and the phase shift processing and frequency division processing are stably performed during the transmission slot period.

By thus stopping the phase shift processing and the frequency division processing during the reception slot, the modulated wave for quadrature modulation is not supplied to the mixers 26 and 27 side and is modulated for communication. The output signal is not output from the quadrature modulation circuit 20. Therefore, the transmission system circuit does not interfere with the reception system circuit during the reception slot period, and the reception operation in the reception system circuit is favorably performed. In the case of this example, it is only necessary to control the supply of power to the phase shifter 21 and the frequency dividers 22 and 23. Therefore, there is no need to provide a switch for interrupting the supply of the oscillation signal of the oscillator 12, and Is easy.

When the operation of the frequency divider or the like is stopped, the signal leaking to the output side of the transmission system circuit may directly leak the oscillation signal of frequency 4f ₀ output from the oscillator 12. Most of this oscillation signal is cut by the low-pass filters 24 and 25, and the amount leaked to the receiving circuit side is extremely small and does not affect the receiving operation.

In this example, the phase shifter 21 and the frequency divider 22,
Although the operation of both circuits of 23 and 23 is controlled, for example, only ON / OFF control of the power supply to the frequency dividers 22 and 23 may be performed.

Further, in the above embodiment, the operations of the frequency dividers 22 and 23 are stopped during the period of the receiving slot.
The frequency division ratio may be changed during the reception slot period. That is, for example, as shown in FIG. 4, the frequency division ratio of each frequency divider 22, 23 during the transmission slot period is set to 1 / N, and the frequency division ratio of each frequency divider 22, 23 during the reception slot period is set to 1 / K
And In this case, K ≠ N, and each is an integer of 2 or more (preferably, a power of 2). For example, the period of the transmission slot is divided by 1/2 as described above, and the period of the reception slot is divided by 1/4. By doing this, each frequency divider 2
The output frequencies of 2 and 23 become low, the modulated wave of the original frequency is not formed, the transmission system circuit does not interfere with the reception system circuit during the reception slot period, and the reception operation in the reception system circuit is prevented. Well done.

The frequency dividers 22 and 2 in each case
As described above, the frequency division ratio of 3 is 1 (1/1 /
2, 1/4, etc.) makes it possible to switch the division ratio relatively easily.

Next, another embodiment of the present invention will be described with reference to FIG. In the case of FIG. 5 as well, as in the example of FIG.
This is applied to a D-type transmitting / receiving device, and its quadrature modulation circuit is configured as shown in FIG. That is, in FIG.
Reference numeral 40 denotes a quadrature modulation circuit, and this quadrature modulation circuit 40 is
The frequency signal 2f _{0, which} is twice the carrier frequency f ₀ supplied from the oscillator 12 ′, is passed through the low pass filter 31 to J
It is supplied to the clock input terminals of the K flip-flops 41 and 42. In this case, the low-pass filter 31 is the oscillator 1
The 2'oscillation output is a filter that makes a signal having a duty of 50%, and the signal having a duty of 50% is supplied to the clock input terminals of the respective JK flip-flops 41 and 42. However, the inverted clock is supplied to the JK flip-flop 42 via the inverter gate 43.

The pulse obtained at the Q output terminal of the JK flip-flop 41 is supplied to the J input of the JK flip-flop 42, and the pulse obtained at the Q output terminal (inversion) of the JK flip-flop 42 is supplied to the JK flip-flop. Four
2 J inputs. Further, the clear pulse output from the control circuit 30 'for controlling the transmission / reception timing is supplied to the clear terminals of the JK flip-flops 41 and 42. While the clear pulse is supplied to this clear terminal, J
The operation of the K flip-flops 41 and 42 is stopped.

In this way, the JK flip-flop 4
By connecting 1 and 42 in two stages, each of the JK flip-flops 41 and 42 functions as a frequency divider, and the clock of frequency 2f ₀ is divided by ½ from each Q output terminal and output. Like In this case, the output pulses of both JK flip-flops 41 and 42 are 90 ° out of phase with each other.

The pulses obtained at the Q output terminals of the JK flip-flops 41 and 42 are supplied to the low-pass filters 24 and 25, and the low-pass filters 24 and 2 are supplied.
The signals from which the high frequency components have been removed in 5 are supplied to mixers 26 and 27. Then, with the mixers 26 and 27, the terminal 1
The I-channel and Q-channel transmission data obtained in 4 and 15 are mixed, both mixed signals are added by the adder 28, and the result is supplied to the output terminal 29. By doing so, a transmission signal quadrature-modulated at the frequency f ₀ is obtained at the output terminal 29.

The other parts are constructed similarly to the example of FIG.

In the case of the example of FIG. 5, the JK flip-flops 41 and 42 connected in two stages directly generate two types of pulses with a 90 ° phase shift, and are configured as 90 ° phase shift means. Therefore, the configuration of the quadrature modulation circuit can be simplified. Since the flip-flops 41 and 42 as the phase shifting means can easily control the operation by supplying the clear pulse, the control circuit 30 ′ simply supplies the clear pulse during the receiving slot.
It is possible to prevent the quadrature modulation circuit 40 from outputting a signal of the modulation frequency f ₀ during the reception slot. Therefore, also in the case of the example of FIG. 5, the transmitting system circuit does not interfere with the receiving system circuit during the period of the receiving slot, and the receiving operation in the receiving system circuit is favorably performed.

In each of the above-mentioned embodiments, the TDD system transmitter / receiver has been described, but it goes without saying that the present invention can also be applied to a transmitter / receiver device in which one channel is multiplexed as in the TDMA / TDD system. That is, if the operation of the frequency divider constituting the phase shift means in the quadrature modulation circuit is stopped at least during the period of the reception slot in which the transmission and reception is performed, the reception operation in the reception system circuit will be performed in any transmission method. Does not interfere with.

[0035]

According to the present invention, the output of the frequency divider constituting the modulation circuit is prohibited during the reception slot period, so that the modulation frequency signal is output from the modulation circuit during the reception slot period. Since the transmission system circuit does not output an interfering wave to the reception system circuit during the reception slot period, the reception sensitivity can be improved. In this case, since the configuration of the present invention only controls the frequency division operation of the frequency divider included in the quadrature modulation circuit, it is not necessary to provide a control means such as a switch, and the configuration can be simplified.

Further, according to the present invention, the frequency division ratio of the frequency divider constituting the modulation circuit is changed to the period of the receiving slot, so that the signal output from the modulating circuit is modulated during the period of the receiving slot. The signal has a frequency different from the frequency, the output of the transmission system circuit does not interfere with the reception system circuit during the reception slot, and the reception sensitivity can be improved. In this case, in the configuration of the present invention, since only the frequency division ratio of the frequency divider included in the quadrature modulation circuit is controlled, it is not necessary to provide control means such as a switch, and the configuration can be simplified.

[Brief description of drawings]

FIG. 1 is a configuration diagram of a quadrature modulation circuit according to an embodiment of the present invention.

FIG. 2 is a waveform chart provided for explaining one embodiment.

FIG. 3 is a timing diagram for explaining one embodiment.

FIG. 4 is a timing diagram provided for explaining a modified example of the embodiment.

FIG. 5 is a configuration diagram of a quadrature modulation circuit according to another embodiment of the present invention.

FIG. 6 is an explanatory diagram showing a TDD system slot formation state.

FIG. 7 is a block diagram showing an example of a conventional transmission / reception device.

[Explanation of symbols]

 12 oscillator 20 quadrature modulation circuit 21 phase shifter 22, 23 frequency divider 30, 30 'control circuit 40 quadrature modulation circuit 41, 42 JK flip-flop

Claims (3)

[Claims] 1. A channel comprising a transmission slot,
In a transmission / reception apparatus that time-divisions into a reception slot and performs transmission and reception in the transmission slot and the reception slot of the one channel in a time-division manner, the oscillation signal is used as a modulation circuit of the transmission signal by phase shift means. The signals of the two systems are out of phase with each other, the signals of the two systems are each divided by a frequency divider, and the respective frequency-divided signals are modulated by transmission data, and the outputs of the respective frequency dividers are , A transmitting / receiving device which is prohibited during the period of the receiving slot. 2. A channel comprising a transmission slot,
In a transmission / reception apparatus that time-divisions into a reception slot and performs transmission and reception in the transmission slot and the reception slot of the one channel in a time-division manner, the oscillation signal is used as a modulation circuit of the transmission signal by phase shift means. The signals of the two systems are out of phase with each other, the signals of the two systems are each divided by a frequency divider, the respective divided signals are modulated by transmission data, and the frequency division of each of the respective frequency dividers is performed. A transmission / reception device in which the ratio is changed during the period of the reception slot. 3. The transmission / reception device according to claim 1, wherein the frequency division ratio of the frequency divider is a power of two.