JPH065235A - Fluorescent character display tube - Google Patents

Abstract

PURPOSE:To prevent the deterioration and breakdown of a semiconductor device by connecting a front segment to a common electrode via a varistor element or a high-resistance element on an anode substrate so that static electricity induced by a segment electrode can be discharged. CONSTITUTION:A power input signal line 2a, an output line 2b, a segment electrode 2c, an electro-deposition extension line 2d and an electro-deposition terminal 2e are formed in an aluminum pattern on an anode substrate 6. An insulator layer is formed on the aluminum pattern and the substrate 6 except in a preset area. In addition, a graphite layer is formed in an area where a phosphor layer is formed. A varistor layer 7 or a high-resistance element layer is formed on the aluminum pattern for the electro-deposition extension line 2d in the direction perpendicular to the aluminum pattern. All segment electrode 2c is connected to a common electrode via the varistor layer 7 or the high- resistance element. In this way, static electricity induced by the segment electrode 2c can be easily discharged.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a fluorescent display tube, and more particularly to the structure of electrodes on an anode substrate of a fluorescent display panel.

[0002]

2. Description of the Related Art In recent years, a chip-in-glass (Chip In Glass) in which a driving semiconductor element is built in a vacuum envelope is used.
The production of ss) type fluorescent display panels (hereinafter abbreviated as CIG-FIP) is increasing. This CIG-FIP anode substrate has the following structure. That is, FIG.
2 is a sectional view taken along line AA of FIG. 2 and shows a power supply input signal line 2a, an output line 2b, a segment electrode 2c, and an extension line 2d for electrodeposition on the glass substrate 1 with a predetermined aluminum pattern by a sputtering method and a photo etching method. , And electrodeposition terminals 2e, which are covered with an insulating layer 8 leaving a predetermined portion, and a graphite layer 3 is formed in a through hole portion provided in the insulating layer by a thick film printing method. A phosphor layer 4 is formed on the graphite layer 3 by an electrodeposition method, and this serves as a segment electrode. The electrodeposition terminal 2e is separated at the substrate cutting section 5 after the phosphor layer 4 is electrodeposited. The driving semiconductor element is completed by die-bonding it to a predetermined place and then connecting its output to the segment electrode by wire bonding. This anode substrate 6
Has been completed as a CIG-FIP after being combined with a cover glass, undergoing the steps of sealing and exhausting.

[0003]

With the increase in size of the CIG-FIP, the capacitance of the segment has increased, and some have reached 300 pF. This segment electrode is formed on an insulating material such as glass and is only connected to the output terminal of the driving semiconductor element. Therefore, once static electricity is charged due to the approach of a charged substance from the outside, it does not discharge and remains charged all the time. When the driving semiconductor element works, the charged static electricity passes through the inside of the driving semiconductor element and is discharged all at once. Since the semiconductor element is composed of MOS transistors, the discharge may damage the gate oxide film or deteriorate the characteristics.

[0004]

According to the present invention, all segment electrodes of a fluorescent display panel are connected to a common electrode with a varistor or a high resistance element on an anode substrate, and static electricity charged through the common electrode is discharged. The present invention is characterized by having a common electrode that prevents the semiconductor element from being broken or deteriorated with almost no influence on the operation of the driving semiconductor element.

[0005]

The present invention will be described below with reference to the drawings. FIG. 1 is a plan view showing a first embodiment of the present invention.
FIG. 2 is a sectional view of a segment portion (AA in FIG. 1). A power source / input signal line 2a, an output line 2b, a segment electrode 2 having an aluminum pattern are formed on the anode substrate 6 made of a glass substrate by a sputtering method and a photoetching method.
c, the electrodeposition extension line 2d, and the electrodeposition terminal 2e are formed. Next, the insulator layer 8 is formed on the aluminum pattern and the glass substrate by a thick film printing method, leaving a predetermined portion. Further, the graphite layer 3 is also formed on the portion where the phosphor layer is to be formed by the thick film printing method. A phosphor layer 4 is formed on the graphite layer 3 by an electrodeposition method.

FIG. 3 is a BB sectional view (see FIG. 1) of the segment electrode and the common electrode portion formed on the electrodeposition extension line 2d of the present invention. As in FIG. 2, there is an aluminum pattern of the electrodeposition extension line 2d formed on the anode substrate 6, and a small amount of Co ₂ O ₃ or Bi ₂ O ₃ is added to the ZnO powder in the direction orthogonal to the aluminum pattern. The paste added and mixed with the low-melting glass is formed by thick film printing to have a thickness of 30 μm and a width of 2 mm, and is baked at about 650 ° C. to form the varistor layer 7. Next, wiring is baked on the varistor layer 7 with silver paste also by a thick film printing method, and the common electrode 9 is electrically connected to the GND electrode of the semiconductor element. With this structure, static electricity induced in the segment electrodes can be easily discharged.

FIG. 4 is a sectional view taken along the line BB of the segment electrode and the common electrode formed on the electrodeposition extension line 2d in the same manner as FIG. 3 in the second embodiment of the present invention. As in FIG. 2, there is an aluminum pattern of the electrodeposition extension line 2d formed on the anode substrate 6, on which a resistance paste containing RuO ₂ as a main component is also selected with a thickness of 50 μm by a thick film printing method. And then fired at about 650 ° C. to form the resistance layer 10. Next, the resistance layer 10 is wire-baked with a silver paste also by a thick film printing method on the resistance layer 10 to electrically connect it to the GND electrode of the semiconductor element as the common electrode 9. The material and area of the resistance layer 10 formed here are selected so as to be 1 MΩ or more per one segment electrode. As a manufacturing procedure, after the common electrode 9 is formed, a region other than the region where the phosphor layer is to be formed is masked with a rubber sheet, a negative voltage is applied from the electrodeposition terminal 2e, and the phosphor is electrodeposited in the electrodeposition solution. Then, the phosphor layer 4 described above is formed. Then, the glass substrate is cut at the cutting portion 5, and finally the semiconductor element is die-bonded to a predetermined portion, and the electrode is wire-bonded to complete the anode substrate. CIG-FIP is completed by filling and exhausting this anode substrate in combination with other electrode parts and a cover glass.

[0008]

As described above, according to the present invention, since all the segments are connected to the common electrode by the varistor element or the high resistance element in the anode substrate, the common electrode is connected to the driving semiconductor element. By connecting to the GND potential, the static electricity induced in the segment electrodes is discharged,
It is possible to prevent deterioration and destruction of semiconductor elements.

Even in a conventional type fluorescent display tube having no semiconductor driving element in the vacuum envelope, the same effect can be obtained by extracting these common electrodes to the outside and connecting them to the GND potential of the driving circuit.

[Brief description of drawings]

FIG. 1 is a plan view showing a positional relationship of main parts in a first embodiment of the present invention.

FIG. 2 is a cross-sectional view taken along the line AA of FIGS. 1 and 5.

FIG. 3 is a sectional view taken along line BB of FIG. 1 in the first embodiment of the present invention.

FIG. 4 is a sectional view taken along line BB of FIG. 1 in the second embodiment of the present invention.

FIG. 5 is a plan view showing a positional relationship of main parts in a conventional example.

[Explanation of symbols]

 1 Glass Substrate 2a Power Input Signal Line 2b Output Line 2c Segment Electrode 2d Electrodeposition Extension Line 2e Electrodeposition Terminal 3 Graphite Layer 4 Phosphor Layer 5 Substrate Cutting Section 6 Anode Substrate 7 Varistor Layer 8 Insulator Layer 9 Common Electrode 10 Resistance Layer

Claims (3)

[Claims] 1. In a fluorescent display panel in which a driving semiconductor element is built in a vacuum envelope, all segment electrodes forming a phosphor are connected to a common electrode via a varistor on an anode substrate. A fluorescent display tube characterized in that 2. In a fluorescent display panel in which a driving semiconductor element is built in a vacuum envelope, all segment electrodes forming a phosphor are connected to a common electrode via a high resistance element on an anode substrate. A fluorescent display tube characterized by being provided. 3. In a fluorescent display panel in which a driving semiconductor element is not incorporated in a vacuum envelope, all segment electrodes forming a phosphor are a common electrode via a varistor or a high resistance element on an anode substrate. A fluorescent display tube characterized by being connected to.