JPH0653009A - Multilayered thermistor - Google Patents

Multilayered thermistor

Info

Publication number
JPH0653009A
JPH0653009A JP22200792A JP22200792A JPH0653009A JP H0653009 A JPH0653009 A JP H0653009A JP 22200792 A JP22200792 A JP 22200792A JP 22200792 A JP22200792 A JP 22200792A JP H0653009 A JPH0653009 A JP H0653009A
Authority
JP
Japan
Prior art keywords
thermistor
electrodes
resistor
external
electrode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP22200792A
Other languages
Japanese (ja)
Inventor
Nobuyuki Nishimura
信幸 西村
Kazuhiko Oyama
和彦 大山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Taiyo Yuden Co Ltd
Original Assignee
Taiyo Yuden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Taiyo Yuden Co Ltd filed Critical Taiyo Yuden Co Ltd
Priority to JP22200792A priority Critical patent/JPH0653009A/en
Publication of JPH0653009A publication Critical patent/JPH0653009A/en
Withdrawn legal-status Critical Current

Links

Landscapes

  • Thermistors And Varistors (AREA)

Abstract

PURPOSE:To reduce the resistance of a multilayered thermistor, and restrain the irregularity of the resistance value, by arranging inner electrodes for lowering the resistance between the first outer electrode and the second outer electrode. CONSTITUTION:A first and a second outer electrodes 12 and 13 are arranged on a thermistor resistor 11. In order to lower the resistance between the first and the second outer electrodes 12 and 13, inner electrodes 14 are arranged in the resistor 11, so as not to come into contact with the outer electrodes 12, 13 but to keep intervals L1, L2.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は、電子機器の温度補償、
電流制御、温度検出などに使用するための積層型サーミ
スタに関する。
BACKGROUND OF THE INVENTION The present invention relates to temperature compensation of electronic equipment,
The present invention relates to a laminated thermistor for use in current control, temperature detection, etc.

【0002】[0002]

【従来の技術】典型的なサーミスタは、角柱あるいは板
状のサーミスタ抵抗体と、この両端に浸漬法等で形成さ
れた一対の電極とから成る。この種のサーミスタは構造
が簡単であるために安価に製造できるという長所を有す
る反面、一対の電極の相互間隔を所定値にすることに困
難を伴うので、抵抗値にバラツキが生じるという欠点を
有する。また、このサーミスタでは所定の耐圧を確保し
て低い抵抗値を得ることに困難を伴う。
2. Description of the Related Art A typical thermistor comprises a prismatic or plate-shaped thermistor resistor and a pair of electrodes formed at both ends by a dipping method or the like. This type of thermistor has an advantage that it can be manufactured at low cost due to its simple structure, but it has a drawback that the resistance value varies because it makes it difficult to set the mutual distance between the pair of electrodes to a predetermined value. . Further, it is difficult for this thermistor to secure a predetermined breakdown voltage and obtain a low resistance value.

【0003】上述のような問題を解決するために、図6
に示すように、サーミスタ抵抗体1の中に第1及び第2
の内部電極2、3を配置し、これ等を第1及び第2の外
部電極4、5に接続して積層構造にすることが、例えば
特公昭50−11585号公報等に記載されている。
In order to solve the above problems, FIG.
As shown in FIG.
It is described, for example, in Japanese Examined Patent Publication No. 50-11585, that the internal electrodes 2 and 3 are arranged and connected to the first and second external electrodes 4 and 5 to form a laminated structure.

【0004】[0004]

【発明が解決しようとする課題】しかし、図6に示す積
層構造の場合には、内部電極2、3と外部電極4、5と
の間の接続不良が生じ、所望の抵抗値が得られないこと
がある。また、内部電極2、3はサーミスタ抵抗体と異
なる熱膨張係数を有するので、サーミスタにヒートサイ
クルが加わると、内部電極2、3及び抵抗体1にクラッ
クが生じ、相互の密着不良及び内部電極2、3と外部電
極4、5との接続不良が生じる恐れがある。
However, in the case of the laminated structure shown in FIG. 6, a connection failure occurs between the internal electrodes 2 and 3 and the external electrodes 4 and 5, and a desired resistance value cannot be obtained. Sometimes. In addition, since the internal electrodes 2 and 3 have a different thermal expansion coefficient from the thermistor resistor, when a heat cycle is applied to the thermistor, cracks occur in the internal electrodes 2 and 3 and the resistor 1, resulting in poor adhesion to each other and the internal electrode 2. 3 and the external electrodes 4, 5 may be defectively connected.

【0005】そこで、本発明の目的は、内部電極と外部
電極との接続不良の問題が発生せず、且つ低抵抗化が可
能な積層型サーミスタを提供することにある。
Therefore, an object of the present invention is to provide a laminated type thermistor which does not cause a problem of connection failure between the internal electrode and the external electrode and which can reduce the resistance.

【0006】[0006]

【課題を解決するための手段】上記目的を達成するため
の本発明は、温度変化に応じて抵抗値が変化する抵抗材
料から成るサーミスタ抵抗体と、前記抵抗体の外周面に
設けられた第1及び第2の外部電極と、前記第1及び第
2の外部電極に接続されないように前記抵抗体に埋設さ
れ且つ前記第1及び第2の外部電極に対してこれ等の相
互間隔よりも短い距離を有して離間されている内部電極
とから成る積層型サーミスタに係わるものである。
In order to achieve the above object, the present invention provides a thermistor resistor made of a resistance material whose resistance value changes in accordance with a temperature change, and a first thermistor resistor provided on the outer peripheral surface of the resistor. The first and second external electrodes are embedded in the resistor so as not to be connected to the first and second external electrodes, and are shorter than the mutual interval with respect to the first and second external electrodes. The present invention relates to a laminated thermistor including internal electrodes that are spaced apart from each other.

【0007】[0007]

【発明の作用及び効果】本発明においては、第1及び第
2の外部電極と内部電極との相互間をサーミスタ抵抗と
して使用する。内部電極は第1及び第2の外部電極の相
互間の抵抗を低くする機能を有する。内部電極は外部電
極に接続されていないので、外部電極に対する接続不良
の問題が全く発生しない。また、内部電極が抵抗体に埋
設されているので、ヒートサイクルによる内部電極のク
ラックの発生を抑えることができる。
In the present invention, the space between the first and second external electrodes and the internal electrode is used as the thermistor resistance. The internal electrode has a function of reducing the resistance between the first and second external electrodes. Since the internal electrode is not connected to the external electrode, the problem of poor connection to the external electrode does not occur at all. Further, since the internal electrodes are embedded in the resistor, it is possible to suppress the occurrence of cracks in the internal electrodes due to heat cycles.

【0008】[0008]

【実施例】次に、図1〜図5を参照して本発明の実施例
に係わる積層型NTCサーミスタを説明する。図1に示
すサーミスタは、NTCサーミスタ材料から成る抵抗体
11と、第1及び第2の外部電極12、13と、複数の
内部電極14を有する。内部電極14は直方体形状の抵
抗体11の上面に平行な複数の仮想平面上に図3に示す
パターンに形成されたAg−Pd導体層から成り、一端
が第1の外部電極12に対して距離L1 を有して離間
し、他端が第2の外部電極13に対してL1 とほぼ同一
の距離L2 を有して離間している。従って、内部電極1
4と第1及び第2の外部電極12、13の接続不良の問
題は全く生じない。また、距離L1 、L2 は第1及び第
2の外部電極12、13の相互間隔L3 よりも小さい。
従って、第1及び第2の外部電極12、13間の絶縁耐
圧は十分に確保されている。なお、第1及び第2の外部
電極12、13は、抵抗体11の一対の側面に形成さ
れ、且つ抵抗体11の上面及び下側に延在している。
EXAMPLE A laminated NTC thermistor according to an example of the present invention will now be described with reference to FIGS. The thermistor shown in FIG. 1 has a resistor 11 made of an NTC thermistor material, first and second external electrodes 12 and 13, and a plurality of internal electrodes 14. The internal electrode 14 is composed of Ag-Pd conductor layers formed in a pattern shown in FIG. 3 on a plurality of virtual planes parallel to the upper surface of the rectangular parallelepiped-shaped resistor 11, and one end of the internal electrode 14 is distanced from the first external electrode 12. The second end is separated from the second external electrode 13 by a distance L2 which is substantially the same as L1. Therefore, the internal electrode 1
4 and the problem of poor connection between the first and second external electrodes 12 and 13 does not occur at all. The distances L1 and L2 are smaller than the mutual distance L3 between the first and second outer electrodes 12 and 13.
Therefore, the withstand voltage between the first and second external electrodes 12 and 13 is sufficiently secured. The first and second external electrodes 12 and 13 are formed on the pair of side surfaces of the resistor 11 and extend to the upper surface and the lower side of the resistor 11.

【0009】次に、図4を参照してサーミスタの製造方
法を説明する。まず、所定量の酸化マンガン及び酸化コ
バルトに原子価制御剤及び焼結助剤を加え、湿式ボール
ミルにて攪拌の後に脱水、乾燥を行い、仮焼きをし、再
度湿式ボールミルにて攪拌の後に脱水、乾燥を行なっ
て、セラミック・NTCサーミスタ材料の粉体を得た。
次に、この粉体に所定量のポリビニルブチラール系の有
機バインダーと可塑剤とトルエン系溶媒を加え湿式ボー
ルミルにて攪拌し、脱胞してスラリーを得た。次に、こ
のスラリーを使用してドクターブレード法で厚さ100
μmのグリーンシート(未焼成セラミックシート)を複
数枚形成した。図5に示すようにグリーンシート11a
〜11dは1枚から多数のサーミスタを得ることができ
るように大面積に形成されている。次に、第1〜第3の
グリーンシート11a〜11cに内部電極14を得るた
めの導体層14aをAg−Pdペーストのスクリーン印
刷によって形成した。次に、第1、第2、第3及び第4
のグリーンシート11a、11b、11c、11dを図
4に示す順に積層し、圧着し、しかる後、図4で破線で
示す位置をカットしてサーミスタの成形体を得、脱バイ
ンダーのために成形体を大気中で400℃、2時間加熱
し、しかる後、大気中で1200℃、2時間焼成して図
1及び図2に示す抵抗体11を得た。最後に、抵抗体1
1の両側面にAg−Pdペーストを塗布して焼付けるこ
とによって第1及び第2の外部電極12、13を形成し
た。
Next, a method of manufacturing the thermistor will be described with reference to FIG. First, a valence control agent and a sintering aid are added to a predetermined amount of manganese oxide and cobalt oxide, stirred in a wet ball mill, dehydrated and dried, calcined, and again stirred in a wet ball mill and dehydrated. Then, the powder was dried to obtain a powder of ceramic / NTC thermistor material.
Next, a predetermined amount of a polyvinyl butyral-based organic binder, a plasticizer, and a toluene-based solvent were added to this powder, and the mixture was stirred with a wet ball mill to remove the cells to obtain a slurry. Next, using this slurry, a thickness of 100 is obtained by the doctor blade method.
A plurality of μm green sheets (unfired ceramic sheets) were formed. As shown in FIG. 5, the green sheet 11a
11d are formed in a large area so that a large number of thermistors can be obtained from one sheet. Next, the conductor layers 14a for obtaining the internal electrodes 14 were formed on the first to third green sheets 11a to 11c by screen printing of Ag-Pd paste. Next, the first, second, third and fourth
4. The green sheets 11a, 11b, 11c and 11d are laminated in the order shown in FIG. 4, pressure-bonded, and then the position shown by the broken line in FIG. 4 is cut to obtain a thermistor molded body, and a molded body for debinding. Was heated in the air at 400 ° C. for 2 hours, and then fired in the air at 1200 ° C. for 2 hours to obtain a resistor 11 shown in FIGS. Finally, resistor 1
The first and second external electrodes 12 and 13 were formed by applying Ag—Pd paste on both side surfaces of No. 1 and baking.

【0010】図5は図1のサーミスタの等価回路を示
す。図5の端子12a、13aは図1の第1及び第2の
外部電極12、13に対応し、抵抗R1 、R2 、R3 は
3つの内部電極14の左端と第1の外部電極12との間
の抵抗を示し、抵抗R4 、R5、R6 は3つの内部電極
14の右端と第2の外部電極13との間の抵抗を示す。
左側の抵抗R1 、R2 、R3 と右側の抵抗R4 、R5 、
R6 との相互間は内部電極14に対応する。もし、内部
電極14がなければ第1及び第2の外部電極12、13
の相互間隔L3 に依存して抵抗値が決まるが、本実施例
のように内部電極14を設けると、第1及び第2の外部
電極12、13の相互間隔L3 を内部電極14によって
縮めたと等価な作用が生じ、抵抗値が小さくなる。ま
た、複数の内部電極14が設けられているので、抵抗の
並列接続回路になり、一対の外部電極12、13の相互
間抵抗値は更に低くなる。
FIG. 5 shows an equivalent circuit of the thermistor shown in FIG. The terminals 12a and 13a of FIG. 5 correspond to the first and second outer electrodes 12 and 13 of FIG. 1, and the resistors R1, R2 and R3 are between the left ends of the three inner electrodes 14 and the first outer electrode 12. And the resistances R4, R5, and R6 represent resistances between the right ends of the three internal electrodes 14 and the second external electrode 13.
Left resistors R1, R2, R3 and right resistors R4, R5,
An internal electrode 14 is provided between R6 and each other. If there is no inner electrode 14, the first and second outer electrodes 12, 13
The resistance value is determined depending on the mutual distance L3 between the two electrodes. However, when the internal electrode 14 is provided as in the present embodiment, it is equivalent to reducing the mutual distance L3 between the first and second external electrodes 12 and 13 by the internal electrode 14. And the resistance value becomes smaller. Further, since the plurality of internal electrodes 14 are provided, a resistance parallel connection circuit is formed, and the resistance value between the pair of external electrodes 12 and 13 is further reduced.

【0011】内部電極14は図4に示すようにスクリー
ン印刷によって形成するので、抵抗値の誤差が小さい。
また、グリ−ンシート11a〜11dの内部電極14た
めの導体層14aを設けない部分が相互に圧着されるの
で、剥離現象の少ない比較的安定した積層体を得ること
ができる。
Since the internal electrode 14 is formed by screen printing as shown in FIG. 4, the error in the resistance value is small.
Further, since the portions of the green sheets 11a to 11d where the conductor layer 14a for the internal electrodes 14 is not provided are pressure-bonded to each other, it is possible to obtain a relatively stable laminated body with less peeling phenomenon.

【0012】[0012]

【変形例】本発明は上述の実施例に限定されるものでな
く、例えば次の変形が可能なものである。 (1) 図1においてL1 とL2 を異なる値にすること
ができる。 (2) 第1及び第2の外部電極12、13を焼成後に
形成せずに、焼成前に成形体に対して導体ペーストを塗
布し、内部電極と外部電極とを同時に形成することがで
きる。また、第1及び第2の外部電極12、13をメッ
キ法、浸漬法等で形成することもできる。
MODIFICATION The present invention is not limited to the above-mentioned embodiments, and the following modifications are possible. (1) In FIG. 1, L1 and L2 can have different values. (2) Without forming the first and second outer electrodes 12 and 13 after firing, the conductor paste can be applied to the molded body before firing to simultaneously form the inner electrodes and the outer electrodes. Alternatively, the first and second external electrodes 12 and 13 can be formed by a plating method, a dipping method, or the like.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明の実施例の積層型サーミスタを示す中央
縦断面図である。
FIG. 1 is a central longitudinal sectional view showing a laminated thermistor according to an embodiment of the present invention.

【図2】図1のサーミスタの斜視図である。FIG. 2 is a perspective view of the thermistor of FIG.

【図3】図1の内部電極のパターンを示す平面図であ
る。
3 is a plan view showing a pattern of internal electrodes of FIG. 1. FIG.

【図4】図1のサーミスタの製造方法を示す図である。FIG. 4 is a diagram showing a method of manufacturing the thermistor of FIG.

【図5】図1のサーミスタの等価回路図である。5 is an equivalent circuit diagram of the thermistor of FIG.

【図6】従来の積層型サーミスタを示す断面図である。FIG. 6 is a sectional view showing a conventional laminated type thermistor.

【符号の説明】[Explanation of symbols]

11 抵抗体 12 第1の外部電極 13 第2の外部電極 14 内部電極 11 Resistor 12 First External Electrode 13 Second External Electrode 14 Internal Electrode

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 温度変化に応じて抵抗値が変化する抵抗
材料から成るサーミスタ抵抗体と、 前記抵抗体の外周面に設けられた第1及び第2の外部電
極と、 前記第1及び第2の外部電極に接続されないように前記
抵抗体に埋設され且つ前記第1及び第2の外部電極に対
してこれ等の相互間隔よりも短い距離を有して離間され
ている内部電極とから成る積層型サーミスタ。
1. A thermistor resistor made of a resistance material whose resistance value changes in accordance with a temperature change, first and second external electrodes provided on an outer peripheral surface of the resistor, and the first and second And an internal electrode embedded in the resistor so as not to be connected to the external electrode and spaced from the first and second external electrodes by a distance shorter than the mutual distance therebetween. Type thermistor.
JP22200792A 1992-07-29 1992-07-29 Multilayered thermistor Withdrawn JPH0653009A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP22200792A JPH0653009A (en) 1992-07-29 1992-07-29 Multilayered thermistor

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP22200792A JPH0653009A (en) 1992-07-29 1992-07-29 Multilayered thermistor

Publications (1)

Publication Number Publication Date
JPH0653009A true JPH0653009A (en) 1994-02-25

Family

ID=16775646

Family Applications (1)

Application Number Title Priority Date Filing Date
JP22200792A Withdrawn JPH0653009A (en) 1992-07-29 1992-07-29 Multilayered thermistor

Country Status (1)

Country Link
JP (1) JPH0653009A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100342305B1 (en) * 1999-10-26 2002-06-27 유니썸테크놀로지 주식회사 Laminated NTC infrared detector and fabricating method therefor

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100342305B1 (en) * 1999-10-26 2002-06-27 유니썸테크놀로지 주식회사 Laminated NTC infrared detector and fabricating method therefor

Similar Documents

Publication Publication Date Title
JP3681900B2 (en) Multilayer ceramic capacitor
JPH02135702A (en) Lamination type varistor
JP2003151805A (en) Chip element component and its manufacturing method
JPH02189903A (en) Laminated varistor
JPH04150001A (en) Thermistor element
JPH0661014A (en) Laminated thermistor
JPS6339958Y2 (en)
JPH0634201U (en) Stacked thermistor
JPH0653010A (en) Multilayered thermistor
JPS636121B2 (en)
JP2769625B2 (en) Method of manufacturing multilayer printed filter for electric circuit
JPH0653008A (en) Multilayered thermistor
JP3632592B2 (en) Chip thermistor and manufacturing method thereof
JP3245933B2 (en) Resistor
JPH06260302A (en) Chip-type ptc thermistor
JP3667099B2 (en) High temperature thermistor element, manufacturing method thereof, and temperature sensor for high temperature using the same
JPH04150002A (en) Thermistor element
KR100340130B1 (en) Complex device of PTC thermistor-varistor and fabricating method therefor
JPS63258001A (en) Resistance element
JP3189419B2 (en) Resistor
JPH0774006A (en) Chip-type ceramic thermistor
JPH01186601A (en) V2o3 ceramics resistor element
JPH06310304A (en) Ntc thermistor
JPH10135065A (en) Multilayer ceramic capacitors
JPH02276203A (en) Manufacturing method of multilayer thermistor

Legal Events

Date Code Title Description
A300 Withdrawal of application because of no request for examination

Free format text: JAPANESE INTERMEDIATE CODE: A300

Effective date: 19991005