JPH065723B2 - Method for producing amorphous silicon photodiode - Google Patents

Method for producing amorphous silicon photodiode

Info

Publication number
JPH065723B2
JPH065723B2 JP59192891A JP19289184A JPH065723B2 JP H065723 B2 JPH065723 B2 JP H065723B2 JP 59192891 A JP59192891 A JP 59192891A JP 19289184 A JP19289184 A JP 19289184A JP H065723 B2 JPH065723 B2 JP H065723B2
Authority
JP
Japan
Prior art keywords
film
amorphous silicon
metal
contact hole
metal film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP59192891A
Other languages
Japanese (ja)
Other versions
JPS6170753A (en
Inventor
耕司 千田
匡裕 須佐
義光 広島
博之 水野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electronics Corp filed Critical Matsushita Electronics Corp
Priority to JP59192891A priority Critical patent/JPH065723B2/en
Publication of JPS6170753A publication Critical patent/JPS6170753A/en
Publication of JPH065723B2 publication Critical patent/JPH065723B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F30/00Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors
    • H10F30/20Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors
    • H10F30/21Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation
    • H10F30/22Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes
    • H10F30/223Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PIN barrier
    • H10F30/2235Individual radiation-sensitive semiconductor devices in which radiation controls the flow of current through the devices, e.g. photodetectors the devices having potential barriers, e.g. phototransistors the devices being sensitive to infrared, visible or ultraviolet radiation the devices having only one potential barrier, e.g. photodiodes the potential barrier being a PIN barrier the devices comprising Group IV amorphous materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10FINORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00Constructional details of devices covered by this subclass
    • H10F77/30Coatings
    • H10F77/306Coatings for devices having potential barriers

Landscapes

  • Solid State Image Pick-Up Elements (AREA)
  • Light Receiving Elements (AREA)

Description

【発明の詳細な説明】 産業上の利用分野 本発明は、非晶質シリコン(a−Si)ホトダイオード
の製造方法に関する。
Description: FIELD OF THE INVENTION The present invention relates to a method for manufacturing an amorphous silicon (a-Si) photodiode.

従来例の構成とその問題点 近年、a−Siホトダイオードは、密着型一次元イメー
ジセンサの光電変換部での応用が期待されている。
Configuration of Conventional Example and Problems Thereof In recent years, an a-Si photodiode is expected to be applied to a photoelectric conversion unit of a contact type one-dimensional image sensor.

以下、図面を参照しながら、従来のa−Siホトダイオ
ードの製造方法について説明する。
Hereinafter, a conventional method for manufacturing an a-Si photodiode will be described with reference to the drawings.

第1図は従来の製造方法で作られたa−Siホトダイオ
ードの断面図である。第1図において、1は絶縁基板、
2はN型a−Si層、3はI型a−Si層、4はP型a
−Si層である。5は、例えば窒化シリコン(SiN)
膜や酸化シリコン(SiO2)膜などによる絶縁膜であ
る。6は例えばITO(Indium Tim Oxide)などの透明
金属による上部電極、7は金属配線、8は下部電極であ
る。
FIG. 1 is a sectional view of an a-Si photodiode manufactured by a conventional manufacturing method. In FIG. 1, 1 is an insulating substrate,
2 is an N-type a-Si layer, 3 is an I-type a-Si layer, 4 is a P-type a
-Si layer. 5 is, for example, silicon nitride (SiN)
It is an insulating film such as a film or a silicon oxide (SiO 2 ) film. 6 is an upper electrode made of a transparent metal such as ITO (Indium Tim Oxide), 7 is a metal wiring, and 8 is a lower electrode.

以上のような構造のa−Siホトダイオードは、絶縁基
板1の表面に下部電極8を形成し、その上にN型a−S
i層2、I型a−Si層3、P型a−Si層4を連続成
長させてパタン形成する。その上に、例えば、窒化シリ
コン(SiNx)膜や酸化シリコン(SiO2)膜など
による絶縁膜5を成長させ、次に絶縁膜5をエッチング
してコンタクトホールを形成する。次に、ITOなどの
透明金属による上部電極6、さらには、金属アルミニウ
ム(Al)などによる金属配線7を形成して、a−Si
ホトダイオードができる。
In the a-Si photodiode having the above structure, the lower electrode 8 is formed on the surface of the insulating substrate 1, and the N-type a-S is formed on the lower electrode 8.
The i layer 2, the I-type a-Si layer 3, and the P-type a-Si layer 4 are continuously grown to form a pattern. An insulating film 5 made of, for example, a silicon nitride (SiNx) film or a silicon oxide (SiO 2 ) film is grown thereon, and then the insulating film 5 is etched to form a contact hole. Next, an upper electrode 6 made of a transparent metal such as ITO and a metal wiring 7 made of metal aluminum (Al) are formed, and a-Si is formed.
A photodiode can be created.

しかしながら、上記のような方法では、コンタクトホー
ル形成のドライエッチング工程において、SiNxやS
iO2などの絶縁膜5は下部のP型a−Si4に対して
十分なエッチング選択比がないため、P型a−Si膜4
が薄くなったり、時には、P型a−Si膜4がなくなる
といった問題が発生する。
However, according to the method as described above, in the dry etching process for forming the contact hole, SiNx or S
Since the insulating film 5 such as io 2 does not have a sufficient etching selection ratio with respect to the lower P-type a-Si 4, the P-type a-Si film 4 is not formed.
However, there is a problem that the P-type a-Si film 4 disappears.

発明の目的 本発明は上記欠点に鑑み、コンタクトホール形成の絶縁
膜エッチング工程において、下部のa−Siがまったく
エッチングされないa−Siホトダイオードの製造方法
を提供することを目的とする。
SUMMARY OF THE INVENTION In view of the above drawbacks, an object of the present invention is to provide a method for manufacturing an a-Si photodiode in which the lower a-Si is not etched at all in the insulating film etching step for forming a contact hole.

発明の構成 この目的を達成するために本発明のa−Siホトダイオ
ードの製造方法では、a−Si成長後その上に金属クロ
ム(Cr)を蒸着して、Crのパタン形成を行い、その
Crパタンをマスクにしてa−Siのパタン形成を行
い、全面に絶縁膜を成長させ、前記絶縁膜にコンタクト
ホール用の開口部を形成し、前記開口部に露出したCr
を除去してコンタクトホールを形成し、同コンタクトホ
ールに透明電極を形成することから形成されている。
To achieve this object, in the method for manufacturing an a-Si photodiode of the present invention, after a-Si growth, metallic chromium (Cr) is vapor-deposited thereon to form a Cr pattern, and the Cr pattern is formed. Is used as a mask to form an a-Si pattern, an insulating film is grown on the entire surface, an opening for a contact hole is formed in the insulating film, and Cr exposed in the opening is formed.
Is removed to form a contact hole, and a transparent electrode is formed in the contact hole.

この製造方法によれば、絶縁膜の開口部を形成する際
に、下部のa−Siがまったくエッチングされることが
なく、光電変換特性にとって重要なa−Siの膜厚の変
動を抑制することができる。
According to this manufacturing method, when forming the opening of the insulating film, the lower a-Si is not etched at all, and fluctuations in the thickness of the a-Si that are important for photoelectric conversion characteristics are suppressed. You can

実施例の説明 以下、図面を用いて、本発明に係るa−Siホトダイオ
ードの製造方法の一実施例を詳細に説明する。
Description of Embodiments An embodiment of a method for manufacturing an a-Si photodiode according to the present invention will be described in detail below with reference to the drawings.

先ず、第2図に示すように、絶縁基板10の表面に、例
えば金属クロムで下部電極11を形成し、その上に、N
型a−Si層12,I型a−Si層13,P型a−Si
層14をプラズマCVD装置により連続成長させる。さ
らに、その上に、金属クロム(Cr)を蒸着して、必要
な金属クロムパタン15を形成する。次に第3図に示す
ように、金属Crパタン15をマスクとして、下部のP
IN構造のa−Siをエッチングして、a−Siのパタ
ン形成を行う。その上に、例えば、窒化シリコン(Si
Nx)膜や酸化シリコン(SiO2)膜などによる絶縁
膜16を成長させる。次に第4図に示すように、絶縁膜
16をエッチングしてコンタクトホール用の開口部を形
成し、さらに絶縁膜16をマスクとして開口部より不必
要な金属クロム15を、エツチングで除去してコンタク
トホールを形成する。金属クロムパタン15を用いたこ
とにより、コンタクトホール用の開口部形成のドライエ
ッチングの際、下部のa−Siがエッチングされること
を防止することができる。次に第5図に示すように、I
TOなどの透明金属による上部電極17、さらには金属
Alなどによる金属配線18を形成して、a−Siホト
ダイオードができる。
First, as shown in FIG. 2, a lower electrode 11 is formed of, for example, metallic chromium on the surface of the insulating substrate 10, and N is formed on the lower electrode 11.
Type a-Si layer 12, I type a-Si layer 13, P type a-Si
The layer 14 is continuously grown by a plasma CVD apparatus. Further, metal chromium (Cr) is vapor-deposited thereon to form a necessary metal chromium pattern 15. Next, as shown in FIG. 3, using the metal Cr pattern 15 as a mask, the lower P
The a-Si having the IN structure is etched to form the a-Si pattern. On top of that, for example, silicon nitride (Si
An insulating film 16 made of an Nx) film or a silicon oxide (SiO 2 ) film is grown. Next, as shown in FIG. 4, the insulating film 16 is etched to form an opening for a contact hole, and unnecessary metal chrome 15 is removed from the opening by etching using the insulating film 16 as a mask. Form a contact hole. By using the metal chromium pattern 15, it is possible to prevent the lower a-Si from being etched during the dry etching for forming the opening for the contact hole. Next, as shown in FIG.
An upper electrode 17 made of a transparent metal such as TO and a metal wiring 18 made of a metal Al are formed to form an a-Si photodiode.

発明の効果 以上のように本発明のa−Siホトダイオードの製造方
法では、a−Si成長後に、その上に金属クロム(C
r)を蒸着して、金属Crのパタン形成後、その金属C
rパタンをマスクにして、自己整合的にa−Siのパタ
ン形成を行い、その上に絶縁膜を成長させコンタクトホ
ール用の開口部を形成し、同開口部の露出した金属Cr
を除去することによって、絶縁膜にコンタクトホールを
形成する際に、下部のa−Siがまったくエッチングさ
れることがなく、光電変換特性にとって重要なa−Si
の膜厚の変動を抑制することができ、その実用的効果は
大なるものがある。
As described above, in the method for manufacturing an a-Si photodiode of the present invention, after a-Si growth, metallic chromium (C
r) is vapor-deposited to form a pattern of metal Cr, and then the metal C
Using the r pattern as a mask, an a-Si pattern is formed in a self-aligned manner, an insulating film is grown thereon to form an opening for a contact hole, and the metal Cr exposed in the opening is formed.
By removing the a-Si, the lower a-Si is not etched at all when the contact hole is formed in the insulating film, which is important for the photoelectric conversion characteristics.
The fluctuation of the film thickness can be suppressed, and its practical effect is great.

【図面の簡単な説明】[Brief description of drawings]

第1図は、従来の製造方法で作られたa−Siホトダイ
オードの模式的断面図、第2図〜第5図は、本発明の一
実施例を示す工程断面図である。 10……絶縁基板、11……下部電極、12……N型a
−Si層、13……I型a−Si層、14……P型a−
Si層、15……金属Cr、16……絶縁膜、17……
上部電極、18……金属配線。
FIG. 1 is a schematic sectional view of an a-Si photodiode manufactured by a conventional manufacturing method, and FIGS. 2 to 5 are process sectional views showing an embodiment of the present invention. 10 ... Insulating substrate, 11 ... Lower electrode, 12 ... N-type a
-Si layer, 13 ... I-type a-Si layer, 14 ... P-type a-
Si layer, 15 ... Metal Cr, 16 ... Insulating film, 17 ...
Upper electrode, 18 ... Metal wiring.

───────────────────────────────────────────────────── フロントページの続き (72)発明者 水野 博之 大阪府門真市大字門真1006番地 松下電子 工業株式会社内 (56)参考文献 特開 昭58−56363(JP,A) 特開 昭55−150230(JP,A) ─────────────────────────────────────────────────── ─── Continued Front Page (72) Inventor Hiroyuki Mizuno 1006 Kadoma, Kadoma City, Osaka Prefecture Matsushita Electronics Industrial Co., Ltd. (56) Reference JP-A-58-56363 (JP, A) JP-A-55-150230 (JP, A)

Claims (2)

【特許請求の範囲】[Claims] 【請求項1】非晶質シリコン膜上に金属膜を蒸着する工
程と、前記金属膜のパターン形成を行う工程と、パター
ン形成された前記金属膜をマスクとして前記非晶質シリ
コン膜を除去する工程と、全面に絶縁膜を成長させ、前
記金属膜上の前記絶縁膜に前記金属膜よりも小面積のコ
ンタクトホール用の開口部を形成する工程と、前記開口
部に露出した前記金属膜を除去してコンタクトホールを
形成する工程および同コンタクトホールに透明電極を形
成する工程とを含むとともに、前記非晶質シリコン膜上
に残った前記金属膜と前記透明電極とを電極とすること
を特徴とする非晶質シリコンホトダイオードの製造方
法。
1. A step of depositing a metal film on an amorphous silicon film, a step of patterning the metal film, and a step of removing the amorphous silicon film by using the patterned metal film as a mask. A step of growing an insulating film on the entire surface, forming an opening for a contact hole having a smaller area than the metal film in the insulating film on the metal film, and exposing the metal film exposed in the opening. A step of removing and forming a contact hole and a step of forming a transparent electrode in the contact hole, wherein the metal film remaining on the amorphous silicon film and the transparent electrode are used as electrodes. A method of manufacturing an amorphous silicon photodiode.
【請求項2】金属膜を金属クロムとすることを特徴とす
る特許請求の範囲第1項記載の非晶質シリコンホトダイ
オードの製造方法。
2. The method for producing an amorphous silicon photodiode according to claim 1, wherein the metal film is made of metal chromium.
JP59192891A 1984-09-14 1984-09-14 Method for producing amorphous silicon photodiode Expired - Lifetime JPH065723B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59192891A JPH065723B2 (en) 1984-09-14 1984-09-14 Method for producing amorphous silicon photodiode

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59192891A JPH065723B2 (en) 1984-09-14 1984-09-14 Method for producing amorphous silicon photodiode

Publications (2)

Publication Number Publication Date
JPS6170753A JPS6170753A (en) 1986-04-11
JPH065723B2 true JPH065723B2 (en) 1994-01-19

Family

ID=16298693

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59192891A Expired - Lifetime JPH065723B2 (en) 1984-09-14 1984-09-14 Method for producing amorphous silicon photodiode

Country Status (1)

Country Link
JP (1) JPH065723B2 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2714144B2 (en) * 1989-06-15 1998-02-16 三洋電機株式会社 Photoelectric conversion element

Also Published As

Publication number Publication date
JPS6170753A (en) 1986-04-11

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