JPH0666319B2 - Method of manufacturing heterojunction bipolar semiconductor device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Outline] The present invention provides a method for manufacturing a heterojunction bipolar semiconductor device, for example, an n-type compound semiconductor layer made of the same material as a base layer on a p ⁺ -type compound semiconductor base layer. And a material for widening the energy band gap as compared with the base layer is introduced into a portion of the n-type compound semiconductor layer immediately below the emitter electrode by ion implantation or the like, and heat treatment is performed to reverse conductivity. By forming the type compound semiconductor emitter region, the base contact region does not have a wide energy band gap, the base resistance is reduced, and the emitter
The step between the bases can be kept small.

[Industrial application field]

The present invention relates to an improved method of manufacturing a heterojunction bipolar semiconductor device having an emitter layer with a wider energy bandgap than the base layer.

[Prior Art] FIG. 2 shows a cutaway side view of a main part of a conventional heterojunction bipolar transistor (HBT).

In the figure, 1 is a semi-insulating GaAs substrate, 2 is a collector contact layer, 3 is a collector layer, 4 is a base layer, 5 is an emitter layer, 6 is an emitter contact layer, 7 is an emitter electrode, and 8 is a base. Electrode, 9 collector electrode, 10 base
The contact areas are shown respectively.

The data of each part in this HBT is illustrated as follows.

(a) Collector / contact layer 2 material: GaAs conductivity type: n ⁺ impurity concentration: 6 × 10 ¹⁸ [cm ^-3 ] Thickness: 500 [nm] (b) Collector layer 3 material: GaAs conductivity type: n impurity concentration : 5 × 10 ¹⁶ [cm ^-3 ] Thickness: 300 [nm] (c) Base layer 4 Material: GaAs Conductivity type: p ⁺ Impurity concentration: 6 × 10 ¹⁹ [cm ^-3 ] Thickness: 100 [nm] (c) Emitter layer 5 material: AlxGa _1- xAs x value: 0.3 Conductivity type: n Impurity concentration: 5 × 10 ¹⁷ [cm ^-3 ] Thickness: 200 [nm] (e) Emitter contact layer 6 material: GaAs Conductivity type: n ⁺ Impurity concentration: 6 × 10 ¹⁸ [cm ^-3 ] Thickness: 400 [nm] (f) Base contact region 10 Conductivity type: p ⁺ Impurity concentration: 1 to 2 × 10 ¹⁹ [cm ^-3 As described above, a semiconductor device in which thin semiconductor layers are stacked and a current flows in the vertical direction is itself high-speed and has a large current driving capability, that is, a large transfer conductance gm, and thus a capacitive characteristic. It takes less time to charge and discharge the load and speeds up the entire electronic device. DOO are possible, also, in particular, the energy band between the emitter and base as in the illustrated example
If there is a gap difference, the current amplification factor h _FE can be increased.

[Problems to be solved by the invention]

In the semiconductor device shown in FIG. 2, the thickness of the emitter contact layer 6 is set to about 400 [n] in order to keep the emitter resistance low.
m], and it is quite thick. Therefore, when the emitter contact layer 6 and the emitter layer 5 are mesa-etched to expose the surface of the base layer 4 and the base electrode 8 is to be formed there, the step becomes considerably large.

Therefore, in order to reduce such a step, as shown in the figure, the base electrode 8 is formed not on the base layer 4 but on a part of the emitter layer 5 left during the mesa etching. I am in a situation where I cannot afford it.

Of course, in that case, by applying the ion implantation method,
The emitter contact region 10 doped with a high concentration of impurities is formed, and the base electrode 8 is formed on the surface thereof.

However, in the case where chromium (Cr) / gold (Au) is usually used as the material of the base electrode 8,
The deterioration of various characteristics due to the large ohmic contact resistance with respect to p ⁺ -type Al x Ga _1- x As has become a problem.

The present invention provides a heterojunction bipolar semiconductor device having a wide energy band gap emitter layer and having an extremely low base resistance.

[Means for solving problems]

In the method for manufacturing a heterojunction bipolar semiconductor device according to the present invention, one conductivity type compound semiconductor base layer (for example, p ⁺ -type Ga
A step of forming an opposite conductivity type compound semiconductor layer (for example, an n-type GaAs layer 5) of the same material as the base layer on the As base layer 4), and thereafter, an emitter electrode (for example, an n-type GaAs layer 5) in the opposite conductivity type compound semiconductor layer. A material (for example, Al) for widening the energy band gap as compared with the base layer is introduced into a portion just below the emitter electrode 7) and then heat-treated to have an opposite conductivity type compound semiconductor emitter region (for example, n-type AlxGa).
And a step of forming a _1- xAs emitter region 13).

[Action]

By adopting the above means, the emitter region containing Al and having a wide energy band gap exists only immediately below the emitter electrode, and even if the mesa etching from the surface is reduced, the base contact region is formed. Does not have a layer that contains Al and has a wide energy band gap, so the step between the emitter and base is small,
Moreover, the base resistance is kept low.

〔Example〕

FIGS. 1 (A) to 1 (C) are side sectional views of a main part of a semiconductor device at a process step for explaining one embodiment of the present invention, and FIG. 2 explains one embodiment of the present invention. FIG. 3 is a side view of a main part of the semiconductor device in a process step for cutting, which will be described below with reference to these drawings.

See Fig. 1 (A). (1) Molecular beam ep
By applying the itaxy: MBE method, each semiconductor layer is grown on the semi-insulating GaAs substrate 1. Compared with the conventional example described above, the n-type Al shown in FIG.
The difference is that the n-type GaAs layer 11 is grown instead of the emitter layer 5 made of xGa ₁ -xAs, and the other semiconductor layers are exactly the same.

The impurity concentration and the thickness of the n-type GaAs layer 11 are n-type Al x Ga _1- x As
It is the same as the emitter layer 5.

(2) A desired stepped mesa is formed by applying the mesa etching method.

As a result, a portion where the emitter electrode is to be formed on the surface, a portion where the n-type GaAs layer 11 is removed halfway to form the base electrode, and a portion where the collector electrode is to be formed are obtained.

(3) By applying the radio frequency (RF) sputtering method, a silicon dioxide (SiO ₂ ) film 12 with a thickness of about 500 [nm] 12
Then, the silicon dioxide film 12 is patterned by applying a normal photolithography technique to form an opening 12A on a portion where an emitter region is to be formed.

(4) By applying the ion implantation method using the silicon dioxide film 12 as a mask, the dose amount is about 1 to 2 × 10 ¹⁶ [cm
^-2 ] and the energy is about 200 [KeV], and Al ions are implanted. In the figure, the broken line portion indicates that Al ions have been implanted.

See FIG. 1 (B). (5) By applying a resist process in a normal photolithography technique, a photoresist film 13 having an opening 13A is formed on a portion where a base contact region is to be formed. .

(6) By applying the ion implantation method with the photoresist film 13 as a mask, the dose amount is about 1 × 10 ¹⁵ [c
m ^-2 ] and energy about 150 [KeV] (Mg + A
s) Implant ions. In the figure, the broken line portion shown near the opening 13A represents that (Mg + As) ions have been implanted.

See FIG. 1C. (7) After removing the photo resist film 13, the temperature is set to about 8
Heat treatment is performed at 50 to 950 [° C.] for about 2 to 6 [seconds].

As a result, the n-type AlxGa _1- xAs emitter region 14 is formed in the n-type GaAs layer 11, and the p ⁺ -type GaAs base contact region 15 is formed. Although a part of the n ⁺ type GaAs emitter / contact layer 6 is converted into n ⁺ type AlxGa _1- xAs, there is almost no problem in terms of electrode contact.

(8) The emitter electrode 7, the base electrode 8 and the collector electrode 9 are formed and completed by applying a normal technique.

In the heterojunction bipolar semiconductor device manufactured as described above, n-type Al x Ga _1- xAs is selectively formed in the n-type GaAs layer 11.
The emitter region 14 is formed, Al x Ga _1- x As is not present in the base contact region 15, and all are GaAs.
It is composed of.

〔The invention's effect〕

In the method of manufacturing a heterojunction bipolar semiconductor device according to the present invention, a step of forming an opposite conductivity type compound semiconductor layer of the same material as the base layer on a one conductivity type compound semiconductor base, and then the opposite conductivity type Forming a compound semiconductor emitter region of opposite conductivity type by introducing a material for widening the energy band gap as compared with the base layer into a portion immediately below the emitter electrode in the compound semiconductor layer and then heat treating the material; It is included.

In the heterojunction bipolar semiconductor device manufactured through these steps, there is no semiconductor layer containing a substance for making the energy band gap wider than the base layer in the base contact region as a mixed crystal forming material. , The base resistance can be significantly reduced, and
It is possible to make the meta-etching between the emitter and the base shallow to reduce the step, and thus it is advantageous for forming a precise pattern.

[Brief description of drawings]

FIGS. 1 (A) to 1 (C) are side sectional views of a main part of a semiconductor device in a process key part for explaining an embodiment of the present invention.
The figures respectively show cut-away side views of a main part of a conventional example. In the figure, 1 is a semi-insulating GaAs substrate, 2 is a collector contact layer, 3 is a collector layer, 4 is a base layer, 5 is an emitter layer, 6 is an emitter contact layer, 7 is an emitter electrode, and 8 is a base. Electrode, 9 collector electrode, 10 base
Contact region, 11 n-type GaAs layer, 12 silicon dioxide film, 12A opening, 13 photoresist film, 13A opening,
Reference numeral 14 is an emitter region, and 15 is a base contact region.

Claims (1)

[Claims] 1. A step of forming an opposite conductivity type compound semiconductor layer made of the same material as the base layer on a one conductivity type compound semiconductor base layer, and thereafter, a portion of the opposite conductivity type compound semiconductor layer immediately below the emitter electrode. Energy compared to the base layer
A step of introducing a material for widening the band gap and then performing a heat treatment to form a compound semiconductor emitter region of opposite conductivity type, and a method of manufacturing a heterojunction bipolar semiconductor device.