JPH0669075B2 - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH0669075B2 JPH0669075B2 JP61268546A JP26854686A JPH0669075B2 JP H0669075 B2 JPH0669075 B2 JP H0669075B2 JP 61268546 A JP61268546 A JP 61268546A JP 26854686 A JP26854686 A JP 26854686A JP H0669075 B2 JPH0669075 B2 JP H0669075B2
- Authority
- JP
- Japan
- Prior art keywords
- base substrate
- resin
- semiconductor device
- lsi
- powder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/10—Encapsulations, e.g. protective coatings characterised by their shape or disposition
- H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
Landscapes
- Wire Bonding (AREA)
- Die Bonding (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明はLSI実装体に係り、とくにLSIと配線基板との接
続の信頼性を向上するのに好適な半導体装置に関する。The present invention relates to an LSI package, and more particularly to a semiconductor device suitable for improving the reliability of connection between an LSI and a wiring board.
従来よりLSIを配線基板にはんだ溶融によって接続する
技術は良く知られている。Conventionally, a technique of connecting an LSI to a wiring board by melting a solder is well known.
この技術における制限は、LSIと配線基板との熱膨脹の
相異によって接続用はんだに大きな歪が繰返し発生して
遂には断線に至る点である。The limitation of this technique is that a large strain is repeatedly generated in the connecting solder due to the difference in thermal expansion between the LSI and the wiring board, which eventually leads to disconnection.
そこで、従来、前記の断線が発生しなようにLSIサイズ
を小さくするなどの設計的工夫がなされている。Therefore, conventionally, design measures such as reducing the LSI size have been made so that the disconnection does not occur.
前記歪を小さくするための一例として特開昭60−63951
号に記載され、これを第４図に示すように、LSI1が配線
基板２にはんだ４にて接続され、その周辺を粉粒体の入
った樹脂３により配線基板２に固着させるものが提案さ
れている。As an example for reducing the distortion, Japanese Patent Laid-Open No. 60-63951
As shown in FIG. 4, it is proposed that the LSI 1 is connected to the wiring board 2 by the solder 4 and the periphery thereof is fixed to the wiring board 2 by the resin 3 containing powder particles. ing.
この方式によれば、LSI1の熱膨脹をおさえ、はんだ４の
歪を少なくして熱疲労寿命を長くすることができる利点
がある。According to this method, there is an advantage that the thermal expansion of the LSI 1 can be suppressed, the strain of the solder 4 can be reduced, and the thermal fatigue life can be lengthened.
近年、この種の半導体装置においては、高密度化の要求
から配線基板として薄膜多層基板が使用されるようにな
ってきている。この薄膜多層基板はたとえば第５図に示
すようにセラミックなどのベース基板２上にポリイミド
などからなる樹脂を絶縁材料として多層化５をはかった
ものである。In recent years, in this type of semiconductor device, a thin film multilayer substrate has been used as a wiring substrate due to a demand for higher density. This thin film multi-layer substrate is, for example, as shown in FIG. 5, formed on a base substrate 2 such as ceramic by using a resin such as polyimide as an insulating material to form a multi-layer structure 5.
しかるに、第５図に示すように、粉粒体の入った樹脂３
でLSI1の周囲を包囲した場合、粉粒体の入った樹脂３と
ベース基板２との熱膨脹の差のため、温度変化によって
接着界面に応力が発生する。このとき、両樹脂3,5間の
接着強度に対して多層樹脂５とベース基板２との接着強
度は低く、とくに第６図に示すようにベース基板２の端
面では接着強度が弱く、反対に応力が最大になるため、
薄膜多層部分５がベース基板２からはく離する問題があ
る。However, as shown in FIG. 5, resin 3 containing powder and granules
When the periphery of the LSI 1 is surrounded by, stress is generated at the bonding interface due to a temperature change due to a difference in thermal expansion between the resin 3 containing the powder and the base substrate 2. At this time, the adhesive strength between the multilayer resin 5 and the base substrate 2 is lower than the adhesive strength between the resins 3 and 5, and the adhesive strength is particularly weak on the end face of the base substrate 2 as shown in FIG. Because the stress is maximum,
There is a problem that the thin film multilayer portion 5 is peeled off from the base substrate 2.
本発明の目的は、前記従来技術の問題点を解決し、優れ
た信頼性を有する半導体装置を提供することにある。An object of the present invention is to solve the above-mentioned problems of the prior art and to provide a semiconductor device having excellent reliability.
前記の目的は、ベース基板上に粉粒体の入った樹脂と直
接接着するための直接接着部を設置することにより達成
される。The above object can be achieved by providing a direct bonding portion for directly bonding with the resin containing the powder or granules on the base substrate.
前記薄膜多層部のはく離は、粉粒体の入った樹脂で接着
された部分の最外縁部に最も多く発生しやすいことがわ
かった。It was found that the peeling of the thin film multilayer portion was most likely to occur at the outermost edge portion of the portion bonded with the resin containing the powder and granules.
これは、樹脂とベース基板との熱膨脹の差が最も大きな
理由であって、この熱膨脹の差によって大きな応力が薄
膜多層部に加わると同時にその大きな応力は最外縁部に
加わるので、ベース基板からはく離する方向に力が働く
ためである。This is because the difference in thermal expansion between the resin and the base substrate is the largest, and a large stress is applied to the thin film multilayer portion at the same time as the large stress is applied to the outermost edge portion due to the difference in thermal expansion. This is because the force acts in the direction of doing.
そこで、本発明は、前記最外縁部の薄膜多層部を除去し
てセラミックなどからなるベース基板上に直接粉粒体の
入った樹脂を接着したので、応力に対する接着強度は、
薄膜多層部よりも大きくなって最外縁部の粉粒体の入っ
た樹脂がベース基板からはがれにくくなる。Therefore, the present invention removes the thin film multilayer portion at the outermost edge and directly adheres the resin containing the powder or granular material onto the base substrate made of ceramic or the like, and therefore the adhesive strength against stress is
The resin, which is larger than the thin-film multi-layer portion and contains the powder particles at the outermost edge portion, is less likely to peel off from the base substrate.
また粉粒体の入った樹脂の内側に位置する薄膜多層部は
最外縁部の粉粒体の入った樹脂がベース基板上からはが
れない限りこの樹脂に包囲され、ベース基板からはく離
する力が働かないので、ベース基板からはく離すること
がない。In addition, the thin-film multi-layered portion located inside the resin containing the powder and granules is surrounded by this resin unless the resin containing the powder and granules at the outermost edge is peeled off from the base substrate, and the force of peeling from the base substrate works. Since it is not present, it does not peel off from the base substrate.
以下、本発明の一実施例を示す第１図について説明す
る。第１図は本発明の一実施例である半導体を示す図で
ある。Hereinafter, FIG. 1 showing one embodiment of the present invention will be described. FIG. 1 is a diagram showing a semiconductor which is an embodiment of the present invention.
第１図に示すようにベース基板２上のはんだ４にてLSI1
と接続する薄膜多層部５の一部（最外縁部）が除去さ
れ、その部分2aのベース基板２上を露出させたのち、LS
I1を包囲するための粉粒体の入った樹脂３が前記ベース
基板２上の露出部分に直接接着している。As shown in FIG. 1, the LSI 1 is formed by soldering 4 on the base substrate 2.
After removing a part (outermost edge) of the thin film multi-layer part 5 connected to the base substrate 2 to expose the part 2a on the base substrate 2, LS
A resin 3 containing powder particles for surrounding I1 is directly bonded to the exposed portion on the base substrate 2.
本発明による半導体は前記の如く構成されているから、
粉粒体の入った樹脂３とベース基板２との熱膨脹の差に
よって発生する応力に対する接着強度が薄膜多層部５の
それよりも大きくなるので、粉粒体の入った樹脂３がベ
ース基板２からはがれるのを防止することができる。Since the semiconductor according to the present invention is configured as described above,
Since the adhesive strength against the stress generated by the difference in thermal expansion between the resin 3 containing powder and the base substrate 2 is larger than that of the thin-film multilayer portion 5, the resin 3 containing powder is removed from the base substrate 2. It can prevent peeling.
また、薄膜多層部５は粉粒体の入った樹脂３に包囲され
ているため、粉粒体の入った樹脂３がベース基板２から
はがれない限りベース基板２からはく離する力が働かな
いのでベース基板２からはく離するのを防止することが
できる。Further, since the thin-film multilayer portion 5 is surrounded by the resin 3 containing the powder and granules, the peeling force from the base substrate 2 does not work unless the resin 3 containing the powder and granules is peeled off from the base substrate 2. It is possible to prevent peeling from the substrate 2.
つぎに第２図は本発明の他の一実施例であるベース基板
上に複数のLSIを搭載した半導体を示し、第３図は第２
図に示す半導体の他の一実施例を示す。Next, FIG. 2 shows a semiconductor in which a plurality of LSIs are mounted on a base substrate which is another embodiment of the present invention, and FIG.
Another embodiment of the semiconductor shown in the figure is shown.
第２図においては、LSI1毎に薄膜多層部５′が分割さ
れ、かつ各薄膜多層部５′の最外縁部を除去してその部
分2aのベース基板２上を露出し、この部分2aに薄膜多層
部５′を包囲する粉粒体の入った樹脂３が直接接着して
いる。In FIG. 2, the thin film multilayer portion 5'is divided for each LSI 1, and the outermost edge portion of each thin film multilayer portion 5'is removed to expose the base substrate 2 of the portion 2a. The resin 3 containing the granular material surrounding the multilayer portion 5'is directly bonded.
また第３図においては、複数個のLSI1と接続する１個の
薄膜多層部５″の最外縁部を除去してその部分2aのベー
ス基板２上を露出し、この部分2aに薄膜多層部５″を包
囲する粉粒体の入った樹脂３が直接接着している。Further, in FIG. 3, the outermost edge of one thin film multilayer portion 5 ″ connected to a plurality of LSIs 1 is removed to expose the base substrate 2 of the portion 2a, and the thin film multilayer portion 5 is formed in this portion 2a. The resin 3 containing powder and granules surrounding the ″ is directly bonded.
したがって、第２図および第３図に示す半導体において
も前記第１図に示す半導体と同様の効果を得ることがで
きる。Therefore, also in the semiconductor shown in FIGS. 2 and 3, the same effect as that of the semiconductor shown in FIG. 1 can be obtained.
本発明によれば粉粒体の入った樹脂および薄膜多層部が
ベース基板上からはく離するのを防止することができる
ので、優れた信頼性を得ることができる。According to the present invention, it is possible to prevent the resin and the thin film multi-layered portion containing the powder and granules from peeling off from the base substrate, so that excellent reliability can be obtained.
第１図は本発明の一実施例である半導体装置を示す図、
第２図は本発明の他の一実施例である半導体装置を示す
図、第３図は本発明のさらに他の一実施例である半導体
装置を示す図、第４図は従来の半導体装置の一例を示す
図、第５図は従来の半導体装置の他の一例を示す図、第
６図は従来の半導体装置のさらに他の一例を示す図であ
る。 １……LSI、２……ベース基板、３……粉粒体の入った
樹脂、５……薄膜多層部。FIG. 1 is a diagram showing a semiconductor device according to an embodiment of the present invention,
FIG. 2 is a diagram showing a semiconductor device which is another embodiment of the present invention, FIG. 3 is a diagram showing a semiconductor device which is still another embodiment of the present invention, and FIG. 4 is a diagram showing a conventional semiconductor device. FIG. 5 is a diagram showing an example, FIG. 5 is a diagram showing another example of a conventional semiconductor device, and FIG. 6 is a diagram showing yet another example of a conventional semiconductor device. 1 ... LSI, 2 ... base substrate, 3 ... resin containing powder and granules, 5 ... multilayer thin film part.
Claims (2)
た多層配線基板と、この多層配線基板上にはんだにて溶
融接続するLSIと、このLSIを包囲する粉粒体の入った樹
脂とを有し、かつ、前記粉粒体の入った樹脂を前記ベー
ス基板上に直接接着するように構成したことを特徴とす
る半導体装置。1. A multi-layer wiring board in which a resin is formed as an insulating layer on a base substrate, an LSI that is melted and connected to the multi-layer wiring board by soldering, and a resin containing powder particles surrounding the LSI. A semiconductor device, wherein the semiconductor device has a structure in which the resin containing the powdery or granular material is directly adhered to the base substrate.
脂が直接接着している領域は、前記多層配線基板の最外
周部であることを特徴とする特許請求の範囲第１項記載
の半導体装置。2. A region in which the resin containing the powdery particles is directly adhered to the base substrate is an outermost peripheral portion of the multilayer wiring substrate. Semiconductor device.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61268546A JPH0669075B2 (en) | 1986-11-13 | 1986-11-13 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61268546A JPH0669075B2 (en) | 1986-11-13 | 1986-11-13 | Semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63124425A JPS63124425A (en) | 1988-05-27 |
| JPH0669075B2 true JPH0669075B2 (en) | 1994-08-31 |
Family
ID=17460030
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61268546A Expired - Lifetime JPH0669075B2 (en) | 1986-11-13 | 1986-11-13 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0669075B2 (en) |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5469333A (en) * | 1993-05-05 | 1995-11-21 | International Business Machines Corporation | Electronic package assembly with protective encapsulant material on opposing sides not having conductive leads |
| JP4288517B2 (en) * | 1998-07-01 | 2009-07-01 | セイコーエプソン株式会社 | Manufacturing method of semiconductor device |
| JP3639272B2 (en) | 2002-08-30 | 2005-04-20 | 株式会社東芝 | Semiconductor device and method for manufacturing semiconductor device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS60182752A (en) * | 1984-02-29 | 1985-09-18 | Hitachi Ltd | Resin-coated electronic device |
-
1986
- 1986-11-13 JP JP61268546A patent/JPH0669075B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPS63124425A (en) | 1988-05-27 |
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