JPH0675253A - Optical semiconductor device and manufacturing method thereof - Google Patents

Abstract

(57) [Summary] [Object] To provide an optical semiconductor device having a multiple quantum well structure, and to provide an optical semiconductor device having a novel structure using the multiple quantum well structure. A multi-quantum well structure in which a high-resistivity semiconductor barrier layer having a relatively wide bandgap and a high-resistivity semiconductor well layer having a relatively narrow bandgap are alternately laminated, and the multi-quantum well A first conductivity type first formed in the multiple quantum well structure so as to face each other on a plane with a first high resistivity region defined in the film thickness direction interposed therebetween.
In the low resistivity region and the second low resistivity region of the second conductivity type, and means capable of applying a reverse bias voltage between the first and second low resistivity regions.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an optical semiconductor device, and more particularly to an optical semiconductor device having a multiple quantum well structure.

In recent years, with the progress of optoelectronics, development of optical integrated circuits has become an important issue. The main passive components of an optical integrated circuit include a waveguide, a selective reflection surface, a deflection element, and a switching element. It is desired that these passive optical components are integrated on one substrate together with active optical components such as a semiconductor laser and an optical sensor.

[0003]

2. Description of the Related Art Optical integrated circuits are roughly classified into hybrid type and monolithic type. The hybrid type mainly uses an oxide optical material such as LiNbO ₃ as a waveguide or an optical switching element and combines it with a semiconductor light emitting element. On the other hand, the monolithic type is a device in which all active and passive optical components are integrated on a semiconductor (III-V group compound semiconductor) substrate.

A hybrid optical integrated circuit using a LiNbO ₃ substrate can utilize a large nonlinear optical constant and high speed response. Modulation cutoff frequency 10 GHz or more, insertion loss 2d
A 4 × 4 matrix switch or the like is realized by using a modulator of B or less.

However, when it is used in an ultra large capacity system such as an optical computer or an optical switch, a high degree of integration is required. When the element size is on the order of μm, optical axis alignment and element processing become extremely difficult with the hybrid method. Moreover, there is a limit to the reduction of the driving voltage. For this reason, monolithic optical integrated circuits to which semiconductor fine processing technology can be applied are becoming the center of development.

In semiconductor optical integrated circuits, great breakthroughs are expected in the development of optically passive elements represented by switching elements. That is, a semiconductor has a smaller electro-optic constant than an optical material such as LiNbO ₃ , so that it is difficult to obtain a large change in refractive index.

In the case of a bulk semiconductor, in order to obtain a sufficient change in the refractive index for optical switching, it is necessary to make the driving voltage very large or the switching region length very long. For this reason, the compatibility with other optical components constituting the optical integrated circuit becomes poor, the CR time constant of the circuit becomes large, and the high-speed response deteriorates.

One of the techniques attracting attention as a method for improving the change in the refractive index of a semiconductor is the use of the quantum confined Stark effect using a multiple quantum well structure. The structure of an optical switch utilizing the quantum confined Stark effect is shown in FIG.

FIG. 3A shows a state in which light of wavelength λ _in is incident on an element in which a pin junction having a multiple quantum well structure (MQW) sandwiched between a p-type layer and an n-type layer is reversely biased. It is shown conceptually.

An i-type layer containing a multi-quantum well structure (MQW) 53 is laminated on a semiconductor n-type layer 51, and a p-type 55 is laminated thereon. I-type clad layer 5 above and below MQW
7b and 57a may be formed.

When a reverse bias voltage is applied to this laminated structure in the laminating direction of the MQW 53 (direction perpendicular to the well layer surface), almost all the voltage is applied to the i-type layer containing the MQW 53.
As a result, the electron and hole wavefunctions trapped in the quantum levels in the well layer shift in opposite directions, and the quantum level in the conduction band relatively decreases due to the Stark effect, resulting in a valence band The quantum level of rises.

This point also applies to excitons confined in the well layer. In MQW, the binding energy of excitons increases due to the confinement of electrons and holes in the well layer, and a clear exciton peak is observed even at room temperature.

FIG. 3 (B) shows the anomalous effect due to exciton formation seen in the index of refraction of MQW. Figure 3 (B)
According to this, the refractive index peak due to excitons generated when there is no electric field shifts to the long wavelength side due to the Stark effect due to the application of an electric field and the decrease in exciton binding energy due to the position shift of holes and electrons.

Therefore, if the incident light wavelength λ _in is selected as the N point near the refractive index peak when an electric field is applied, the difference from the M point when the electric field is not applied becomes relatively large. The device can be used for optical switching.

When an electric field is applied vertically to the well layer, for example, in the case of MQW of AlGaAs / GaAs, 10 ⁵ V /
It was shown that excitons exist sufficiently stably even under a strong electric field of about cm.

[0016]

As described above,
Optical semiconductor devices using multiple quantum wells have been used, but their capabilities are not yet fully utilized.

An object of the present invention is to provide an optical semiconductor device having a novel structure using a multiple quantum well structure. Another object of the present invention is to provide a method of manufacturing an optical semiconductor device using a multiple quantum well having a novel structure.

[0018]

The optical semiconductor device of the present invention comprises a high-resistivity semiconductor barrier layer having a relatively wide bandgap and a high-resistivity semiconductor well layer having a relatively narrow bandgap. A multi-quantum well structure that is alternately stacked and a multi-quantum well structure that is formed in the multi-quantum well structure facing each other on a plane with a first high resistivity region defined in the film thickness direction defined in the multi-quantum well structure. A first conductivity type first low resistivity region and a second conductivity type second low resistivity region, and means capable of applying a reverse bias voltage between the first and second low resistivity regions. Have.

The optical semiconductor device of the present invention further comprises:
A second quantum well structure defined in the multiple quantum well structure so as to face the first high resistance region with the first low resistivity region sandwiched therebetween.
A high-resistivity region and a third low-resistivity region formed in the multi-well structure so as to face the first low-resistivity region with the second high-resistivity region interposed therebetween.

The optical semiconductor device of the present invention further comprises:
The third high resistivity region defined in the multiple quantum well structure and the third high resistivity region are sandwiched so as to face the first high resistivity region with the second low resistivity region sandwiched therebetween. And a fourth low resistivity region formed in the multiple quantum well structure so as to face the second low resistivity region.

[0021]

When a pair of low resistance regions are formed with a high resistivity region sandwiched in the multiple quantum well structure, an electric field parallel to the in-plane direction can be applied to the semiconductor well layer in the high resistivity region.

When an electric field is applied in the in-plane direction of the semiconductor well layer, the refractive index of that region decreases. Various optical components can be formed by utilizing this change in the refractive index. By using the pair of high resistivity regions, the low refractive region can be formed on both sides of the high refractive region. By utilizing this, the waveguide structure can be selectively formed.

When a high resistivity region is formed on each side of a pair of low resistivity regions sandwiching the low refractive index region and an electric field is applied, a pair of waveguide structures can be formed. The formation and disappearance of each waveguide structure can be controlled by controlling the applied voltage.

[0024]

EXAMPLE FIG. 1 shows a basic structure of an optical semiconductor device using a multiple quantum well structure. When the semiconductor barrier layer B having a relatively wide bandgap and the semiconductor well layer W having a relatively narrow bandgap are alternately stacked, the multiple quantum well structure MQW is formed.

If this multiple quantum well structure MQW is formed of a high resistivity semiconductor and a predetermined region is selectively doped with impurities, a low resistivity region can be selectively formed. For example, a lateral pin structure is formed by forming an n-type region n1 doped with an n-type impurity and a p-type region p1 doped with a p-type impurity with the high resistivity region i1 interposed therebetween.

FIG. 1A shows a configuration in which a reverse bias voltage source V1 and a switch SW are connected to this lateral pin diode structure. The multiple quantum well structure M shown in FIG.
QW shows the spectrum of the refractive index as shown by the solid line in FIG. The peak of the wavelength λ _op is said to originate from the excitons in the semiconductor well layer W.

When a reverse bias voltage is applied to the lateral pin diode structure shown in FIG. 1 (A), the spectrum of the refractive index changes as shown by the dotted line in FIG. 1 (B). That is, the refractive index peak at the wavelength λ _op disappears.

It is considered that such a change in the refractive index is due to the disappearance of excitons as shown in FIG.
It is assumed that excitons EX formed by electron-hole pairs exist in the semiconductor well layer W. When an electric field E is applied in the in-plane direction within the semiconductor well layer, holes are accelerated in the direction of the electric field E and electrons are accelerated in the opposite direction.

The semiconductor well layer W has a narrow width in the direction perpendicular to the layer and limits the degree of freedom of carriers, but has the degree of freedom in the in-plane direction parallel to the layer. Therefore, when an electric field is applied in the in-plane direction of the multiple quantum well structure, the excitons EX disappear relatively easily. When the exciton EX disappears, the peak of the refractive index n derived from the exciton also disappears.

In the multi-quantum well structure shown in FIG. 1A, in the state where no reverse bias voltage is applied, the p-type region p
The 1, i-type region i1 and the n-type region n1 have almost the same optical properties, and have a substantially uniform refractive index distribution as shown in FIG.

However, when a reverse bias voltage V1 is applied to the multiple quantum well structure MQW having the pin diode structure shown in FIG. 1A, this reverse bias voltage is applied only to the i-type region i1 which is a substantially high resistance region. To be done.

Therefore, the change from the solid line to the broken line in FIG. 1B appears only in the i-type region i1. Therefore, FIG.
The refractive index distribution in the pin diode structure shown in (A) is
It changes as shown in FIG.

That is, the p-type region p which is a low resistivity region
In the 1 and n-type regions n1, the refractive index hardly changes, whereas in the i-type region i1 which is a high resistivity region, the refractive index n decreases and a stepwise refractive index distribution is generated.

In other words, when a low resistivity region is formed with a high resistivity region sandwiched in the multiple quantum well structure and an electric field is applied, the change in the refractive index in the high resistivity region becomes the change in the refractive index in the low resistivity region. Differently, a refractive index interface occurs.

FIG. 2 shows another basic structure of an optical semiconductor device using a multiple quantum well structure. FIG. 2A shows a structure of an optical semiconductor device using two high resistivity regions i1 and i2. The semiconductor barrier layers B1, B2, B3 and the semiconductor well layers W1, W2 are alternately stacked to form a multiple quantum well structure MQW.
Is the same as in the case of FIG.

In this structure, the MQW structure MQ
A pair of i-type regions i1 and i2, which are high-resistivity regions, are formed in W with a p-type region p1 that is a first low-resistivity region interposed therebetween, and second and third low-resistivity regions are formed on both sides thereof. N-type regions n1 and n2, which are regions, are formed. That is, the nipin lateral structure is formed in the in-plane direction in the multiple quantum well structure.

Variable reverse bias voltage sources V1 and V2 are connected to each pin lateral diode structure. That is, p
A variable reverse bias voltage source V1 is connected between the type region p1 and the n-type region n1, and a variable reverse bias voltage source V2 is connected between the p-type region p1 and the n-type region n2.

Each pin diode structure is the same as the pin diode structure shown in FIG. However, the central p-type region p1 is a region common to both pin diode structures. In addition, although the nipin structure is shown,
It is also possible to form an ip lateral structure.

FIG. 2B shows the refractive index distribution in the state in which the reverse bias voltages V1 and V2 are applied to the multiple quantum well structure shown in FIG. 2A. When the reverse bias voltage is not applied, the refractive index of the high resistivity region i is almost equal to the refractive index of the low resistivity regions p and n as shown by the broken line. When a reverse bias voltage is applied, this reverse bias voltage is almost applied to the i-type regions i1 and i2 which are high resistivity regions, so that the refractive index of these regions is selectively lowered.

Therefore, two low-refractive-index regions are formed with the p-type region p1 in which the refractive index is hardly lowered, sandwiched therebetween. The high refractive index region sandwiched by the pair of low refractive index regions constitutes an optical waveguide structure.

As described above, when a reverse bias voltage is applied to the structure shown in FIG. 2A, the central p-type region p1 becomes a core layer, and the i-type regions i1 and i2 on both sides become clad regions. FIG. 2C shows still another basic structure of an optical semiconductor device using the multiple quantum well structure. Semiconductor barrier layer B
1, B2, B3 and semiconductor well layers W1, W2 are alternately laminated to form a multiple quantum well structure MQW.
This is similar to FIG. 1 and FIG.

In this structure, the MQW structure MQ
Low-resistivity regions and high-resistivity regions are alternately formed in W in the lateral direction, and three high-resistivity regions i1, i2, and i3 are sandwiched by low-resistivity regions.

In the illustrated structure, the n-type region n2, the i-type region i2 and the p-type region p are provided in the MQW structure.
1, i-type region i1, n-type region n1, i-type region i3, and p-type region p2 are alternately formed to form a nipinip structure.

In this structure, each pin lateral diode structure is equivalent to that shown in FIG. Variable reverse bias voltage sources V1, V2, V3 are connected to each pin lateral diode structure.

FIG. 2D shows the refractive index distribution in the state in which a reverse bias voltage is applied to each pin diode structure of the multiple quantum well structure MQW shown in FIG. 2C. When the reverse bias voltage is not applied, the respective regions have almost the same refractive index as shown by the broken line in the figure, but when the reverse bias voltage is applied, the refractive index of each of the high resistivity regions i1, i2, i3 is increased. n decreases.

Therefore, as shown in FIG.
Low refractive index regions occur on both sides of the mold region p1 and the n-type region n1. The p-type region p1 and the n-type region n1 sandwiched by the low-refractive-index regions each constitute a waveguide structure. The generation and disappearance of this waveguide structure can be controlled by controlling the reverse bias voltage.

In the structure of FIG. 2C, the variable reverse bias voltage source V1 shown in the center is omitted and the i-type region i
The region 1 may be fixedly constituted by a low refractive index region. Also, instead of the nipinip structure, the pinip
It may have an in structure.

In one incident optical waveguide, p shown in FIG.
By connecting the mold region p1 and the n-type region n1 and controlling the application of the reverse bias voltage, the incident optical waveguide can be selectively connected to either of the two waveguide structures. Therefore, an optical switch structure is constructed.

Although only the optical structure in the in-plane direction of the multi-quantum well structure has been described, the multi-quantum well structure is sandwiched between a pair of cladding layers having a low refractive index so that the multi-quantum well structure can be vertically aligned. Can also have a light confinement function.

As a combination of the semiconductor barrier layer B and the semiconductor well layer W having the multiple quantum well structure, InP /
InGaAs, AlGaAs / GaAs, InP / In
AlAs or the like can be used. In addition, InP, AlGaAs, or the like can be used as the clad layer having an effective refractive index lower than those of the multiple quantum well structure.

FIG. 4 shows an example of the structure of an optical semiconductor device using the multiple quantum well structure shown in FIG. On a semi-insulating InP substrate 1 doped with Fe, a semiconductor well layer of In _1-x Ga _x As _y P _1-y (x =
0.438, y = 0.940), and about 100 cycles of InP having a thickness of about 100Å alternately as a semiconductor barrier layer.
It grows epitaxially by D, MOVPE, or the like.

A p-type region p1 and an n-type region n1 are formed by doping p-type and n-type impurities with the i-type region i1 interposed therebetween.
Then, portions other than the waveguide regions WG1, WG2, WG3, WG4 and the p-type region p1, i-type region i1, and n-type region n1 are removed.

In this way, an InP layer is further deposited as a clad layer on the formed multiple quantum well structure MQW. When the reverse bias voltage is selectively applied between the p-type region p1 and the n-type region n1, the refractive index of the i-type region i1 is selectively reduced. Therefore, a refractive index interface is generated, and the waveguide WG
Light incident from 1 can be selectively distributed to the two waveguides WG3 and WG4.

When no reverse bias voltage is applied to the pin lateral diode structure, there is no refractive index interface, and the light L1 incident from the waveguide WG1 goes straight and becomes the light L2 emitted to the waveguide WG4.

When a reverse bias voltage is applied to the pin lateral diode structure, the refractive index of the i-type region i1 is lowered,
A refractive index interface is generated between the p-type region p1 and the i-type region i1. In this state, when the light L1 is incident from the waveguide WG1,
The light L1 is totally reflected at the refractive index interface between the p-type region p1 and the i-type region i2, and becomes the light L3 emitted to the waveguide WG3.

In this way, by controlling the reverse bias voltage applied to the pin lateral diode structure, the incident light L1 can be selectively distributed to the waveguides WG4 and WG3. Light is input from the waveguide WG3 and the waveguide W
It can be distributed between G1 and WG2.

It will be apparent to those skilled in the art that the waveguide using the multiple quantum well structure shown in FIG. 2A can be used in various forms. For example, it can be used for forming the waveguides WG1 to WG4 of the optical semiconductor device shown in FIG.

FIG. 5 is a conceptual diagram for explaining the basic structure and function of an optical switch device using the multiple quantum well structure shown in FIG. 2 (C). FIG. 5A schematically shows the structure of the optical switch. The waveguide WGa is two waveguides WGb.
And WGc. The incident waveguide portion of this optical switch structure is indicated by R1, the branched portion is indicated by R2, and the branched waveguide portion is indicated by R3. The regions F1, F2, F3 are the waveguide regions W.
A region surrounding G, and when the refractive index of these regions is low, a waveguide is formed.

FIG. 5B shows two waveguides WG on the output side.
The state where b and WGc are formed together is shown. After entering from the incident side waveguide WGa, two waveguides WGb, W
The light is branched into Gc and emitted from each emission side waveguide.
At this time, the refractive index distribution of the exit side waveguide portion is high in the waveguide portion and low in other portions as shown in the upper part of the figure.

FIG. 5C shows a case where only one of the two waveguides on the output side is turned on and the other waveguide WGc is turned off. Incident side waveguide WG
The light incident from a is guided to the waveguide WGb and emitted.

On the right side of the exit side waveguide WGc, the region WG
The refractive index is made substantially uniform so that c does not effectively form a waveguide. Therefore, the light incident on the right waveguide portion is diffused and is not effectively transmitted to the emission side waveguide.

In FIG. 5D, the waveguide function is turned off by setting the refractive index on the left side of the waveguide WGb to be equal, and the other waveguide WGb.
The state which turned on c is shown. In this state, the light incident from the incident side waveguide WGa is transmitted only to the right side emission side waveguide WGc.

FIG. 6 shows an optical switch waveguide which constitutes the output side waveguide portion of the optical switch as shown in FIG. In the figure, a lower cladding layer 13 formed of non-doped i-type InP or the like is formed on a semi-insulating substrate 11 formed of Fe-doped InP or the like, and a multiple quantum well structure MQW is formed thereon. Has been done.

The multi-quantum well structure MQW has, for example, an In _1-x Ga _x As _y P _1-y (x = 0.4) thickness of about 100 Å.
38, y = 0.940) and InP having a thickness of about 100Å are alternately laminated for 20 cycles. In this case, I
nP forms a semiconductor barrier layer, and InGaAsP forms a semiconductor well layer. Both the lower clad layer and the upper clad layer are formed of, for example, an InP layer having a thickness of about 1000Å.

In the case of such a structure, the exciton absorption wavelength is about 1.526 μm, and a peak of the refractive index occurs near 1.54 μm. If you make the excitons disappear,
The refractive index peak near 1.54 μm disappears.

If the width of the i-type region is set to about 2 μm, a voltage of about 2 V or more may be applied to eliminate the excitons. The operating voltage can be further reduced by further reducing the width of the i-type region.

An i-type I is formed on the MQW multi-quantum well structure.
An upper clad layer 15 made of nP or the like is laminated. Selectively S in the stripe region where the waveguide is to be formed.
N-type impurities such as n and Si and p-type impurities such as Zn are doped to form n-type regions n1 and p-type regions p1.

The i-type region i adjacent to the n-type region n1
3, another p-type region p2 is formed, and the p-type region p1 is formed.
Another n-type region n2 is formed sandwiching the i-type region i2 adjacent to. On top of these laminated structures, InGaAs
The contact layer 16 formed by the above method is formed, and is removed by selective etching except on the doped region.

On the contact layer 16, a p-side electrode 18 is formed on the p-type region and an n-side electrode 19 is formed on the n-type region. The p-side electrode is made of, for example, Ti / Pt, and the n-side electrode is made of, for example, AuGe / Au. In this way, the lateral pin diode structure D
1, D2, D3 are formed.

A reverse bias voltage source V3 and a modulator M3 are provided between the electrodes 18 and 19 of the lateral pin diode structure D3.
Are connected in series. A reverse bias voltage source V1 is connected between the p-side electrode 18 and the n-side electrode 19 of the pin lateral diode structure D1. Also, the lateral pi
A reverse bias voltage source V2 and a modulator M2 are connected between the p-side electrode 18 and the n-side electrode 19 of the n-diode structure D2.

In this state, the lateral pin diode structure D1 arranged at the center is always reverse-biased, and the refractive index of its i-type region i1 is lowered. Further, a reverse bias voltage that changes according to the voltages of the modulators M2 and M3 is applied to the lateral pin diode structures D2 and D3 arranged on both sides.

If the reverse bias voltage is substantially zero, then i
The mold regions i2 and i3 have almost the same refractive index as the adjacent p-type region and n-type region, but the deeper the reverse bias voltage, the lower the refractive index of the i-type regions i2 and i3.

Lateral pin diode structure D1, D
When 2 and D3 are all sufficiently reverse biased, the i-type region i
The refractive indices of 1, i2, and i3 are sufficiently low, and the p-type region p
The 1, n-type region n1 functions as a waveguide.

When the reverse bias voltage of the lateral pin diode structure D2 becomes shallow, the refractive index of the i-type region i2 becomes close to the refractive index of the regions on both sides thereof, and the waveguide structure of the p-type region p1 disappears.

Similarly, a lateral pin diode structure D
When the reverse bias voltage of 3 becomes shallower, the refractive index of the i-type region i3 increases and the waveguide structure of the n-type region n1 disappears. In this way, a switchable waveguide as shown in FIGS. 5C and 5D is constructed.

A method of manufacturing the optical switch waveguide as shown in FIG. 6 will be described with reference to FIGS. First, FIG.
As shown in (A), MOCV is formed on the InP substrate 11.
The lower clad layer 13, the multiple quantum well structure MQW, the upper clad layer 15 is formed by using a crystal growth method such as D or MOVPE.
To grow epitaxially.

Next, as shown in FIG. 7B, a photoresist mask 1 patterned on the surface of the semiconductor substrate.
7a is formed. The regions R1, R2, and R3 are shown in FIG.
It corresponds to the regions R1, R2, and R3 shown in (A).

Selective etching is performed by using a photoresist mask as shown in FIG. 7B as an etching mask.
FIG. 7C shows a cross section of the semiconductor substrate which is selectively etched.

Then, a photoresist mask 17b as shown in FIG. 8A is formed, and p-type impurity ions are implanted. Next, a photoresist mask 17c as shown in FIG. 8B is formed, and ion implantation of n-type impurity ions is performed.

The semiconductor substrate into which the p-type impurity ions and the n-type impurity ions are selectively implanted in this manner is shown in FIG.
It has a structure as shown in FIG. Figure 9
It is the figure which looked at the semiconductor substrate structure after ion implantation from above.
A lower clad layer, a multiple quantum well structure, and an upper clad layer are selectively formed on the semiconductor substrate 11.

In the upper part of the figure, n-type regions n1 and n2 and p-type regions p1 and p2 are formed with the i-type regions i1, i2 and i3 sandwiched therebetween. In the drawing, waveguides WGa, WGb, and WGc formed in a ridge shape are formed in the central portion and below.

With such a structure, an optical switch as shown in FIG. 5 is formed. The light incident on the waveguide WGa is branched into two waveguides WGb and WGc, which are respectively coupled to the n-type region n1 and the p-type region p1.

A reverse bias voltage is always applied to the i-type region i1 and its refractive index is low. However, the i-type region i3 on the opposite side of the n-type region n1 changes its refractive index depending on the magnitude of the reverse bias voltage. Similarly, the refractive index of the i-type region i2 on the opposite side of the p-type region p1 is changed by the reverse bias voltage.

If the refractive index of the i-type region i3 is sufficiently low, n
The mold region n1 forms a waveguide. Similarly, if the refractive index of the i-type region i2 is sufficiently low, the p-type region p1 forms a waveguide. By controlling the reverse bias voltage V by the modulator M, the refractive index of the i-type regions i2 and i3 can be changed and the waveguide function can be controlled.

In the structures of FIGS. 6 to 9, the incident side waveguide having no switching function is formed by shaping the multiple quantum well structure sandwiched by the cladding layers into a ridge shape.

FIG. 10 shows an example of a structure in which a waveguide structure is formed by using an inclined surface. In FIG. 10A, the surface of the lower clad layer 13 on the semi-insulating substrate 11 is etched in a concave shape. Therefore, the lower cladding layer 1
The multi-quantum well structure MQW and the upper clad layer 15 formed on the third layer also form a concave surface following the underlying surface. Considering the lower part of the central part in the figure, the lower clad layer 13 having a low refractive index is arranged on both sides of the multiple quantum well structure MQW.

Therefore, in the concave bottom multiple quantum well structure, the lower side is sandwiched by the lower clad layer 13, the upper side is sandwiched by the upper clad layer 15, and both sides thereof are effectively sandwiched by the lower clad layer 13. There is. For this reason, the multiple quantum well structure MQW at the bottom forms a waveguide. This configuration is used, for example, as the incident side optical waveguide WGa.

In FIG. 10B, two concave laminated structures as shown in FIG. 10A are formed. The multiple quantum well structures arranged at the bottoms of these two recesses respectively form waveguide structures WGb and WGc, and two branch waveguides connected to the incident side optical waveguide WGa.

FIG. 10C shows a plan shape of an etching mask for forming a waveguide structure using the inclined surface as shown in FIGS. 10A and 10B. Semi-insulating substrate 1
1 after growing the lower cladding layer 13 on top of FIG.
A photoresist mask 17d as shown in (C) is formed.

Using the photoresist mask 17d as an etching mask, the lower clad layer 13 is etched to obtain the surface of the lower clad layer 13 having the concave stripe regions as shown in FIGS. 10 (A) and 10 (B). You can If the multiple quantum well structure and the upper clad layer 15 are formed thereon, a waveguide as shown in FIGS. 10A and 10B is formed.

Since the optical switch waveguide is formed on the etched region R3 shown in FIG. 10C, the optical switch waveguide shown in FIG.
It is optically connected to the two optical waveguides WGb and WGc as shown in 0 (B).

The waveguide structure using the inclined surface can be formed not only by the concave surface but also by the convex surface.
FIG. 11 shows an example of a waveguide structure using an inclined surface using a convex surface.

In FIG. 11A, the lower clad layer 1
3 has a convex surface. The multiple quantum well structure MQW and the upper clad layer 15 formed thereon have a convex shape that follows the underlying surface.

At the top of the convex shape, the multiple quantum well structure MQW is sandwiched on the lower side by the lower cladding layer 13 and on the upper side by the upper cladding layer 15, and both sides thereof are effectively sandwiched by the upper cladding layer 15. Has been. Therefore, the multi-quantum well structure MQW arranged on the top of the convex shape
Is an optical waveguide WGa defined in the vertical and horizontal directions
To form.

FIG. 11B shows a structure in which two waveguides shown in FIG. 11A are formed. At the top of the two convex shapes, the multi-quantum well structure MQW has two optical waveguides W.
Gb and WGc are formed.

Regarding the optical function, FIG.
The waveguide shown in FIG. 10B is almost the same as the waveguide shown in FIGS. FIG. 11C shows FIG.
The shape of the etching mask for forming the waveguide structure as shown in FIG.

As shown in the figure, after the lower clad layer 13 is epitaxially grown on the semi-insulating substrate 11, a photoresist mask 17e is formed on the surface thereof. When the lower clad layer 13 is selectively etched using this photoresist mask 17e as an etching mask, FIG.
The surface of the lower clad layer 13 having the concave stripes as shown in (A) and (B) is formed.

In this structure, the optical switch waveguide region R3 is not etched, and as shown in FIG.
It is at the same level as the top of the recess shown in (B). Therefore, the optical switch waveguide formed in the region R3 has the structure shown in FIG.
It is optically connected to the two optical waveguides WGb and WGc shown in FIG.

In the embodiment described above, the fixed reverse bias voltage is applied to the i-type region i1 arranged at the center of the optical switch waveguide to lower its refractive index. The formation of the low refraction region in the central portion can be realized by other than applying the reverse bias voltage.

FIG. 12 shows a structure in which the central region of the optical switch is made into a low refractive region by utilizing the inclined surface. In this configuration, a concave surface is formed in the i-type region i1 at the center of the optical switch region.

Therefore, p on the right side of the n-type region n1,
The left side portion of the mold region p1 is defined by a low-refractive-index region similarly to the optical waveguide using the convex portion shown in FIG. Therefore, at the MQW level, the effective refractive index of the i-type region i1 is kept low without applying the reverse bias voltage. Other configurations are similar to those of the optical switch waveguide shown in FIG.

When the optical switch waveguide utilizing the inclined surface as shown in FIG. 12 is adopted, it is convenient to use the inclined surface also for the fixed waveguide portion. FIG. 13 shows a structure in which the fixed waveguide portion is formed by using an inclined surface. FIG.
11A and 11B are similar to the configurations shown in FIGS. 11A and 11B, respectively. Optical waveguides WGa, WGb, WGc are formed on the tops of the convex stripes formed on the surface of the lower clad layer 13 on the semiconductor substrate 11, and these optical waveguides have n-type regions n1 and p-type shown in FIG. It is connected to the region p1.

FIG. 14 is a schematic view for explaining a manufacturing method for producing the structure shown in FIGS. 12 and 13.
FIG. 14A shows an etching mask formed over the lower clad layer. After the lower clad layer 13 is epitaxially grown on the semi-insulating substrate 11, a photoresist mask 17f as shown in FIG. 14A is formed.

The photoresist mask 17f has a region R1,
An area corresponding to the optical waveguide is covered in the portion R2, and an opening is formed in the central portion in the area R3 of the optical switch waveguide.

By using the photoresist mask as an etching mask and etching the lower clad layer, an uneven shape as shown in FIGS. 11 and 13 is formed on the surface. After that, the photoresist mask 17f is removed, the multiple quantum well structure MQW and the upper clad layer 15 are formed on the surface, and ion implantation is performed as shown in FIG. 14B.

That is, the optical switch portion shown in the region R3 is doped with p-type impurity ions and n-type impurity ions, and p
The mold regions p1 and p2 and the n-type regions n1 and n2 are formed. n
The waveguide WGb is constituted by the p-type region n1 and the p-type region p
1 forms the waveguide WGc. Then region R3
A semiconductor optical switch is formed by forming electrodes in the p-type region and the n-type region, respectively.

FIGS. 15 and 16 show an embodiment having a structure in which the unevenness is reversed from the embodiment shown in FIGS. 12 to 14. Figure 15
As shown in (A), the incident-side waveguide WGa is formed on the bottom surface of the concave portion of the semiconductor substrate and branched from the waveguide WGa.
The two waveguides WGb and WGc are formed on the bottom surfaces of the two concave stripes on the surface of the semiconductor substrate, as shown in FIG.

When the fixed waveguide is formed in this way, it is convenient for the optical switch section to have a structure as shown in FIG. That is, the convex portion is formed in the central portion of the optical switch portion, and the p-type regions p1 and p2 and the n-type regions n1 and n2 are formed in the lower portions on both sides.

The reverse bias voltage source V3 and the modulator M3 are connected between the p-type region p2 and the n-type region n1, and the p-type region p
A reverse bias voltage source V2 and a modulator M2 are connected between 1 and the n-type region n2.

The right side portion of the n-type region n1 and the left side portion of the p-type region p1 each have a shape in which the lower clad layer 13 is lifted up, so that the effective refractive index thereof is low. Therefore, even if the reverse bias voltage is not applied to the central i-type region i1, the effective refractive index of this region is kept low.

The optical switch as shown in FIG. 15 can be manufactured, for example, by the manufacturing method as shown in FIG. FIG. 16A shows the shape of the etching mask. After epitaxially growing the lower clad layer on the semiconductor substrate, a photoresist mask 17g as shown in FIG. 16A is formed. The photoresist mask 17g is
The lower part covers both side regions and the upper part covers the central region.

By etching the lower cladding layer using such a photoresist mask 17g as an etching mask, only the optical waveguide portion is etched in the regions R1 and R2, and both sides except the central stripe region are etched in the region R3. The part is etched. In this way, the concavo-convex pattern of the lower clad layer 13 as shown in FIG. 15 is formed.

After selective etching of the lower cladding layer,
A multiple quantum well structure and an upper clad layer are grown epitaxially, and then selective ion implantation as shown in FIG. 16B is performed. By implanting p-type impurity ions and n-type impurity ions, p-type regions p1 and p2, and n-type region n
1 and n2 are formed. In this way, the optical switch as shown in FIG. 15 is formed.

FIG. 17 shows an optical semiconductor device according to another embodiment. FIG. 17A is a top view of the semiconductor substrate seen from above. A lower clad layer, a multiple quantum well structure, and an upper clad layer are grown on the upper surface of the semiconductor substrate 20, and are selectively etched in a pattern as shown in FIG.

That is, one waveguide 22 is formed on the lowermost side in the figure, and a rectangular region 23 is formed on it. On the rectangular area 23, a branching waveguide 24 is provided.
a and 24b are formed, and another rectangular area 26 is formed thereon.

At the top of the figure, two optical waveguides 28a,
28b is formed. In the two rectangular regions 23 and 26, p-type regions p1, p2, p3, n-type region n1 and
n2, n3, and n4 are selectively formed. The p-type region p3 is arranged between the waveguide 22 and the waveguide 24, and both sides thereof are sandwiched by n-type regions n3 and n4 via i-type regions i4 and i5.

In the upper rectangular region 26, the n-type region n1 is provided between the optical waveguides 24 and 28 arranged vertically.
And a p-type region p1 are arranged, and i-type region i3,
A p-type region p2 and an n-type region n2 are formed via i2.

The lower rectangular area 23 has the same structure as the structure shown in FIG. 2A, and the rectangular area 26 is shown in FIG.
The structure is equivalent to the structure shown in FIG. FIG. 17
17B shows an example of a photoresist pattern for forming the structure shown in FIG.

After growing a lower clad layer, a multiple quantum well structure and an upper clad layer on a semiconductor substrate, a photoresist pattern 17h as shown in FIG. 7B is formed to form an upper clad layer, a multiple quantum well structure, By selectively etching the lower clad layer, a ridge pattern as shown in FIG. 17A is obtained. After that, selective doping of p-type impurities and n-type impurities is performed, and
The configuration as shown in (A) can be obtained.

When the reverse bias voltage is applied to each pin lateral diode structure to lower the refractive index of the i-type region, the p-type regions p1, p3 and n-type region n1 form a waveguide structure.

The multiple quantum well structure sandwiched between the upper and lower cladding layers in the above-described embodiment has the same structure as the multiple quantum well structure in the semiconductor laser. Therefore, the semiconductor laser and the above-mentioned optical element can be easily integrated on the same semiconductor substrate.

Further, since the semiconductor laser and the like and the optical switch component and the like can be coupled only by patterning, there is no need to align the optical axes. Further, the wavelength band used can be deflected by changing the composition and layer thickness of the multiple quantum well structure. For example, a GaAs / AlGaAs multiple quantum well structure can be used for the 0.9 μm band, and an InP / InAlAs multiple quantum well structure can be used for the 1.5 μm band.

The present invention has been described above with reference to the embodiments.
The present invention is not limited to these. For example,
It will be apparent to those skilled in the art that various changes, improvements, combinations and the like can be made.

[0124]

As described above, according to the present invention,
A novel optical semiconductor device using a multiple quantum well structure can be obtained.

Since the optical element having the lateral structure can be integrated on the semiconductor substrate, it greatly contributes to the formation of an optical integrated circuit.

[Brief description of drawings]

FIG. 1 shows a basic configuration according to an embodiment of the present invention. Figure 1
1A is a schematic sectional view, FIG. 1B is a refractive index spectrum, FIG. 1C is a conceptual diagram for explaining exciton disappearance, and FIGS. 1D and 1E are refractive index distributions. It is a graph which shows.

FIG. 2 shows another basic configuration according to an embodiment of the present invention. 2A is a cross-sectional view showing the structure, FIG. 2B is a graph showing the refractive index distribution, and FIG. 2C is a cross-sectional view showing the structure.
(D) is a graph showing a refractive index distribution.

FIG. 3 shows a conventional example. FIG. 3A is a schematic sectional view of the optical semiconductor device, and FIG. 3B is a graph showing the refractive index distribution.

FIG. 4 is a plan view showing an optical semiconductor device according to an example of the present invention.

FIG. 5 is a conceptual diagram showing a basic configuration and functions of an optical switch created according to an example of the present invention.

FIG. 6 is a sectional view showing a configuration of an optical switch waveguide according to an embodiment of the present invention.

FIG. 7 is a diagram for explaining a manufacturing method of the optical switch waveguide shown in FIG. 7A is a sectional view of the semiconductor structure, FIG. 7B is a plan view showing the shape of the photoresist mask, and FIG. 7C is a sectional view of the semiconductor structure.

FIG. 8 is a diagram for explaining a manufacturing method of the optical switch waveguide shown in FIG. 8A and 8B are plan views showing the shape of a mask used for ion implantation, and FIG. 8C is a sectional view showing the shape of an ion implantation region.

9 is a plan view of a semiconductor substrate that has been ion-implanted by the process of FIG.

FIG. 10 is a diagram illustrating a waveguide structure using inclined surfaces according to another embodiment of the present invention. 10 (A), (B)
Is a cross-sectional view of the waveguide portion, and FIG. 10C is a plan view showing the shape of the etching mask.

FIG. 11 is a diagram illustrating a waveguide structure using inclined surfaces according to another embodiment of the present invention. 11 (A), (B)
11C is a cross-sectional view of the waveguide portion, and FIG. 11C is a plan view showing the shape of the etching mask.

FIG. 12 is a cross-sectional view showing a structure of an optical switch waveguide using a tilted surface according to another embodiment of the present invention.

13 is a cross-sectional view of an optical waveguide portion used in combination with the inclined surface utilizing optical switch waveguide shown in FIG.

14 is a diagram for explaining a manufacturing method of the optical semiconductor device shown in FIGS. 12 and 13. FIG. 14A is a plan view showing the shape of the etching mask, and FIG. 14B is a sectional view showing the ion implantation region.

FIG. 15 is a cross-sectional view showing a structure of an optical switch using an inclined surface according to another embodiment of the present invention.

16 is a diagram for explaining a manufacturing method for manufacturing the configuration of FIG. 15. FIG. 16A is a plan view showing the shape of an etching mask, and FIG. 16B is a cross-sectional view showing an ion implantation region.

FIG. 17 is a plan view showing another embodiment of the present invention.

[Explanation of symbols]

 B semiconductor barrier layer W semiconductor well layer MQW multiple quantum well structure V reverse bias voltage source SW switch EX exciton n n-type region p p-type region WG waveguide L optical D diode M modulator 1, 11 semi-insulating substrate 13, 15 Clad layer 17 Photoresist mask

Claims (10)

[Claims] 1. A multiple quantum device in which a high-resistivity semiconductor barrier layer (B) having a relatively wide bandgap and a high-resistivity semiconductor well layer (W) having a relatively narrow bandgap are alternately laminated. A well structure (MQW) and a multiple quantum well structure (MQW) formed in the multiple quantum well structure so as to face each other on a plane with a first high resistivity region (i) defined in the film thickness direction interposed therebetween. First of the first conductivity type
And a second conductivity type second low resistivity region (p, n), and means for applying a reverse bias voltage between the first and second low resistivity regions. Optical semiconductor device having. 2. A second high resistivity region defined in the multiple quantum well structure so as to face the first high resistance region with the first low resistivity region interposed therebetween, and the second high resistivity region. The optical semiconductor device according to claim 1, further comprising a third low resistivity region formed in the multi-well structure so as to face the first low resistivity region with a resistivity region interposed therebetween. 3. The third low-resistivity region has a second conductivity type, and further comprises means capable of applying a reverse bias voltage between the first and third low-resistivity regions. The optical semiconductor device described. 4. A third high resistivity region defined in the multiple quantum well structure so as to face the first high resistivity region with the second low resistivity region sandwiched between the third high resistivity region and the third high resistivity region. 3. A fourth low resistivity region formed in the multiple quantum well structure so as to face the second low resistivity region with a high resistivity region interposed therebetween. Optical semiconductor device. 5. The fourth low resistivity region has a first conductivity type and further comprises means capable of applying a reverse bias voltage between the second and fourth low resistivity regions.
The optical semiconductor device described. 6. A multi-quantum layer in which a high-resistivity semiconductor barrier layer (B) having a relatively wide bandgap and a high-resistivity semiconductor well layer (W) having a relatively narrow bandgap are alternately stacked. A well structure (MQW) and a multiple quantum well structure (MQW) formed in the multiple quantum well structure so as to face each other on a plane with a first high resistivity region (i) defined in the film thickness direction interposed therebetween. First of the first conductivity type
Low-resistivity region and second low-resistivity region (p, n) of the second conductivity type, and the multi-quantum well so as to face the first high-resistivity region with the first low-resistivity region interposed therebetween. Second defined within the structure
A high resistivity region; and a second conductivity type third low resistivity region formed in the multiple well structure so as to face the first low resistivity region with the second high resistivity region sandwiched therebetween. A third high-resistivity region defined in the multiple quantum well structure and sandwiching the third high-resistivity region so as to face the first high-resistivity region with the second low-resistivity region interposed therebetween. A fourth low-resistivity region of the first conductivity type formed in the multiple quantum well structure so as to face the second low-resistivity region, and between the first and third low-resistivity regions, And a means capable of applying a reverse bias voltage between the second and fourth low resistivity regions. 7. The multiple quantum well structure (MQ)
W) and optically coupled to the first and second low resistivity regions, and optical cladding layers (1) disposed above and below the multiple quantum well structure (MQW).
The optical semiconductor device according to any one of claims 4 to 6, further comprising: 8. A high-resistivity semiconductor barrier layer (B) having a relatively wide bandgap and a high-resistivity semiconductor well layer (W) having a relatively narrow bandgap are alternately formed on a semiconductor base. Stacked multiple quantum well structure (MQ
W) epitaxially growing, and doping the multiple quantum well structure (MQW) with impurities,
And a step of forming at least one lateral pin structure. 9. A first layer having a refractive index lower than an effective refractive index of the multiple quantum well structure on the semi-insulating semiconductor substrate before the epitaxial growth step of the multiple quantum well structure.
A step of epitaxially growing a semiconductor clad layer, and a step of epitaxially growing a second semiconductor clad layer having a refractive index lower than its effective refractive index on the multiple quantum well structure after the step of epitaxially growing the multiple quantum well structure. 9. A method for manufacturing an optical semiconductor device according to claim 8, which includes. 10. A step of forming a convex or concave surface in a predetermined region by partially selectively etching the first semiconductor clad layer after the step of epitaxially growing the first semiconductor clad layer. 8. The method for manufacturing an optical semiconductor device according to 8 to 9.